|
ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
|
Files | |
| ra8_acmphs.h | |
| Full-featured High-Speed Analog Comparator (ACMPHS) driver. | |
| ra8_acmphs_regs.h | |
| High-Speed Analog Comparator (ACMPHS) register layout for the RA8D2. | |
| ra8_adc.h | |
| Full-featured ADC_B driver. | |
| ra8_adc_b_regs.h | |
| ADC16H (16-bit SAR) register layout for the Renesas RA8D2 / RA8P1. | |
| ra8_agt.h | |
| Asynchronous General-Purpose Timer (AGT) driver header. | |
| ra8_agt_regs.h | |
| Asynchronous General-Purpose Timer (AGT) register layout for RA8D2. | |
| ra8_bkup.h | |
| Battery Backup Function (VBATT) HAL driver – public API. | |
| ra8_bkup_regs.h | |
| Battery Backup Function (VBATT / BAT*) register layout for the RA8D2. | |
| ra8_ble.h | |
| BLE HCI transport seam (host-side). | |
| ra8_bscan.h | |
| JTAG / IEEE-1149.1 Boundary Scan TAP HAL surface. | |
| ra8_bscan_regs.h | |
| JTAG / IEEE-1149.1 Boundary Scan TAP constants for the RA8D2. | |
| ra8_cac.h | |
| Clock Accuracy Check driver. | |
| ra8_cac_regs.h | |
| Clock Accuracy Check (CAC) register layout for the Renesas RA8D2. | |
| ra8_cache.h | |
| Cortex-M85 L1 cache maintenance, enable/disable, and I-cache invalidate. | |
| ra8_canfd.h | |
| CANFD Lite driver (bit-timing, TX, RX, error state). | |
| ra8_canfd_regs.h | |
| CANFD controller register layout for the Renesas RA8D2. | |
| ra8_ceu.h | |
| Capture Engine Unit (CEU) camera-capture driver. | |
| ra8_ceu_api.h | |
| Capture Engine Unit (CEU) driver function prototypes. | |
| ra8_ceu_regs.h | |
| Capture Engine Unit (CEU) register layout for the RA8D2. | |
| ra8_ceu_types.h | |
| Capture Engine Unit (CEU) configuration descriptors and types. | |
| ra8_cgc.h | |
| High-level Clock Generation Circuit driver. | |
| ra8_cgc_regs.h | |
| Clock Generation Circuit (CGC) field layouts for the Renesas RA8D2. | |
| ra8_cnecc.h | |
| CANFD ECC (CNECC) HAL driver public API. | |
| ra8_cnecc_regs.h | |
| CANFD ECC (CNECC) register layout for the RA8D2. | |
| ra8_crc.h | |
| CRC hardware calculator driver header. | |
| ra8_crc_regs.h | |
| CRC calculator register layout for the Renesas RA8D2. | |
| ra8_dac_b.h | |
| Full-featured 12-bit DAC_B driver. | |
| ra8_dac_b_regs.h | |
| 12-bit DAC_B register layout for the Renesas RA8D2 | |
| ra8_dma.h | |
| Generic DMA transfer substrate (DMAC engine). | |
| ra8_dmac.h | |
| 8-channel DMA controller (DMAC0) driver | |
| ra8_dmac_regs.h | |
| DMAC (Direct Memory Access Controller) register layout for the RA8D2. | |
| ra8_doc.h | |
| Data Operation Circuit (DOC) driver header. | |
| ra8_doc_regs.h | |
| Data Operation Circuit (DOC) register layout for the Renesas RA8D2. | |
| ra8_dotf.h | |
| Decryption On The Fly (DOTF) HAL driver public API. | |
| ra8_dotf_regs.h | |
| Decryption On The Fly (DOTF) register layout for the Renesas RA8D2. | |
| ra8_drw.h | |
| 2D Drawing Engine (DRW / D/AVE 2D) HAL driver – public API | |
| ra8_drw_dlist.h | |
| 2D Drawing Engine (DRW / D/AVE 2D) display-list builder – public API | |
| ra8_drw_regs.h | |
| 2D Drawing Engine (DRW / D/AVE 2D) register layout for the RA8D2 | |
| ra8_dtc.h | |
| Data Transfer Controller (DTC) driver. | |
| ra8_dtc_regs.h | |
| DTC (Data Transfer Controller) register layout for the RA8D2. | |
| ra8_dual_core.h | |
| Dual-core (CPU0 / CPU1) lifecycle helper – public API. | |
| ra8_dual_core_job.h | |
| Cross-core compile-job dispatch seam + status contract (#149). | |
| ra8_elc.h | |
| Event Link Controller driver. | |
| ra8_elc_regs.h | |
| Event Link Controller (ELC) register layout for the Renesas RA8D2. | |
| ra8_epaper.h | |
| IT8951 e-paper controller SPI driver – public API. | |
| ra8_eth.h | |
| Ethernet Switch Module (ESWM) + frame TX/RX driver. | |
| ra8_eth_coma.h | |
| Ethernet Common Agent (COMA) driver. | |
| ra8_eth_gptp.h | |
| Ethernet Generic PTP Timer (GPTP) driver – HUM Ch 35. | |
| ra8_eth_gwca.h | |
| Ethernet CPU Agent (GWCA) driver. | |
| ra8_eth_mfwd.h | |
| Ethernet Message Forwarding Engine (MFWD) driver. | |
| ra8_etha.h | |
| Per-port Ethernet Agent (ETHA) driver – HUM Ch 32 (p 1627-1702). | |
| ra8_etha_ops.h | |
| Per-port ETHA lifecycle / IRQ / mode / queue API – HUM Ch 32 (p 1627-1702). | |
| ra8_etha_regs.h | |
| Ethernet Agent (ETHA) per-port register layout for the RA8D2. | |
| ra8_etha_shaper.h | |
| Per-port ETHA VLAN / shaper / stats / ring / PHY API – HUM Ch 32 (p 1627-1702). | |
| ra8_etha_types.h | |
| Per-port Ethernet Agent (ETHA) data types – HUM Ch 32 (p 1627-1702). | |
| ra8_ether_phy.h | |
| Generic Ethernet PHY abstraction (MDIO Clause-22 + auto-neg). | |
| ra8_ether_regs.h | |
| Ethernet controller base addresses for the Renesas RA8D2. | |
| ra8_ethosu_kernel.h | |
| First-party TFLite-micro Ethos-U custom-op registration probe (RA8P1-only). | |
| ra8_ethosu_shim.h | |
| Arm ethos-u-core-driver C API shim over the ra8_npu driver (RA8P1-only). | |
| ra8_flash.h | |
| Code MRAM + Extra MRAM + Option-Setting driver – DANGEROUS, brick-capable. | |
| ra8_flash_core.h | |
| Code MRAM + Extra MRAM + Option-Setting driver – core API. | |
| ra8_flash_fsp.h | |
| Code MRAM driver – FSP r_mram parity surface. | |
| ra8_flash_regs.h | |
| Flash / MRAM controller register layout for the Renesas RA8D2. | |
| ra8_flash_types.h | |
| Code MRAM driver – shared types (enums, structs, callback typedef). | |
| ra8_fpu_probe.h | |
| Double-precision FPU probe – codegen witness for the RA8P1 DP-FPU. | |
| ra8_glcdc.h | |
| Graphics LCD Controller driver (two-layer with alpha blending). | |
| ra8_glcdc_regs.h | |
| Graphics LCD Controller (GLCDC) register layout for the RA8D2. | |
| ra8_gpt.h | |
| Full-featured General PWM Timer (GPT) driver. | |
| ra8_gpt_capture.h | |
| GPT input-capture + external event / pulse-count extension. | |
| ra8_gpt_regs.h | |
| General PWM Timer (GPT) register layout for the Renesas RA8D2. | |
| ra8_hw_err.h | |
| Bounded wait-flag primitives for RA8D2 HAL drivers. | |
| ra8_hw_intrinsics.h | |
| Shared CPU-intrinsic seam for the HAL drivers (host/target split). | |
| ra8_i2c.h | |
| I2C Bus Interface (IIC) controller driver – polling mode. | |
| ra8_i2c_bus_ops.h | |
| Injected I2C-bus seam consumed by Ring-3 I2C device drivers. | |
| ra8_i2c_regs.h | |
| I2C Bus Interface (IIC) register layout for the Renesas RA8D2. | |
| ra8_i3c.h | |
| I3C Bus Interface driver – unified native-I3C + I2C-compat modes. | |
| ra8_i3c_i2c.h | |
| IIC_B (I3C unified IP, I2C-only mode) controller driver. | |
| ra8_i3c_i2c_peripheral.h | |
| IIC_B (I3C in I2C-only mode) peripheral driver – mirrors FSP r_iic_b_peripheral. | |
| ra8_i3c_i2c_regs.h | |
| IIC_B (I3C-based I2C) register layout for the Renesas RA8D2. | |
| ra8_i3c_regs.h | |
| I3C Bus Interface register layout for the Renesas RA8D2. | |
| ra8_icu.h | |
| Interrupt Control Unit driver (IRQ pins, NMI). | |
| ra8_icu_regs.h | |
| Interrupt Control Unit (ICU) register layout for the Renesas RA8D2. | |
| ra8_ipc.h | |
| Inter-Processor Communication (IPC) HAL driver – public API. | |
| ra8_ipc_regs.h | |
| Inter-Processor Communication (IPC) register layout for the RA8D2. | |
| ra8_ipc_sync.h | |
| Inter-Processor Communication (IPC) HAL driver – sync API. | |
| ra8_ipc_types.h | |
| Inter-Processor Communication (IPC) HAL driver – public types. | |
| ra8_ipc_xfer.h | |
| Inter-Processor Communication (IPC) HAL driver – transfer API. | |
| ra8_isr.h | |
| NVIC + ICU IELSR allocator. | |
| ra8_iwdt.h | |
| Independent Watchdog driver header. | |
| ra8_iwdt_regs.h | |
| Independent Watchdog Timer (IWDT) register layout for the RA8D2. | |
| ra8_layer3_switch.h | |
| Layer-3 Ethernet switch driver – placeholder. | |
| ra8_lpm.h | |
| Low Power Mode (LPM) HAL driver – public API. | |
| ra8_lpm_regs.h | |
| Low Power Mode (LPM) register layout for the Renesas RA8D2. | |
| ra8_lpm_safe_boot.h | |
| Self-healing LPM register reset for very early boot. | |
| ra8_lvd.h | |
| Programmable Voltage Detection (PVD / LVD) HAL driver. | |
| ra8_lvd_api.h | |
| Programmable Voltage Detection (PVD / LVD) HAL function prototypes. | |
| ra8_lvd_regs.h | |
| Programmable Voltage Detection (PVD / LVD) register layout for the RA8D2. | |
| ra8_lvd_types.h | |
| Programmable Voltage Detection (PVD / LVD) HAL types. | |
| ra8_mipi_csi.h | |
| MIPI CSI-2 receiver HAL driver – public API. | |
| ra8_mipi_csi_ctrl.h | |
| MIPI CSI-2 receiver HAL driver – control, status, and IRQ-enable API. | |
| ra8_mipi_csi_isr.h | |
| MIPI CSI-2 receiver HAL driver – FIFO, ISR dispatch, framing, power. | |
| ra8_mipi_csi_regs.h | |
| MIPI CSI-2 Receiver register layout for the RA8D2 (HUM Ch 66). | |
| ra8_mipi_csi_types.h | |
| MIPI CSI-2 receiver HAL driver – public types. | |
| ra8_mipi_dsi.h | |
| MIPI DSI-2 host driver – public API (full HUM Ch 65 surface). | |
| ra8_mipi_dsi_api.h | |
| MIPI DSI-2 host driver – public function surface (full HUM Ch 65). | |
| ra8_mipi_dsi_regs.h | |
| MIPI DSI Host (DSI-2) register layout for the RA8D2. | |
| ra8_mipi_dsi_types.h | |
| MIPI DSI-2 host driver – public types (enums / structs / typedefs). | |
| ra8_mipi_phy.h | |
| MIPI D-PHY driver – physical layer shared by DSI and CSI. | |
| ra8_mipi_phy_api.h | |
| MIPI D-PHY driver – public function prototypes. | |
| ra8_mipi_phy_ops.h | |
| MIPI D-PHY driver – runtime operations prototypes. | |
| ra8_mipi_phy_regs.h | |
| MIPI D-PHY register layout for the RA8D2. | |
| ra8_mipi_phy_types.h | |
| MIPI D-PHY driver – shared enums, structs, and callback typedef. | |
| ra8_mpc.h | |
| Multi-function Pin Controller (MPC) facade. | |
| ra8_mpu_regs.h | |
| Memory Protection Unit register layout for the Renesas RA8D2. | |
| ra8_mrms_regs.h | |
| MRAM Memory System (MRMS) wait-state register layout for the RA8D2. | |
| ra8_mstp.h | |
| Ref-counted Module Stop Control wrapper for the RA8D2. | |
| ra8_mstp_regs.h | |
| Module Stop Control (MSTP) register layout for the Renesas RA8D2. | |
| ra8_npu.h | |
| Arm Ethos-U55 NPU command/queue driver foundation (RA8P1-only). | |
| ra8_npu_blob.h | |
| .npub linkable-blob container for a Vela-compiled Ethos-U55 model | |
| ra8_npu_fake_cmd.h | |
| ra8_emulator / host-test command-stream convention for the Ethos-U55 model | |
| ra8_npu_loader.h | |
| On-target loader: .npub Vela blob -> ra8_npu_job_t (RA8P1-only). | |
| ra8_npu_quant.h | |
| Affine (scale + zero-point) tensor quantization for the NPU runtime. | |
| ra8_npu_regs.h | |
| Arm Ethos-U55 NPU register window on the Renesas RA8P1 (RA8P1-only). | |
| ra8_ofs.h | |
| Option Function Select (OFS) boot-map inventory for the active RA8 device. | |
| ra8_ospi_regs.h | |
| xSPI / Octo-SPI controller register layout for the Renesas RA8D2 | |
| ra8_pcntr.h | |
| CPU1-safe combined direction+level PORT primitive over PCNTR1/PCNTR2. | |
| ra8_pdg.h | |
| PWM Delay Generation Circuit (PDG) driver public API. | |
| ra8_pdg_regs.h | |
| PWM Delay Generation Circuit (PDG) register layout for the Renesas RA8D2. | |
| ra8_pdm.h | |
| Pulse Density Modulation Interface (PDM-IF) capture driver. | |
| ra8_pdm_regs.h | |
| Pulse Density Modulation Interface (PDM-IF) register layout. | |
| ra8_pfs_regs.h | |
| Pin Function Select (PFS) register layout for the Renesas RA8D2. | |
| ra8_poeg.h | |
| Port Output Enable for GPT (POEG) driver. | |
| ra8_poeg_regs.h | |
| Port Output Enable for GPT (POEG) register layout for the RA8D2. | |
| ra8_port_regs.h | |
| IOPORT (GPIO) register layout for the Renesas RA8D2. | |
| ra8_port_utils.h | |
| High-level GPIO helpers on top of the PORT + PFS register layer. | |
| ra8_pwr.h | |
| Low Power Mode + clock-domain wrapper. | |
| ra8_register_protection.h | |
| Scoped PRCR unlock helper. | |
| ra8_regs.h | |
| Top-level peripheral register header for the Renesas RA8D2. | |
| ra8_reset.h | |
| Reset cause introspection + software reset trigger. | |
| ra8_reset_regs.h | |
| Reset block register layout (offsets, bit masks, accessors)for the Renesas RA8D2. | |
| ra8_rmac.h | |
| Per-port Ethernet MAC (RMAC) driver – HUM Ch 33. | |
| ra8_rmac_phy.h | |
| Reduced-MAC (RMAC) PHY driver – off-chip PHY for the GMAC-FPI. | |
| ra8_rmac_regs.h | |
| Ethernet MAC (RMAC) per-port register layout for the RA8D2. | |
| ra8_rsip.h | |
| Renesas Secure IP (RSIP-E50D) HAL driver – public API. | |
| ra8_rsip_core.h | |
| Renesas Secure IP (RSIP-E50D) HAL – core lifecycle / TRNG / hash API. | |
| ra8_rsip_key_injection.h | |
| RSIP key-injection HAL – wrap raw key material into theRSIP installed-key blob format. | |
| ra8_rsip_keys.h | |
| Renesas Secure IP (RSIP-E50D) HAL – key install + cipher / hash API. | |
| ra8_rsip_mgmt.h | |
| Renesas Secure IP (RSIP-E50D) HAL – vault / KDF / lifecycle / tamper. | |
| ra8_rsip_protected.h | |
| RSIP protected-key HAL – crypto operations driven by wrappedkey blobs (the RSIP engine never sees the raw key). | |
| ra8_rsip_regs.h | |
| Renesas Secure IP (RSIP-E50D) register layout for the RA8D2. | |
| ra8_rsip_regs_fields.h | |
| RSIP-E50D register field/value enums and the reg32 accessor. | |
| ra8_rsip_regs_offsets.h | |
| RSIP-E50D register base address, byte offsets, and layout asserts. | |
| ra8_rtc.h | |
| Real-Time Clock driver (BCD calendar mode). | |
| ra8_rtc_regs.h | |
| Real-Time Clock (RTC) register layout for the Renesas RA8D2. | |
| ra8_sci.h | |
| Full-featured Serial Communications Interface driver. | |
| ra8_sci_lin.h | |
| LIN (Local Interconnect Network) commander + responder driver on SCI_B. | |
| ra8_sci_regs.h | |
| SCI_B (Serial Communication Interface, B variant) register layoutfor the RA8D2. | |
| ra8_sci_spi.h | |
| SCI Simple-SPI controller-mode driver (polling, full-duplex). | |
| ra8_sdcard.h | |
| SD card driver layered on top of the RA8D2 SDHI peripheral. | |
| ra8_sdhi.h | |
| SD/MMC Host Interface (SDHI) driver scaffold. | |
| ra8_sdhi_regs.h | |
| SDHI (SD/MMC host interface) register layout for the Renesas RA8D2. | |
| ra8_sdramc.h | |
| External SDRAM controller driver (framework). | |
| ra8_sdramc_regs.h | |
| External SDRAM controller register layout for the Renesas RA8D2. | |
| ra8_smbus.h | |
| SMBus 3.2 protocol layer over an injected I2C bus seam. | |
| ra8_spi.h | |
| SPI_B controller driver (RA8D2 Type-B SPI peripheral). | |
| ra8_spi_bus_ops.h | |
| Injected SPI-bus seam consumed by Ring-3 SPI device drivers. | |
| ra8_spi_regs.h | |
| SPI_B register layout for the Renesas RA8D2. | |
| ra8_sram.h | |
| SRAM (with ECC) HAL driver public API. | |
| ra8_sram_regs.h | |
| SRAM (with ECC) control / status / security register layout. | |
| ra8_ssie.h | |
| Serial Sound Interface Enhanced (SSIE / I2S audio) driver. | |
| ra8_ssie_regs.h | |
| Serial Sound Interface Enhanced (SSIE) register layout for the RA8D2. | |
| ra8_system_regs.h | |
| System Control (SYSC) register layout for the Renesas RA8D2. | |
| ra8_touch.h | |
| Multi-touch input driver – GoodIX GT911 backend. | |
| ra8_touch_gt911_regs.h | |
| Register layout for the GoodIX GT911 capacitive touch controller. | |
| ra8_tsn.h | |
| On-chip Temperature Sensor (TSN) driver. | |
| ra8_tsn_regs.h | |
| Temperature Sensor (TSN) register layout for the Renesas RA8D2. | |
| ra8_ulpt.h | |
| Ultra-Low-Power Timer (ULPT) driver header. | |
| ra8_ulpt_regs.h | |
| Ultra-Low-Power Timer (ULPT) register layout for the Renesas RA8D2. | |
| ra8_usb.h | |
| Native USB controller driver public API (device + host modes). | |
| ra8_usb_cdc.h | |
| Native USB CDC ACM (Communications Device Class - AbstractControl Model) class layer. | |
| ra8_usb_composite.h | |
| Native USB device-side composite-class layer. | |
| ra8_usb_device.h | |
| Native USB controller driver public API – shared types + device mode. | |
| ra8_usb_haud.h | |
| Native USB host-side Audio class layer (USB Audio 1.0). | |
| ra8_usb_hcdc.h | |
| Native USB host-side CDC ACM (Communications Device Class -Abstract Control Model) class layer. | |
| ra8_usb_hcdc_ecm.h | |
| Native USB host-side CDC ECM (Communications Device Class -Ethernet Networking Control Model) class layer. | |
| ra8_usb_hhid.h | |
| Native USB host-side HID (Human Interface Device) class layer. | |
| ra8_usb_hhub.h | |
| Native USB host-side HUB class layer. | |
| ra8_usb_hmsc.h | |
| Native USB host-side MSC (Mass Storage Class) class layer. | |
| ra8_usb_host.h | |
| Native USB controller driver public API – host-mode bring-up. | |
| ra8_usb_paud.h | |
| Native USB device-side Audio (UAC) class layer. | |
| ra8_usb_phid.h | |
| Native USB device-side HID (Human Interface Device) class layer. | |
| ra8_usb_pmsc.h | |
| Native USB device-side MSC (Mass Storage Class) class layer. | |
| ra8_usb_pprn.h | |
| Native USB device-side Printer class layer. | |
| ra8_usb_pvnd.h | |
| Native USB device-side Vendor-defined class layer. | |
| ra8_usb_regs.h | |
| USB Full-Speed + High-Speed controller layout for the Renesas RA8D2. | |
| ra8_vin.h | |
| Video Input Module (VIN) driver – public API. | |
| ra8_vin_api.h | |
| Video Input Module (VIN) driver function prototypes. | |
| ra8_vin_regs.h | |
| Video Input Module (VIN) register layout for the RA8D2. | |
| ra8_vin_types.h | |
| Video Input Module (VIN) configuration descriptors and types. | |
| ra8_vreg.h | |
| Internal Voltage Regulator (DCDC / LDO) driver – full HUM Ch 68 surface. | |
| ra8_vreg_regs.h | |
| Internal Voltage Regulator (VREG / DCDC / LDO) register layout for RA8D2. | |
| ra8_wdt.h | |
| Software Watchdog Timer (WDT) driver header. | |
| ra8_wdt_regs.h | |
| Watchdog Timer (WDT) register layout for the RA8D2. | |
| ra8_xspi.h | |
| xSPI / Octo-SPI driver (flash read/program/erase + ID/status) | |