ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_mrms_regs.h File Reference
Hardware Abstraction Layer » System, clocks & power

MRAM Memory System (MRMS) wait-state register layout for the RA8D2. More...

#include <stdint.h>
Include dependency graph for ra8_mrms_regs.h:
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Go to the source code of this file.

Enumerations

enum  ra8_mrms_addr_t : uintptr_t { k_ra8_mrms_base_addr = 0x4013C000UL }
 Base address for the MRMS register block. More...
enum  ra8_mrms_offset_t : uint16_t {
  k_ra8_mrms_off_mrcpfb = 0x000U ,
  k_ra8_mrms_off_mrcfreq = 0x004U ,
  k_ra8_mrms_off_mrefreq = 0x008U
}
 Per-register offsets relative to k_ra8_mrms_base_addr. More...
enum  ra8_mrms_key_t : uint32_t {
  k_ra8_mrcfreq_key = 0x1E000000UL ,
  k_ra8_mrefreq_key = 0xE1000000UL
}
 Mandatory key bytes that must occupy the upper byte of MRCFREQ / MREFREQ for hardware to accept the write. More...
enum  ra8_mrms_pfb_t : uint32_t {
  k_ra8_mrcpfb_disable = 0x00000000UL ,
  k_ra8_mrcpfb_enable = 0x00000001UL
}
 Values written to MRCPFB to enable / disable the prefetch buffer. More...
enum  ra8_mrms_pfb_threshold_t : uint32_t { k_ra8_mrcpfb_threshold_mhz = 100UL }
 MRICLK frequency threshold below which the prefetch buffer must remain disabled. More...

Functions

static volatile uint32_t * ra8_mrms_mrcpfb (void)
 Get pointer to the 32-bit MRCPFB register.
static volatile uint32_t * ra8_mrms_mrcfreq (void)
 Get pointer to the 32-bit MRCFREQ register (MRICLK frequency).
static volatile uint32_t * ra8_mrms_mrefreq (void)
 Get pointer to the 32-bit MREFREQ register (MRPCLK frequency).

Detailed Description

MRAM Memory System (MRMS) wait-state register layout for the RA8D2.

The Renesas RA8 Gen2 family does not expose the legacy MEMWAIT / FLDWAITR / FLWT registers (bsp_feature.h set BSP_FEATURE_CGC_HAS_MEMWAIT = 0, HAS_FLDWAITR = 0, HAS_FLWT = 0). Wait states for the on-chip MRAM are programmed through a dedicated MRMS (MRAM Memory System) register block at 0x4013C000.

The CGC bring-up sequence (HUM Ch 54.4.3 "Frequency Change Procedure for MRAM" / FSP bsp_clocks.c) requires:

  1. Clear the prefetch buffer (write MRCPFB = 0, then 3 dummy reads) before changing any clock source or divider.
  2. Programme MRCFREQ with the new MRICLK frequency in MHz, with the key byte 0x1E in the upper byte. The hardware refuses any write whose key byte is not 0x1E, so the write is wrapped in a poll-until-readback loop.
  3. Programme MREFREQ with the new MRPCLK frequency in MHz, with key byte 0xE1 (note: not the same key as MRCFREQ).
  4. After the new clock tree is selected, re-enable the prefetch buffer (MRCPFB = 1) iff the new MRICLK is greater than or equal to 100 MHz.

Register map

Offset Reg Width Notes
0x000 MRCPFB 32 Prefetch buffer enable (0 or 1).
0x004 MRCFREQ 32 MRICLK frequency in MHz, upper byte = 0x1E.
0x008 MREFREQ 32 MRPCLK frequency in MHz, upper byte = 0xE1.
Copyright
Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_mrms_regs.h.

Enumeration Type Documentation

◆ ra8_mrms_addr_t

enum ra8_mrms_addr_t : uintptr_t

Base address for the MRMS register block.

Enumerator
k_ra8_mrms_base_addr 

R_MRMS base.

Definition at line 58 of file ra8_mrms_regs.h.

◆ ra8_mrms_key_t

enum ra8_mrms_key_t : uint32_t

Mandatory key bytes that must occupy the upper byte of MRCFREQ / MREFREQ for hardware to accept the write.

Cited from FSP bsp_clocks.c (BSP_PRV_MRCFREQ_KEY / BSP_PRV_MREFREQ_KEY). MRCFREQ uses 0x1E in the upper byte; MREFREQ uses 0xE1. Writes whose key byte is anything else are silently dropped (the register continues to read back its previous value).

Enumerator
k_ra8_mrcfreq_key 

MRCFREQ unlock key, upper byte = 0x1E.

k_ra8_mrefreq_key 

MREFREQ unlock key, upper byte = 0xE1.

Definition at line 93 of file ra8_mrms_regs.h.

◆ ra8_mrms_offset_t

enum ra8_mrms_offset_t : uint16_t

Per-register offsets relative to k_ra8_mrms_base_addr.

Enumerator
k_ra8_mrms_off_mrcpfb 

MRCPFB prefetch buffer enable.

k_ra8_mrms_off_mrcfreq 

MRCFREQ MRICLK frequency latch (key 0x1E).

k_ra8_mrms_off_mrefreq 

MREFREQ MRPCLK frequency latch (key 0xE1).

Definition at line 71 of file ra8_mrms_regs.h.

◆ ra8_mrms_pfb_t

enum ra8_mrms_pfb_t : uint32_t

Values written to MRCPFB to enable / disable the prefetch buffer.

The prefetch buffer must be disabled before any frequency change (HUM Ch 54.4.3) and re-enabled only after the new MRICLK has settled and only if MRICLK >= 100 MHz.

Enumerator
k_ra8_mrcpfb_disable 

Prefetch buffer off.

k_ra8_mrcpfb_enable 

Prefetch buffer on.

Definition at line 107 of file ra8_mrms_regs.h.

◆ ra8_mrms_pfb_threshold_t

enum ra8_mrms_pfb_threshold_t : uint32_t

MRICLK frequency threshold below which the prefetch buffer must remain disabled.

FSP bsp_clocks.c (BSP_PRV_MRCPFB_LIMIT == 100): only enable the prefetch buffer when MRCFREQ reads back a value >= 100 MHz.

Enumerator
k_ra8_mrcpfb_threshold_mhz 

Minimum MRICLK MHz to enable PFB.

Definition at line 121 of file ra8_mrms_regs.h.

Function Documentation

◆ ra8_mrms_mrcfreq()

volatile uint32_t * ra8_mrms_mrcfreq ( void )
inlinestatic

Get pointer to the 32-bit MRCFREQ register (MRICLK frequency).

Returns
Volatile pointer to MRCFREQ at 0x4013C004.
Precondition
MRMS clock domain is active.
Postcondition
Caller may read or write the register; writes must include the 0x1E key in the upper byte.
Note
Not thread-safe.
Since
0.1.0

Definition at line 161 of file ra8_mrms_regs.h.

References k_ra8_mrms_base_addr, and k_ra8_mrms_off_mrcfreq.

Referenced by internal_set_mrm_wait_states(), and internal_set_pfb().

◆ ra8_mrms_mrcpfb()

volatile uint32_t * ra8_mrms_mrcpfb ( void )
inlinestatic

Get pointer to the 32-bit MRCPFB register.

Returns
Volatile pointer to MRCPFB at 0x4013C000.
Precondition
MRMS clock domain is active (always-on out of reset).
Postcondition
Caller may read or write the register.
Note
Not thread-safe. Caller must serialise with any other CGC bring-up code touching MRMS.
Since
0.1.0

Definition at line 143 of file ra8_mrms_regs.h.

References k_ra8_mrms_base_addr, and k_ra8_mrms_off_mrcpfb.

Referenced by internal_clear_pfb(), and internal_set_pfb().

◆ ra8_mrms_mrefreq()

volatile uint32_t * ra8_mrms_mrefreq ( void )
inlinestatic

Get pointer to the 32-bit MREFREQ register (MRPCLK frequency).

Returns
Volatile pointer to MREFREQ at 0x4013C008.
Precondition
MRMS clock domain is active.
Postcondition
Caller may read or write the register; writes must include the 0xE1 key in the upper byte.
Note
Not thread-safe.
Since
0.1.0

Definition at line 179 of file ra8_mrms_regs.h.

References k_ra8_mrms_base_addr, and k_ra8_mrms_off_mrefreq.

Referenced by internal_set_mrm_wait_states().