42typedef enum : uintptr_t {
123 volatile uint8_t
CP[48];
135typedef enum : uint8_t {
148 "r_rtc_regs_t must be 128 bytes");
168typedef enum : uint8_t {
186typedef enum : uint8_t {
201typedef enum : uint8_t {
ra8_rcr1_bit_t
Bit positions in RCR1 (HUM Ch 26.2.3 p 1229).
@ k_ra8_rcr1_bit_cie
Carry interrupt enable.
@ k_ra8_rcr1_bit_pes_lo
PES[3:0] periodic select (b4..b7).
@ k_ra8_rcr1_bit_aie
Alarm interrupt enable.
@ k_ra8_rcr1_bit_rtcos
RTCOUT output select.
@ k_ra8_rcr1_bit_pie
Periodic interrupt enable.
ra8_rcr2_bit_t
Bit positions in RCR2 (HUM Ch 26.2.4 p 1230).
@ k_ra8_rcr2_bit_cntmd
0=calendar, 1=binary.
@ k_ra8_rcr2_bit_aadjp
Auto-adjust period select.
@ k_ra8_rcr2_bit_adj30
30-second adjustment.
@ k_ra8_rcr2_bit_reset
Software reset (write 1, auto-clear).
@ k_ra8_rcr2_bit_aadje
Auto-adjust enable.
@ k_ra8_rcr2_bit_hr24
1=24h, 0=12h.
@ k_ra8_rcr2_bit_rtcoe
RTCOUT output enable.
@ k_ra8_rcr2_bit_start
0=stop, 1=run.
ra8_rcr4_bit_t
Bit positions in RCR4 (HUM Ch 26.2.6 p 1232 area).
@ k_ra8_rcr4_bit_rcksel
Count source select.
@ k_ra8_rcr4_bit_ropsel
RTC operation mode select.
ra8_rtc_layout_t
Authoritative struct offsets used by the layout asserts below.
@ k_ra8_rtc_layout_size
Block size in bytes.
@ k_ra8_rtc_layout_off_radj
RADJ offset.
@ k_ra8_rtc_layout_off_rcr1
RCR1 offset.
@ k_ra8_rtc_layout_off_rcr2
RCR2 offset.
@ k_ra8_rtc_layout_off_rcr4
RCR4 offset.
@ k_ra8_rtc_layout_off_cp
CP[0] offset.
@ k_ra8_rtc_layout_off_rtccr
RTCCR[0] offset.
@ k_ra8_rtc_layout_off_rfrh
RFRH offset.
static volatile r_rtc_regs_t * ra8_rtc(void)
Get pointer to the RTC block.
@ k_ra8_rtc_base_addr
RA8 rtc base address.
RTC register window matching FSP R_RTC_Type byte-for-byte.
volatile uint8_t _r1
+0x03 reserved.
volatile uint8_t RTCCR[12]
+0x40..+0x4F: RTCCR[3] – Time Capture Control Register (3 ch x 0x04 stride).
volatile uint8_t RWKCNT
+0x08 Day-of-Week Counter / BCNT3.
volatile uint8_t R64CNT
+0x00 64 Hz Counter (read-only).
volatile uint16_t _r16[2]
Reserved.
volatile uint8_t _rd
+0x1F reserved.
volatile uint8_t RHRAR
+0x14 Hour Alarm (BCD) / BCNT2AR.
volatile uint8_t RMINCNT
+0x04 Minute Counter (BCD) / BCNT1.
volatile uint8_t RSECCNT
+0x02 Second Counter (BCD) / BCNT0.
volatile uint8_t _r7
+0x11 reserved.
volatile uint8_t _r9
+0x15 reserved.
volatile uint8_t _r12[3]
+0x25..+0x27 reserved.
volatile uint8_t RDAYCNT
+0x0A Day Counter (BCD).
volatile uint8_t _r5
+0x0B reserved.
volatile uint8_t _r4
+0x09 reserved.
volatile uint8_t RMINAR
+0x12 Minute Alarm (BCD) / BCNT1AR.
volatile uint8_t RCR4
+0x28 Control 4 (count source / mode).
volatile uint8_t CP[48]
+0x50..+0x7F: CP[3] – Capture registers (sec, min, hour, day, month).
volatile uint8_t RMONAR
+0x1A Month Alarm (BCD) / BCNT1AER.
volatile uint16_t _r15[7]
Reserved.
volatile uint8_t RYRAREN
+0x1E Year Alarm Enable / BCNT3AER.
volatile uint8_t _r6
+0x0D reserved.
volatile uint8_t RCR1
+0x22 Control 1 (IRQ enables, PES).
volatile uint8_t RCR2
+0x24 Control 2 (START/RESET/HR24/...).
volatile uint16_t RYRCNT
+0x0E Year Counter (BCD, 16-bit).
volatile uint8_t RADJ
+0x2E Time Error Adjustment.
volatile uint8_t _rb
+0x19 reserved.
volatile uint8_t _r11
+0x23 reserved.
volatile uint8_t _rc
+0x1B reserved.
volatile uint8_t RHRCNT
+0x06 Hour Counter (BCD) / BCNT2.
volatile uint8_t _ra
+0x17 reserved.
volatile uint8_t _r0
+0x01 reserved.
volatile uint8_t RWKAR
+0x16 Day-of-Week Alarm / BCNT3AR.
volatile uint16_t RFRL
+0x2C Frequency Register L (RFC[15:0]).
volatile uint16_t RYRAR
+0x1C Year Alarm (BCD) / BCNT2AER.
volatile uint8_t RDAYAR
+0x18 Day Alarm (BCD) / BCNT0AER.
volatile uint8_t _r10[2]
+0x20..+0x21 reserved.
volatile uint8_t RSECAR
+0x10 Second Alarm (BCD) / BCNT0AR.
volatile uint8_t _r3
+0x07 reserved.
volatile uint8_t _r13
+0x29 reserved.
volatile uint16_t RADJ2
+0x30 Time Error Adjustment 2 (FADJ).
volatile uint8_t _r8
+0x13 reserved.
volatile uint8_t RMONCNT
+0x0C Month Counter (BCD).
volatile uint16_t RFRH
+0x2A Frequency Register H (RFC16).
volatile uint8_t _r2
+0x05 reserved.
volatile uint8_t _r14
+0x2F reserved.