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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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RTC register window matching FSP R_RTC_Type byte-for-byte. More...
#include <ra8_rtc_regs.h>
Data Fields | |
| volatile uint8_t | R64CNT |
| +0x00 64 Hz Counter (read-only). | |
| volatile uint8_t | _r0 |
| +0x01 reserved. | |
| volatile uint8_t | RSECCNT |
| +0x02 Second Counter (BCD) / BCNT0. | |
| volatile uint8_t | _r1 |
| +0x03 reserved. | |
| volatile uint8_t | RMINCNT |
| +0x04 Minute Counter (BCD) / BCNT1. | |
| volatile uint8_t | _r2 |
| +0x05 reserved. | |
| volatile uint8_t | RHRCNT |
| +0x06 Hour Counter (BCD) / BCNT2. | |
| volatile uint8_t | _r3 |
| +0x07 reserved. | |
| volatile uint8_t | RWKCNT |
| +0x08 Day-of-Week Counter / BCNT3. | |
| volatile uint8_t | _r4 |
| +0x09 reserved. | |
| volatile uint8_t | RDAYCNT |
| +0x0A Day Counter (BCD). | |
| volatile uint8_t | _r5 |
| +0x0B reserved. | |
| volatile uint8_t | RMONCNT |
| +0x0C Month Counter (BCD). | |
| volatile uint8_t | _r6 |
| +0x0D reserved. | |
| volatile uint16_t | RYRCNT |
| +0x0E Year Counter (BCD, 16-bit). | |
| volatile uint8_t | RSECAR |
| +0x10 Second Alarm (BCD) / BCNT0AR. | |
| volatile uint8_t | _r7 |
| +0x11 reserved. | |
| volatile uint8_t | RMINAR |
| +0x12 Minute Alarm (BCD) / BCNT1AR. | |
| volatile uint8_t | _r8 |
| +0x13 reserved. | |
| volatile uint8_t | RHRAR |
| +0x14 Hour Alarm (BCD) / BCNT2AR. | |
| volatile uint8_t | _r9 |
| +0x15 reserved. | |
| volatile uint8_t | RWKAR |
| +0x16 Day-of-Week Alarm / BCNT3AR. | |
| volatile uint8_t | _ra |
| +0x17 reserved. | |
| volatile uint8_t | RDAYAR |
| +0x18 Day Alarm (BCD) / BCNT0AER. | |
| volatile uint8_t | _rb |
| +0x19 reserved. | |
| volatile uint8_t | RMONAR |
| +0x1A Month Alarm (BCD) / BCNT1AER. | |
| volatile uint8_t | _rc |
| +0x1B reserved. | |
| volatile uint16_t | RYRAR |
| +0x1C Year Alarm (BCD) / BCNT2AER. | |
| volatile uint8_t | RYRAREN |
| +0x1E Year Alarm Enable / BCNT3AER. | |
| volatile uint8_t | _rd |
| +0x1F reserved. | |
| volatile uint8_t | _r10 [2] |
| +0x20..+0x21 reserved. | |
| volatile uint8_t | RCR1 |
| +0x22 Control 1 (IRQ enables, PES). | |
| volatile uint8_t | _r11 |
| +0x23 reserved. | |
| volatile uint8_t | RCR2 |
| +0x24 Control 2 (START/RESET/HR24/...). | |
| volatile uint8_t | _r12 [3] |
| +0x25..+0x27 reserved. | |
| volatile uint8_t | RCR4 |
| +0x28 Control 4 (count source / mode). | |
| volatile uint8_t | _r13 |
| +0x29 reserved. | |
| volatile uint16_t | RFRH |
| +0x2A Frequency Register H (RFC16). | |
| volatile uint16_t | RFRL |
| +0x2C Frequency Register L (RFC[15:0]). | |
| volatile uint8_t | RADJ |
| +0x2E Time Error Adjustment. | |
| volatile uint8_t | _r14 |
| +0x2F reserved. | |
| volatile uint16_t | RADJ2 |
| +0x30 Time Error Adjustment 2 (FADJ). | |
| volatile uint16_t | _r15 [7] |
| Reserved. | |
| volatile uint8_t | RTCCR [12] |
| +0x40..+0x4F: RTCCR[3] – Time Capture Control Register (3 ch x 0x04 stride). | |
| volatile uint16_t | _r16 [2] |
| Reserved. | |
| volatile uint8_t | CP [48] |
| +0x50..+0x7F: CP[3] – Capture registers (sec, min, hour, day, month). | |
RTC register window matching FSP R_RTC_Type byte-for-byte.
Offsets follow HUM Ch 26 "Realtime Clock (RTC)" and FSP R_RTC_Type (size 0x80). Gaps between registers are modelled with _rN reserved fields so the struct layout matches the hardware byte-for-byte.
In binary-count mode the calendar fields RSECCNT..RWKCNT alias as BCNT0..BCNT3 (32-bit counter), and RSECAR..RWKAR alias as BCNT0AR..BCNT3AR. The driver in this tree only exposes calendar mode, so the calendar-mode names are used throughout.
Definition at line 61 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r0 |
+0x01 reserved.
Definition at line 63 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r1 |
+0x03 reserved.
Definition at line 65 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r10[2] |
+0x20..+0x21 reserved.
Definition at line 94 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r11 |
+0x23 reserved.
Definition at line 96 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r12[3] |
+0x25..+0x27 reserved.
Definition at line 98 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r13 |
+0x29 reserved.
Definition at line 100 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r14 |
+0x2F reserved.
Definition at line 104 of file ra8_rtc_regs.h.
| volatile uint16_t r_rtc_regs_t::_r15[7] |
Reserved.
Definition at line 108 of file ra8_rtc_regs.h.
| volatile uint16_t r_rtc_regs_t::_r16[2] |
Reserved.
Definition at line 117 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r2 |
+0x05 reserved.
Definition at line 67 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r3 |
+0x07 reserved.
Definition at line 69 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r4 |
+0x09 reserved.
Definition at line 71 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r5 |
+0x0B reserved.
Definition at line 73 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r6 |
+0x0D reserved.
Definition at line 75 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r7 |
+0x11 reserved.
Definition at line 79 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r8 |
+0x13 reserved.
Definition at line 81 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_r9 |
+0x15 reserved.
Definition at line 83 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_ra |
+0x17 reserved.
Definition at line 85 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_rb |
+0x19 reserved.
Definition at line 87 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_rc |
+0x1B reserved.
Definition at line 89 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::_rd |
+0x1F reserved.
Definition at line 92 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::CP[48] |
+0x50..+0x7F: CP[3] – Capture registers (sec, min, hour, day, month).
Each channel is 0x10 bytes; modelled as raw bytes.
Definition at line 123 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::R64CNT |
+0x00 64 Hz Counter (read-only).
Definition at line 62 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::RADJ |
+0x2E Time Error Adjustment.
Definition at line 103 of file ra8_rtc_regs.h.
| volatile uint16_t r_rtc_regs_t::RADJ2 |
+0x30 Time Error Adjustment 2 (FADJ).
Definition at line 105 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::RCR1 |
+0x22 Control 1 (IRQ enables, PES).
Definition at line 95 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_clear_status(), ra8_rtc_deinit(), ra8_rtc_init(), and ra8_rtc_set_irq_enable().
| volatile uint8_t r_rtc_regs_t::RCR2 |
+0x24 Control 2 (START/RESET/HR24/...).
Definition at line 97 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_clock_init(), ra8_rtc_deinit(), ra8_rtc_enter_stop(), ra8_rtc_exit_stop(), ra8_rtc_init(), and ra8_rtc_set().
| volatile uint8_t r_rtc_regs_t::RCR4 |
+0x28 Control 4 (count source / mode).
Definition at line 99 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_clock_init().
| volatile uint8_t r_rtc_regs_t::RDAYAR |
+0x18 Day Alarm (BCD) / BCNT0AER.
Definition at line 86 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RDAYCNT |
+0x0A Day Counter (BCD).
Definition at line 72 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().
| volatile uint16_t r_rtc_regs_t::RFRH |
+0x2A Frequency Register H (RFC16).
Definition at line 101 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_clock_init().
| volatile uint16_t r_rtc_regs_t::RFRL |
+0x2C Frequency Register L (RFC[15:0]).
Definition at line 102 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_clock_init().
| volatile uint8_t r_rtc_regs_t::RHRAR |
+0x14 Hour Alarm (BCD) / BCNT2AR.
Definition at line 82 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RHRCNT |
+0x06 Hour Counter (BCD) / BCNT2.
Definition at line 68 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().
| volatile uint8_t r_rtc_regs_t::RMINAR |
+0x12 Minute Alarm (BCD) / BCNT1AR.
Definition at line 80 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RMINCNT |
+0x04 Minute Counter (BCD) / BCNT1.
Definition at line 66 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().
| volatile uint8_t r_rtc_regs_t::RMONAR |
+0x1A Month Alarm (BCD) / BCNT1AER.
Definition at line 88 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RMONCNT |
+0x0C Month Counter (BCD).
Definition at line 74 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().
| volatile uint8_t r_rtc_regs_t::RSECAR |
+0x10 Second Alarm (BCD) / BCNT0AR.
Definition at line 78 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RSECCNT |
+0x02 Second Counter (BCD) / BCNT0.
Definition at line 64 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().
| volatile uint8_t r_rtc_regs_t::RTCCR[12] |
+0x40..+0x4F: RTCCR[3] – Time Capture Control Register (3 ch x 0x04 stride).
Modelled here as a plain byte array to keep the struct size correct without pulling the bit-field union in.
Definition at line 115 of file ra8_rtc_regs.h.
| volatile uint8_t r_rtc_regs_t::RWKAR |
+0x16 Day-of-Week Alarm / BCNT3AR.
Definition at line 84 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RWKCNT |
+0x08 Day-of-Week Counter / BCNT3.
Definition at line 70 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().
| volatile uint16_t r_rtc_regs_t::RYRAR |
+0x1C Year Alarm (BCD) / BCNT2AER.
Definition at line 90 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint8_t r_rtc_regs_t::RYRAREN |
+0x1E Year Alarm Enable / BCNT3AER.
Definition at line 91 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_set_alarm().
| volatile uint16_t r_rtc_regs_t::RYRCNT |
+0x0E Year Counter (BCD, 16-bit).
Definition at line 76 of file ra8_rtc_regs.h.
Referenced by ra8_rtc_get(), and ra8_rtc_set().