ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_rsip_regs_offsets.h File Reference

RSIP-E50D register base address, byte offsets, and layout asserts. More...

#include <stddef.h>
#include <stdint.h>
Include dependency graph for ra8_rsip_regs_offsets.h:
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Go to the source code of this file.

Macros

#define RA8_RSIP_ASSERT_ALIGN(off_)
 RA8 RSIP ASSERT ALIGN.
#define RA8_RSIP_ASSERT_IN_WIN(off_, lo_, hi_)
 RA8 RSIP ASSERT IN WIN.

Enumerations

enum  ra8_rsip_addr_t : uintptr_t { k_ra8_rsip_base_addr = 0x403B0000UL }
 Memory-mapped base address for the RSIP-E50D engine. More...
enum  ra8_rsip_off_t : uint16_t {
  k_ra8_rsip_off_ctrl = 0x0000U ,
  k_ra8_rsip_off_status = 0x0004U ,
  k_ra8_rsip_off_ier = 0x0008U ,
  k_ra8_rsip_off_isr = 0x000CU ,
  k_ra8_rsip_off_bist = 0x0010U ,
  k_ra8_rsip_off_tamper_ctrl = 0x0014U ,
  k_ra8_rsip_off_tamper_status = 0x0018U ,
  k_ra8_rsip_off_dpa_ctrl = 0x001CU ,
  k_ra8_rsip_off_dotf0_ctrl = 0x0030U ,
  k_ra8_rsip_off_dotf1_ctrl = 0x0034U ,
  k_ra8_rsip_off_oem_bl_ver = 0x0050U ,
  k_ra8_rsip_off_oem_bl_inc = 0x0054U ,
  k_ra8_rsip_off_oem_bl_lock = 0x0058U ,
  k_ra8_rsip_off_huk_ctrl = 0x0070U ,
  k_ra8_rsip_off_uid_ctrl = 0x0074U ,
  k_ra8_rsip_off_kdf_ctrl = 0x0090U ,
  k_ra8_rsip_off_kdf_status = 0x0094U ,
  k_ra8_rsip_off_kdf_label = 0x0098U ,
  k_ra8_rsip_off_kdf_out = 0x009CU ,
  k_ra8_rsip_off_life_state = 0x00C0U ,
  k_ra8_rsip_off_debug_level = 0x00C4U ,
  k_ra8_rsip_off_mbox_op = 0x0100U ,
  k_ra8_rsip_off_mbox_arg0 = 0x0104U ,
  k_ra8_rsip_off_mbox_arg1 = 0x0108U ,
  k_ra8_rsip_off_mbox_arg2 = 0x010CU ,
  k_ra8_rsip_off_mbox_arg3 = 0x0110U ,
  k_ra8_rsip_off_mbox_ret = 0x0140U ,
  k_ra8_rsip_off_data_in0 = 0x1400U ,
  k_ra8_rsip_off_data_in1 = 0x1404U ,
  k_ra8_rsip_off_data_in2 = 0x1408U ,
  k_ra8_rsip_off_data_in3 = 0x140CU ,
  k_ra8_rsip_off_data_out0 = 0x1410U ,
  k_ra8_rsip_off_data_out1 = 0x1414U ,
  k_ra8_rsip_off_data_out2 = 0x1418U ,
  k_ra8_rsip_off_data_out3 = 0x141CU ,
  k_ra8_rsip_off_key_stage = 0x1420U ,
  k_ra8_rsip_off_key_op_status = 0x1424U ,
  k_ra8_rsip_off_rnd_ctrl = 0x1440U ,
  k_ra8_rsip_off_rnd_status = 0x1444U ,
  k_ra8_rsip_off_rnd_data = 0x1458U ,
  k_ra8_rsip_off_hash_ctrl = 0x1600U ,
  k_ra8_rsip_off_hash_status = 0x1604U ,
  k_ra8_rsip_off_hash_data_in = 0x1608U ,
  k_ra8_rsip_off_hash_digest = 0x1610U ,
  k_ra8_rsip_off_hash_hmac = 0x1660U ,
  k_ra8_rsip_off_asym_ctrl = 0x1700U ,
  k_ra8_rsip_off_asym_status = 0x1704U ,
  k_ra8_rsip_off_asym_curve = 0x1708U ,
  k_ra8_rsip_off_asym_arg = 0x170CU ,
  k_ra8_rsip_off_asym_key = 0x1710U ,
  k_ra8_rsip_off_asym_msg_in = 0x1714U ,
  k_ra8_rsip_off_asym_sig_in = 0x1718U ,
  k_ra8_rsip_off_asym_sig_out = 0x171CU ,
  k_ra8_rsip_off_asym_pub_x = 0x1720U ,
  k_ra8_rsip_off_asym_pub_y = 0x1724U ,
  k_ra8_rsip_off_asym_shared = 0x1728U ,
  k_ra8_rsip_off_asym_rsa_size = 0x172CU ,
  k_ra8_rsip_off_kv_ctrl = 0x1800U ,
  k_ra8_rsip_off_kv_slot = 0x1804U ,
  k_ra8_rsip_off_kv_data = 0x1808U ,
  k_ra8_rsip_off_kv_count = 0x180CU ,
  k_ra8_rsip_off_kw_ctrl = 0x1900U ,
  k_ra8_rsip_off_kw_kek = 0x1904U ,
  k_ra8_rsip_off_kw_iv0 = 0x1908U ,
  k_ra8_rsip_off_kw_iv1 = 0x190CU ,
  k_ra8_rsip_off_kw_iv2 = 0x1910U ,
  k_ra8_rsip_off_kw_iv3 = 0x1914U ,
  k_ra8_rsip_off_kw_handle = 0x1918U ,
  k_ra8_rsip_off_kw_blob_in = 0x191CU ,
  k_ra8_rsip_off_kw_blob_out = 0x1920U ,
  k_ra8_rsip_off_sym_ctrl = 0x1500U ,
  k_ra8_rsip_off_sym_status = 0x1504U ,
  k_ra8_rsip_off_sym_keyh = 0x1508U ,
  k_ra8_rsip_off_sym_iv0 = 0x150CU ,
  k_ra8_rsip_off_sym_iv1 = 0x1510U ,
  k_ra8_rsip_off_sym_iv2 = 0x1514U ,
  k_ra8_rsip_off_sym_iv3 = 0x1518U ,
  k_ra8_rsip_off_sym_aad_in = 0x151CU ,
  k_ra8_rsip_off_sym_tag = 0x1520U ,
  k_ra8_rsip_off_sym_aad_len = 0x1524U ,
  k_ra8_rsip_off_sym_pt_len = 0x1528U ,
  k_ra8_rsip_off_kdf_info = 0x00A0U ,
  k_ra8_rsip_off_kdf_salt = 0x00A4U ,
  k_ra8_rsip_off_kdf_len = 0x00A8U ,
  k_ra8_rsip_off_kdf_ikm = 0x00ACU ,
  k_ra8_rsip_off_oem_ctrl = 0x1A00U ,
  k_ra8_rsip_off_oem_arg = 0x1A04U ,
  k_ra8_rsip_off_oem_iv = 0x1A08U ,
  k_ra8_rsip_off_cmd_fifo = 0x1B00U
}
 Byte offsets of every register the HAL touches. More...
enum  ra8_rsip_window_t : uint16_t {
  k_ra8_rsip_win_ctrl_lo = 0x0000U ,
  k_ra8_rsip_win_ctrl_hi = 0x00FFU ,
  k_ra8_rsip_win_mbox_lo = 0x0100U ,
  k_ra8_rsip_win_mbox_hi = 0x01FFU ,
  k_ra8_rsip_win_data_lo = 0x1400U ,
  k_ra8_rsip_win_data_hi = 0x143FU ,
  k_ra8_rsip_win_trng_lo = 0x1440U ,
  k_ra8_rsip_win_trng_hi = 0x145FU ,
  k_ra8_rsip_win_sym_lo = 0x1500U ,
  k_ra8_rsip_win_sym_hi = 0x15FFU ,
  k_ra8_rsip_win_hash_lo = 0x1600U ,
  k_ra8_rsip_win_hash_hi = 0x167FU ,
  k_ra8_rsip_win_asym_lo = 0x1700U ,
  k_ra8_rsip_win_asym_hi = 0x17FFU ,
  k_ra8_rsip_win_kv_lo = 0x1800U ,
  k_ra8_rsip_win_kv_hi = 0x18FFU ,
  k_ra8_rsip_win_kw_lo = 0x1900U ,
  k_ra8_rsip_win_kw_hi = 0x19FFU ,
  k_ra8_rsip_win_oem_lo = 0x1A00U ,
  k_ra8_rsip_win_oem_hi = 0x1AFFU ,
  k_ra8_rsip_win_cmd_lo = 0x1B00U ,
  k_ra8_rsip_win_cmd_hi = 0x1BFFU
}
 Sub-block boundary constants used by the layout asserts below. More...

Detailed Description

RSIP-E50D register base address, byte offsets, and layout asserts.

Sub-header of ra8_rsip_regs.h. Carries the memory-mapped base address (ra8_rsip_addr_t), the full byte-offset table for every register the HAL touches (ra8_rsip_off_t), the sub-block window boundary constants (ra8_rsip_window_t), and the compile-time layout-insurance asserts (alignment + sub-block containment sweep) that lock the offset table at build time.

The RSIP-E50D engine on the RA8D2 is an isolated security subsystem (HUM Ch 52 "Renesas Secure IP (RSIP-E50D)" p 3302). It is mailbox-driven; the HUM body for Ch 52 (p 3302-3307) does not publish a register table, so every offset here is cross-referenced to the FSP primitive register file crypto_procedures_protected/.../ra8_rsip_e50d/r_rsip_reg.h.

Since
0.1.0

Definition in file ra8_rsip_regs_offsets.h.

Macro Definition Documentation

◆ RA8_RSIP_ASSERT_ALIGN

#define RA8_RSIP_ASSERT_ALIGN ( off_)
Value:
static_assert(((size_t)(off_) & 0x3U) == 0U, #off_ " must be 4-byte aligned")

RA8 RSIP ASSERT ALIGN.

Definition at line 253 of file ra8_rsip_regs_offsets.h.

◆ RA8_RSIP_ASSERT_IN_WIN

#define RA8_RSIP_ASSERT_IN_WIN ( off_,
lo_,
hi_ )
Value:
static_assert((size_t)(off_) >= (size_t)(lo_) && (size_t)(off_) <= (size_t)(hi_), \
#off_ " outside window [" #lo_ ", " #hi_ "]")

RA8 RSIP ASSERT IN WIN.

Definition at line 258 of file ra8_rsip_regs_offsets.h.

Enumeration Type Documentation

◆ ra8_rsip_addr_t

enum ra8_rsip_addr_t : uintptr_t

Memory-mapped base address for the RSIP-E50D engine.

Verified against FSP r_rsip_addr.h for the E50D variant (RSIP_PRV_ADDR_BASE = 0x403B0000UL). The block lives inside the secure peripheral bus window at 0x40000000, gated by MSTPCRC.MSTPC31 (HUM Ch 11.2.8 "MSTPCRC" p 446 + HUM Ch 52.3.2 "Module-Stop Function Setting" p 3307).

Enumerator
k_ra8_rsip_base_addr 

RSIP-E50D mailbox window base.

Definition at line 42 of file ra8_rsip_regs_offsets.h.

◆ ra8_rsip_off_t

enum ra8_rsip_off_t : uint16_t

Byte offsets of every register the HAL touches.

Offsets are derived from the FSP primitive register file r_rsip_reg.h and the WR1_PROG/RD1_MASK/WAIT_STS sites scattered through crypto_procedures_protected/.../ra8_rsip_e50d. Each cell is a 32-bit word. The HUM body for Ch 52 (p 3302-3307) does not enumerate an explicit register table; the engine is mailbox-driven.

Enumerator
k_ra8_rsip_off_ctrl 

Engine control word.

k_ra8_rsip_off_status 

Status / state monitor.

k_ra8_rsip_off_ier 

Interrupt enable.

k_ra8_rsip_off_isr 

Interrupt status (W1C).

k_ra8_rsip_off_bist 

Built-in self-test trigger / result.

k_ra8_rsip_off_tamper_ctrl 

Tamper-source enable mask.

k_ra8_rsip_off_tamper_status 

Latched tamper-event flags.

k_ra8_rsip_off_dpa_ctrl 

SPA/DPA countermeasure arm.

k_ra8_rsip_off_dotf0_ctrl 

DOTF0 key route enable + slot.

k_ra8_rsip_off_dotf1_ctrl 

DOTF1 key route enable + slot.

k_ra8_rsip_off_oem_bl_ver 

Latched OEM BL Ver counter.

k_ra8_rsip_off_oem_bl_inc 

Increment trigger (W1).

k_ra8_rsip_off_oem_bl_lock 

Lock-after-validation latch.

k_ra8_rsip_off_huk_ctrl 

HUK access gate (read-only data).

k_ra8_rsip_off_uid_ctrl 

Unique-ID access gate.

k_ra8_rsip_off_kdf_ctrl 

KDF request word.

k_ra8_rsip_off_kdf_status 

KDF complete / busy.

k_ra8_rsip_off_kdf_label 

KDF context label slot.

k_ra8_rsip_off_kdf_out 

Derived-key output handle.

k_ra8_rsip_off_life_state 

Current lifecycle state.

k_ra8_rsip_off_debug_level 

AL0/AL1/AL2 debug level.

k_ra8_rsip_off_mbox_op 

Opcode written by host.

k_ra8_rsip_off_mbox_arg0 

Argument 0.

k_ra8_rsip_off_mbox_arg1 

Argument 1.

k_ra8_rsip_off_mbox_arg2 

Argument 2.

k_ra8_rsip_off_mbox_arg3 

Argument 3.

k_ra8_rsip_off_mbox_ret 

Completion code from engine.

k_ra8_rsip_off_data_in0 

Data input lane 0.

k_ra8_rsip_off_data_in1 

Data input lane 1.

k_ra8_rsip_off_data_in2 

Data input lane 2.

k_ra8_rsip_off_data_in3 

Data input lane 3.

k_ra8_rsip_off_data_out0 

Data output lane 0.

k_ra8_rsip_off_data_out1 

Data output lane 1.

k_ra8_rsip_off_data_out2 

Data output lane 2.

k_ra8_rsip_off_data_out3 

Data output lane 3.

k_ra8_rsip_off_key_stage 

Wrapped-key load port.

k_ra8_rsip_off_key_op_status 

Key/data op status (one 32-bit word past KEY_STAGE, inside the KEY_STAGE sub-block 0x1420-0x143F – the previous 0x1444 collided with the TRNG status word).

k_ra8_rsip_off_rnd_ctrl 

TRNG control word.

k_ra8_rsip_off_rnd_status 

TRNG ready / health flags.

k_ra8_rsip_off_rnd_data 

TRNG output (32-bit per read).

k_ra8_rsip_off_hash_ctrl 

HASH control (algorithm select).

k_ra8_rsip_off_hash_status 

HASH ready / done flags.

k_ra8_rsip_off_hash_data_in 

HASH input window (32-bit each).

k_ra8_rsip_off_hash_digest 

HASH output digest base.

k_ra8_rsip_off_hash_hmac 

HMAC mode + key-handle slot.

k_ra8_rsip_off_asym_ctrl 

Asymmetric command word.

k_ra8_rsip_off_asym_status 

Asymmetric busy / done.

k_ra8_rsip_off_asym_curve 

ECC curve selector.

k_ra8_rsip_off_asym_arg 

Argument-block descriptor.

k_ra8_rsip_off_asym_key 

Key-handle slot.

k_ra8_rsip_off_asym_msg_in 

Message / digest input port.

k_ra8_rsip_off_asym_sig_in 

Signature input lane.

k_ra8_rsip_off_asym_sig_out 

Signature output lane.

k_ra8_rsip_off_asym_pub_x 

ECC peer X / RSA pubkey lane.

k_ra8_rsip_off_asym_pub_y 

ECC peer Y lane.

k_ra8_rsip_off_asym_shared 

ECDH shared-secret handle.

k_ra8_rsip_off_asym_rsa_size 

RSA modulus-size selector.

k_ra8_rsip_off_kv_ctrl 

Vault command (read/write/erase).

k_ra8_rsip_off_kv_slot 

Vault slot index.

k_ra8_rsip_off_kv_data 

Vault data port.

k_ra8_rsip_off_kv_count 

Vault populated-slot count.

k_ra8_rsip_off_kw_ctrl 

Key-wrap command word.

k_ra8_rsip_off_kw_kek 

KEK handle slot.

k_ra8_rsip_off_kw_iv0 

Wrap IV lane 0.

k_ra8_rsip_off_kw_iv1 

Wrap IV lane 1.

k_ra8_rsip_off_kw_iv2 

Wrap IV lane 2.

k_ra8_rsip_off_kw_iv3 

Wrap IV lane 3.

k_ra8_rsip_off_kw_handle 

Source / destination handle slot.

k_ra8_rsip_off_kw_blob_in 

Wrapped-blob input lane.

k_ra8_rsip_off_kw_blob_out 

Wrapped-blob output lane.

k_ra8_rsip_off_sym_ctrl 

Cipher command (mode|dir|alg).

k_ra8_rsip_off_sym_status 

Cipher busy / done.

k_ra8_rsip_off_sym_keyh 

Cipher key-handle slot.

k_ra8_rsip_off_sym_iv0 

IV / nonce lane 0.

k_ra8_rsip_off_sym_iv1 

IV / nonce lane 1.

k_ra8_rsip_off_sym_iv2 

IV / nonce lane 2.

k_ra8_rsip_off_sym_iv3 

IV / nonce lane 3.

k_ra8_rsip_off_sym_aad_in 

AEAD additional-data input.

k_ra8_rsip_off_sym_tag 

AEAD authentication tag.

k_ra8_rsip_off_sym_aad_len 

AEAD AAD length (bytes).

k_ra8_rsip_off_sym_pt_len 

AEAD plaintext length (bytes).

k_ra8_rsip_off_kdf_info 

KDF info / context lane.

k_ra8_rsip_off_kdf_salt 

HKDF salt lane.

k_ra8_rsip_off_kdf_len 

Output length (bytes).

k_ra8_rsip_off_kdf_ikm 

Input keying material handle.

k_ra8_rsip_off_oem_ctrl 

OEM install command word.

k_ra8_rsip_off_oem_arg 

OEM install argument descriptor.

k_ra8_rsip_off_oem_iv 

OEM install IV.

k_ra8_rsip_off_cmd_fifo 

32-bit opcode descriptor write.

Definition at line 58 of file ra8_rsip_regs_offsets.h.

◆ ra8_rsip_window_t

enum ra8_rsip_window_t : uint16_t

Sub-block boundary constants used by the layout asserts below.

The HUM body for Ch 52 (p 3302-3307) does not publish a register table because the engine is mailbox-driven, so the only authoritative cross-reference for individual register offsets is the FSP primitive file crypto_procedures_protected/.../ra8_rsip_e50d. The sub-block windows below come straight from the file-header table earlier in this file and from the FSP RSIP_PRV_ADDR_VAL_* macros in r_rsip_reg.h (anchors 0x0000H, 0x1000H, 0x1420H, 0x1440H, 0x1600H). Every offset emitted in ra8_rsip_off_t must land inside one of these windows; the static_asserts that follow lock that contract at compile time.

Enumerator
k_ra8_rsip_win_ctrl_lo 

CTRL/status mailbox low.

k_ra8_rsip_win_ctrl_hi 

CTRL/status mailbox high.

k_ra8_rsip_win_mbox_lo 

Generic mailbox low.

k_ra8_rsip_win_mbox_hi 

Generic mailbox high.

k_ra8_rsip_win_data_lo 

Data + KEY_STAGE window low.

k_ra8_rsip_win_data_hi 

Data + KEY_STAGE window high.

k_ra8_rsip_win_trng_lo 

TRNG window low.

k_ra8_rsip_win_trng_hi 

TRNG window high.

k_ra8_rsip_win_sym_lo 

Symmetric cipher window low.

k_ra8_rsip_win_sym_hi 

Symmetric cipher window high.

k_ra8_rsip_win_hash_lo 

HASH window low.

k_ra8_rsip_win_hash_hi 

HASH window high.

k_ra8_rsip_win_asym_lo 

Asymmetric (RSA/ECC) window low.

k_ra8_rsip_win_asym_hi 

Asymmetric (RSA/ECC) window high.

k_ra8_rsip_win_kv_lo 

Key-vault window low.

k_ra8_rsip_win_kv_hi 

Key-vault window high.

k_ra8_rsip_win_kw_lo 

Key-wrap window low.

k_ra8_rsip_win_kw_hi 

Key-wrap window high.

k_ra8_rsip_win_oem_lo 

OEM-install window low.

k_ra8_rsip_win_oem_hi 

OEM-install window high.

k_ra8_rsip_win_cmd_lo 

Command FIFO window low.

k_ra8_rsip_win_cmd_hi 

Command FIFO window high.

Definition at line 207 of file ra8_rsip_regs_offsets.h.