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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Ultra-Low-Power Timer (ULPT) register layout for the Renesas RA8D2. More...
Go to the source code of this file.
Data Structures | |
| struct | r_ulpt_regs_t |
| Per-channel ULPT register window. More... | |
Enumerations | |
| enum | ra8_ulpt_addr_t : uintptr_t { k_ra8_ulpt0_base_addr = 0x40220000UL , k_ra8_ulpt1_base_addr = 0x40220100UL } |
| Memory-mapped base addresses for ULPT. More... | |
| enum | ra8_ulpt_limits_t : uint16_t { k_ra8_ulpt_channel_count = 2U , k_ra8_ulpt_channel_stride = 0x100U } |
| Channel count and stride. More... | |
| enum | ra8_ulptcr_bit_t : uint8_t { k_ra8_ulpt_bit_tstart = 0U , k_ra8_ulpt_bit_tcstf = 1U , k_ra8_ulpt_bit_tstop = 2U , k_ra8_ulpt_bit_tunf = 4U , k_ra8_ulpt_bit_tedga = 5U , k_ra8_ulpt_bit_tedgb = 6U } |
| ULPTCR control-bit positions. More... | |
| enum | ra8_ulpt_mask_t : uint8_t { k_ra8_ulpt_mask_tstart = 0x01U , k_ra8_ulpt_mask_tcstf = 0x02U , k_ra8_ulpt_mask_tstop = 0x04U } |
| ULPTCR bit masks. More... | |
Functions | |
| static volatile r_ulpt_regs_t * | ra8_ulpt (uint8_t channel) |
| Get pointer to ULPT channel channel. | |
Ultra-Low-Power Timer (ULPT) register layout for the Renesas RA8D2.
The Ultra-Low-Power Timer is a 32-bit down-counter that can run on the sub-clock or LOCO in deep-sleep modes. RA8D2 exposes two channels (ULPT0 and ULPT1) at 0x40220000 / 0x40220100 (stride 0x100) per FSP R_ULPT0_BASE / R_ULPT1_BASE.
Per-channel register map (verified against FSP R_ULPT0_Type in R7KA8D2KF_core0.h lines 30865-31006):
| Offset | Name | Width | Purpose |
|---|---|---|---|
| 0x00 | ULPTCNT | 32 | 32-bit counter / reload |
| 0x04 | ULPTCMA | 32 | Compare match A |
| 0x08 | ULPTCMB | 32 | Compare match B |
| 0x0C | ULPTCR | 8 | Control (start / stop / flags) |
| 0x0D | ULPTMR1 | 8 | Mode register 1 |
| 0x0E | ULPTMR2 | 8 | Mode register 2 |
| 0x0F | ULPTMR3 | 8 | Mode register 3 |
| 0x10 | ULPTIOC | 8 | I/O control |
Register offsets tracked against HUM Ch 25 "Ultra-Low-Power Timer (ULPT)" p 1187.
Definition in file ra8_ulpt_regs.h.
| enum ra8_ulpt_addr_t : uintptr_t |
Memory-mapped base addresses for ULPT.
| Enumerator | |
|---|---|
| k_ra8_ulpt0_base_addr | ULPT0 base (FSP R_ULPT0_BASE). |
| k_ra8_ulpt1_base_addr | ULPT1 base (FSP R_ULPT1_BASE). |
Definition at line 47 of file ra8_ulpt_regs.h.
| enum ra8_ulpt_limits_t : uint16_t |
Channel count and stride.
| Enumerator | |
|---|---|
| k_ra8_ulpt_channel_count | ULPT0 and ULPT1. |
| k_ra8_ulpt_channel_stride | Bytes between channels. |
Definition at line 56 of file ra8_ulpt_regs.h.
| enum ra8_ulpt_mask_t : uint8_t |
ULPTCR bit masks.
| Enumerator | |
|---|---|
| k_ra8_ulpt_mask_tstart | TSTART bit. |
| k_ra8_ulpt_mask_tcstf | TCSTF count-status flag (RO). |
| k_ra8_ulpt_mask_tstop | TSTOP bit. |
Definition at line 78 of file ra8_ulpt_regs.h.
| enum ra8_ulptcr_bit_t : uint8_t |
ULPTCR control-bit positions.
Definition at line 65 of file ra8_ulpt_regs.h.
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inlinestatic |
Get pointer to ULPT channel channel.
| [in] | channel | Channel index (0..1). |
Definition at line 105 of file ra8_ulpt_regs.h.
References k_ra8_ulpt0_base_addr, k_ra8_ulpt_channel_count, and k_ra8_ulpt_channel_stride.
Referenced by ra8_ulpt_deinit(), ra8_ulpt_get_status(), ra8_ulpt_init(), ra8_ulpt_set_period(), ra8_ulpt_start(), and ra8_ulpt_stop().