ra8_ulpt.c

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#include "ra8_ulpt.h"
 
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_hw_err.h"
#include "ra8_log.h"
#include "ra8_mstp.h"
#include "ra8_ulpt_regs.h"
 
static const char* s_tag = "ULPT";

typedef enum : uint32_t {
  k_ra8_ulpt_stop_poll_max = 0x40000U, 
} ra8_ulpt_poll_t;

static const ra8_mstp_t s_ulpt_mstp_table[] = {
  k_ra8_mstp_ulpt0,
  k_ra8_mstp_ulpt1,
};
 
[[nodiscard]] ra8_err_t ra8_ulpt_init(void)
{
  for (uint8_t ch = 0U; ch < (uint8_t)k_ra8_ulpt_channel_count; ++ch) {
    volatile r_ulpt_regs_t* reg = ra8_ulpt(ch);
    if (reg == nullptr) {
      return k_ra8_err_hw_init_failed;
    }
    /* HUM Ch 11.2.10 "MSTPCRE : Module Stop Control Register E" p 449 */
    const ra8_err_t mst_err = ra8_mstp_enable(s_ulpt_mstp_table[ch]);
    /* GCOVR_EXCL_BR_START -- MSTP HW readback */
    RA8_RETURN_ON_ERROR(mst_err, s_tag, "ulpt_init: mstp enable");
    /* GCOVR_EXCL_BR_STOP */
    /* HUM Ch 25.2.1 "ULPTCR : ULPT Control Register" p 1190 */
    reg->ULPTCR = 0U;
    /* HUM Ch 25.2.2 "ULPTMR1 : ULPT Mode Register 1" p 1192 */
    reg->ULPTMR1 = 0U;
    /* HUM Ch 25.2.3 "ULPTMR2 : ULPT Mode Register 2" p 1192 */
    reg->ULPTMR2 = 0U;
    /* HUM Ch 25.2.4 "ULPTMR3 : ULPT Mode Register 3" p 1195 */
    reg->ULPTMR3 = 0U;
    /* HUM Ch 25.2.5 "ULPTIOC : ULPT I/O Control Register" p 1195 */
    reg->ULPTIOC = 0U;
    /* HUM Ch 25.2.6 "ULPT : ULPT Counter Register" p 1198 */
    reg->ULPTCNT = 0U;
  }
  ra8_log_info(s_tag, "ulpt_init");
  return k_ra8_ok;
}
 
[[nodiscard]] ra8_err_t ra8_ulpt_start(uint8_t channel, uint32_t period)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  volatile r_ulpt_regs_t* reg = ra8_ulpt(channel);
  RA8_CHECK_NULL_PTR(reg, s_tag, "channel mapping failed");
 
  /* HUM Ch 25.2.1 "ULPTCR : ULPT Control Register" p 1190 */
  reg->ULPTCR = 0U;
  /* HUM Ch 25.2.2 "ULPTMR1 : ULPT Mode Register 1" p 1192 -- timer mode,
   * TCK1 = 0 selects ULPTLCLK (LOCO-derived 32.768 kHz, HUM Table 9.2
   * p 320), which survives Software Standby. */
  reg->ULPTMR1 = 0U;
  /* HUM Ch 25.2.3 "ULPTMR2 : ULPT Mode Register 2" p 1192 */
  reg->ULPTMR2 = 0U;
  /* HUM Ch 25.2.4 "ULPTMR3 : ULPT Mode Register 3" p 1195 */
  reg->ULPTMR3 = 0U;
  /* HUM Ch 25.2.6 "ULPT : ULPT Counter Register" p 1198 */
  reg->ULPTCNT = period;
  /* HUM Ch 25.2.1 "ULPTCR : ULPT Control Register" p 1190 */
  /* TSTART = 1. */
  reg->ULPTCR = k_ra8_ulpt_mask_tstart;
 
  ra8_log_info_val(s_tag, "start channel", (uint32_t)channel);
  return k_ra8_ok;
}
 
[[nodiscard]] ra8_err_t ra8_ulpt_stop(uint8_t channel)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  volatile r_ulpt_regs_t* reg = ra8_ulpt(channel);
  RA8_CHECK_NULL_PTR(reg, s_tag, "channel mapping failed");
 
  /* HUM Ch 25.2.1 "ULPTCR : ULPT Control Register" p 1190 */
  /* TSTOP toggle. */
  reg->ULPTCR = k_ra8_ulpt_mask_tstop;
  reg->ULPTCR = 0U;
 
  /* Confirm the down-counter actually halted before returning. ULPTCR.TCSTF
   * (count-status flag) lags the TSTOP request by a few ULPTLCLK (32.768 kHz)
   * cycles; a caller that re-arms for Software Standby while TCSTF is still
   * set hangs on the second wake. Poll TCSTF low under a bounded budget
   * (NASA Power of 10 Rule 2) -- k_ra8_ok when it clears, k_ra8_err_hw_timeout
   * if the counter never stops. */
  /* HUM Ch 25.2.1 "ULPTCR : ULPT Control Register" p 1190 */
  return ra8_hw_wait_flag_clear8(&reg->ULPTCR,
                                 (uint8_t)k_ra8_ulpt_mask_tcstf,
                                 (uint32_t)k_ra8_ulpt_stop_poll_max);
}
 
/* =============================================================================
 * full build-out
 * =============================================================================
 */
 
static ra8_ulpt_event_fn_t s_ulpt_fn;
static void*               s_ulpt_ctx;

ra8_err_t ra8_ulpt_deinit(uint8_t channel)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  volatile r_ulpt_regs_t* reg = ra8_ulpt(channel);
  RA8_CHECK_NULL_PTR(reg, s_tag, "channel mapping failed");
 
  reg->ULPTCR = 0U;
  return ra8_mstp_disable(s_ulpt_mstp_table[channel]);
}

ra8_err_t ra8_ulpt_set_period(uint8_t channel, uint32_t period)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  volatile r_ulpt_regs_t* reg = ra8_ulpt(channel);
  RA8_CHECK_NULL_PTR(reg, s_tag, "channel mapping failed");
  reg->ULPTCNT = period;
  return k_ra8_ok;
}

ra8_err_t ra8_ulpt_get_status(uint8_t channel, uint8_t* out_mask)
{
  RA8_CHECK_NULL_PTR(out_mask, s_tag, "out_mask must not be nullptr");
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  *out_mask = ra8_ulpt(channel)->ULPTCR;
  return k_ra8_ok;
}

ra8_err_t ra8_ulpt_attach_handler(ra8_ulpt_event_fn_t fn, void* ctx)
{
  s_ulpt_fn  = fn;
  s_ulpt_ctx = ctx;
  return k_ra8_ok;
}

RA8_ISR_SAFE
void ra8_ulpt_dispatch(uint8_t channel)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return;
  }
  const ra8_ulpt_event_fn_t fn  = s_ulpt_fn;
  void* const               ctx = s_ulpt_ctx;
  if (fn != nullptr) {
    fn(ctx, channel);
  }
}

ra8_err_t ra8_ulpt_enter_stop(uint8_t channel)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  return ra8_mstp_disable(s_ulpt_mstp_table[channel]);
}

ra8_err_t ra8_ulpt_exit_stop(uint8_t channel)
{
  if ((uint16_t)channel >= k_ra8_ulpt_channel_count) {
    return k_ra8_err_invalid_arg;
  }
  return ra8_mstp_enable(s_ulpt_mstp_table[channel]);
}