ra8_pfs_regs.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_bit_constants.h"
#include "ra8_port_constants.h"
 
/* =============================================================================
 * Base addresses + layout
 * =============================================================================
 */
 
typedef enum : uintptr_t {
  k_ra8_pfs_base_addr   = 0x40400800UL, 
  k_ra8_pmisc_base_addr = 0x40400D00UL, 
} ra8_pfs_addr_t;
 
typedef enum : uint16_t {
  k_ra8_pmisc_off_pfenet = 0x000U, 
  k_ra8_pmisc_off_pwpr   = 0x00CU, 
  k_ra8_pmisc_off_pwprs  = 0x014U, 
  k_ra8_pmisc_off_pmsar  = 0x030U, 
} ra8_pmisc_off_t;
 
/* =============================================================================
 * Packed PFS entry -- one per pin
 * =============================================================================
 *
 * Each pin has a 32-bit register. We expose it as a volatile uint32_t*
 * rather than a bitfield union because bitfield writes are
 * implementation-defined for write-protected registers: GCC may emit
 * a read-modify-write that hits the protected read path. A plain
 * 32-bit write is guaranteed to do one store.
 */

typedef enum : uint8_t {
  k_ra8_pfs_bit_podr  = 0U,  
  k_ra8_pfs_bit_pidr  = 1U,  
  k_ra8_pfs_bit_pdr   = 2U,  
  k_ra8_pfs_bit_pcr   = 4U,  
  k_ra8_pfs_bit_ncodr = 6U,  
  k_ra8_pfs_bit_dscr0 = 10U, 
  k_ra8_pfs_bit_dscr1 = 11U, 
  k_ra8_pfs_bit_eofr0 = 12U, 
  k_ra8_pfs_bit_eofr1 = 13U, 
  k_ra8_pfs_bit_isel  = 14U, 
  k_ra8_pfs_bit_asel  = 15U, 
  k_ra8_pfs_bit_pmr   = 16U, 
  k_ra8_pfs_bit_psel0 = 24U, 
} ra8_pfs_bit_t;

typedef enum : uint32_t {
  k_ra8_pfs_mask_podr  = 0x00000001UL, 
  k_ra8_pfs_mask_pdr   = 0x00000004UL, 
  k_ra8_pfs_mask_pcr   = 0x00000010UL, 
  k_ra8_pfs_mask_ncodr = 0x00000040UL, 
  k_ra8_pfs_mask_dscr  = 0x00000C00UL, 
  k_ra8_pfs_mask_eofr  = 0x00003000UL, 
  k_ra8_pfs_mask_isel  = 0x00004000UL, 
  k_ra8_pfs_mask_asel  = 0x00008000UL, 
  k_ra8_pfs_mask_pmr   = 0x00010000UL, 
  k_ra8_pfs_mask_psel  = 0x1F000000UL, 
} ra8_pfs_mask_t;

typedef enum : uint8_t {
  k_ra8_pfs_dscr_low             = 0U, 
  k_ra8_pfs_dscr_middle          = 1U, 
  k_ra8_pfs_dscr_high_speed_high = 2U, 
  k_ra8_pfs_dscr_high            = 3U, 
} ra8_pfs_dscr_t;

RA8_HW_REGISTER_ACCESS
static inline volatile uint32_t* ra8_pfs_pmn(ra8_port_t port, ra8_pin_t pin)
{
  if ((uint8_t)port > k_ra8_port_max) {
    return nullptr;
  }
  if ((uint8_t)pin > k_ra8_pin_max) {
    return nullptr;
  }
 
  /* Each pin is 4 bytes; each port is (k_ra8_pin_count * 4) = 64 bytes apart. */
  const uintptr_t flat_idx = ((uintptr_t)port * (uintptr_t)k_ra8_pin_count) + (uintptr_t)pin;
  return (volatile uint32_t*)(k_ra8_pfs_base_addr + (flat_idx * sizeof(uint32_t)));
}
 
/* =============================================================================
 * PWPR unlock / lock
 * =============================================================================
 */

typedef enum : uint8_t {
  k_ra8_pwpr_bit_pfswe = 6U, 
  k_ra8_pwpr_bit_b0wi  = 7U, 
} ra8_pwpr_bit_t;

RA8_HW_REGISTER_ACCESS
static inline volatile uint8_t* ra8_pfs_pwpr(void)
{
  return (volatile uint8_t*)((uintptr_t)k_ra8_pmisc_base_addr + (uintptr_t)k_ra8_pmisc_off_pwpr);
}

RA8_HW_REGISTER_ACCESS
static inline volatile uint8_t* ra8_pfs_pwprs(void)
{
  return (volatile uint8_t*)((uintptr_t)k_ra8_pmisc_base_addr + (uintptr_t)k_ra8_pmisc_off_pwprs);
}

static inline void ra8_pfs_pwpr_unlock(void)
{
  volatile uint8_t* pwpr  = ra8_pfs_pwpr();
  volatile uint8_t* pwprs = ra8_pfs_pwprs();
  /* HUM Ch 20.2.6 "PWPR" / 20.2.7 "PWPRS" -- B0WI must be cleared
   * before PFSWE can be set. Unlock both NS and Secure paths so PFS
   * writes land regardless of which world the CPU is in. */
  *pwpr  = 0U;
  *pwpr  = (uint8_t)(1U << k_ra8_pwpr_bit_pfswe);
  *pwprs = 0U;
  *pwprs = (uint8_t)(1U << k_ra8_pwpr_bit_pfswe);
}

static inline void ra8_pfs_pwpr_lock(void)
{
  volatile uint8_t* pwpr  = ra8_pfs_pwpr();
  volatile uint8_t* pwprs = ra8_pfs_pwprs();
  *pwpr                   = 0U;
  *pwpr                   = (uint8_t)(1U << k_ra8_pwpr_bit_b0wi);
  *pwprs                  = 0U;
  *pwprs                  = (uint8_t)(1U << k_ra8_pwpr_bit_b0wi);
}
 
#ifdef __cplusplus
}
#endif