ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_eth_gwca.h
Go to the documentation of this file.
1
20
21#pragma once
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#include <stdint.h>
28
29#include "ra8_err.h"
30#include "ra8_ether_regs.h"
31
36typedef void (*ra8_eth_gwca_event_fn_t)(void* ctx, uint32_t status_mask);
37
39[[nodiscard]] ra8_err_t ra8_eth_gwca_init(void);
40
42[[nodiscard]] ra8_err_t ra8_eth_gwca_deinit(void);
43
45[[nodiscard]] ra8_err_t ra8_eth_gwca_get_status(uint32_t* out_mask);
46
48[[nodiscard]] ra8_err_t ra8_eth_gwca_clear_status(uint32_t mask);
49
52
63void ra8_eth_gwca_dispatch(void);
64
66[[nodiscard]] ra8_err_t ra8_eth_gwca_enter_stop(void);
67
69[[nodiscard]] ra8_err_t ra8_eth_gwca_exit_stop(void);
70
97
116[[nodiscard]] ra8_err_t ra8_eth_gwca_axi_init(void);
117
150 uint32_t entry_count);
151
190 uint32_t entry_count);
191
204typedef struct {
205 uint8_t priority;
206 bool is_tx;
208 bool extended;
211
245 uint32_t queue_index,
246 const ra8_eth_gwca_queue_cfg_t* cfg);
247
276[[nodiscard]] ra8_err_t ra8_eth_gwca_reload_queue(uint32_t queue_index);
277
315 uint32_t ring_depth,
316 uint32_t slot_bytes);
317
341 void* buffer);
342
372 uint32_t ring_depth,
373 uint32_t slot_bytes,
374 uint8_t* pool);
375
404[[nodiscard]] ra8_err_t ra8_eth_gwca_kick_tx(uint32_t queue_index);
405
439 uint32_t ring_depth,
440 ra8_gwdcc_dt_t match_dt,
441 uint32_t start_idx,
442 uint32_t* out_index);
443
475 uint32_t ring_depth,
476 uint32_t* tail_idx,
477 const uint8_t* frame,
478 uint32_t frame_len,
479 uint32_t slot_bytes);
480
518 uint32_t ring_depth,
519 uint32_t* head_idx,
520 uint8_t* out_frame,
521 uint32_t out_capacity,
522 uint32_t slot_bytes,
523 uint32_t* out_len);
524
563
600
622[[nodiscard]] ra8_err_t
623ra8_eth_gwca_default_send(ra8_eth_gwca_default_state_t* state, const uint8_t* frame, uint32_t len);
624
647 uint8_t* out_frame,
648 uint32_t out_capacity,
649 uint32_t* out_len);
650
651#ifdef __cplusplus
652}
653#endif
Error Code Definitions for ra8-firmware.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
ra8_err_t ra8_eth_gwca_axi_init(void)
Request the GWCA AXI bridge to initialize via GWARIRM.ARIOG.
void ra8_eth_gwca_dispatch(void)
Dispatch a GWCA event.
ra8_err_t ra8_eth_gwca_default_open(ra8_eth_gwca_default_state_t *state)
One-call GWCA bring-up: install LINKFIX, configure RX + TX, OPERATION.
ra8_err_t ra8_eth_gwca_install_linkfix(ra8_gwca_basic_descriptor_t *linkfix_table, uint32_t entry_count)
Install a fresh LINKFIX table at GWDCBAC0/1.
ra8_err_t ra8_eth_gwca_bring_up(ra8_gwca_basic_descriptor_t *linkfix_table, uint32_t entry_count)
Bring the GWCA from RESET state up to OPERATION with a fresh LINKFIX table.
ra8_err_t ra8_eth_gwca_enter_stop(void)
Put GWCA into MSTP-gated stop.
ra8_err_t ra8_eth_gwca_kick_tx(uint32_t queue_index)
Kick a TX queue – request the chip to start transmitting.
ra8_err_t ra8_eth_gwca_clear_status(uint32_t mask)
Clear GWCA_STS bits via GWCA_ICLR.
ra8_err_t ra8_eth_gwca_init_ring(ra8_gwca_basic_descriptor_t *chain, uint32_t ring_depth, uint32_t slot_bytes)
Initialise a descriptor chain as a ring of FEMPTY slots.
ra8_err_t ra8_eth_gwca_tx_frame(ra8_gwca_basic_descriptor_t *chain, uint32_t ring_depth, uint32_t *tail_idx, const uint8_t *frame, uint32_t frame_len, uint32_t slot_bytes)
Enqueue one frame on a TX queue's descriptor ring.
ra8_err_t ra8_eth_gwca_deinit(void)
Tear down GWCA.
void(* ra8_eth_gwca_event_fn_t)(void *ctx, uint32_t status_mask)
GWCA event callback.
ra8_err_t ra8_eth_gwca_get_status(uint32_t *out_mask)
Read GWCA_STS.
ra8_err_t ra8_eth_gwca_exit_stop(void)
Exit MSTP-gated stop.
ra8_err_t ra8_eth_gwca_rx_frame(ra8_gwca_basic_descriptor_t *chain, uint32_t ring_depth, uint32_t *head_idx, uint8_t *out_frame, uint32_t out_capacity, uint32_t slot_bytes, uint32_t *out_len)
Dequeue one frame from an RX queue's descriptor ring.
ra8_err_t ra8_eth_gwca_default_recv(ra8_eth_gwca_default_state_t *state, uint8_t *out_frame, uint32_t out_capacity, uint32_t *out_len)
One-call RX: dequeue next frame from state->rx_chain.
ra8_err_t ra8_eth_gwca_find_slot(const ra8_gwca_basic_descriptor_t *chain, uint32_t ring_depth, ra8_gwdcc_dt_t match_dt, uint32_t start_idx, uint32_t *out_index)
Find the next FEMPTY slot in a descriptor ring.
ra8_err_t ra8_eth_gwca_init(void)
Initialise GWCA.
ra8_err_t ra8_eth_gwca_set_operation_mode(ra8_gwmc_opc_t mode)
Transition the GWCA / ESWM state machine to a new OPC mode.
ra8_err_t ra8_eth_gwca_reload_queue(uint32_t queue_index)
Reload (arm) a descriptor queue by pulsing GWDCC[i].BALR.
ra8_err_t ra8_eth_gwca_attach_handler(ra8_eth_gwca_event_fn_t fn, void *ctx)
Attach the shared event handler.
ra8_err_t ra8_eth_gwca_configure_queue(ra8_gwca_basic_descriptor_t *linkfix_table, uint32_t queue_index, const ra8_eth_gwca_queue_cfg_t *cfg)
Wire a per-queue config into GWDCC[i] and the matching LINKFIX entry.
ra8_err_t ra8_eth_gwca_default_send(ra8_eth_gwca_default_state_t *state, const uint8_t *frame, uint32_t len)
One-call TX: enqueue frame on state->tx_chain + kick.
ra8_err_t ra8_eth_gwca_set_descriptor_buffer(ra8_gwca_basic_descriptor_t *desc, void *buffer)
Set a single descriptor's data-buffer pointer.
ra8_err_t ra8_eth_gwca_attach_buffers(ra8_gwca_basic_descriptor_t *chain, uint32_t ring_depth, uint32_t slot_bytes, uint8_t *pool)
Walk a ring and attach per-slot buffers from a static pool.
Ethernet controller base addresses for the Renesas RA8D2.
ra8_gwdcc_dt_t
Descriptor type field values (HUM Ch 34.5.1.2.2 "Descriptor Types").
ra8_gwmc_opc_t
GWMC.OPC operation-mode values (HUM Ch 34.3.1 "GWMC" p 1797).
State block for ra8_eth_gwca_default_open / _send / _recv.
uint32_t rx_slot_bytes
RX slot bytes.
ra8_gwca_basic_descriptor_t * rx_chain
RX descriptor chain (FEMPTY ring of rx_depth entries).
uint32_t linkfix_count
Number of LINKFIX entries.
uint32_t tx_queue_index
TX queue index.
uint32_t tx_slot_bytes
TX slot bytes.
ra8_gwca_ext_descriptor_t * tx_chain
TX descriptor chain – 16-byte EXTENDED descriptors (EDE = 1).
uint32_t tx_tail
Round-robin write cursor.
ra8_gwca_basic_descriptor_t * linkfix_table
LINKFIX table covering at least 2 queues (RX + TX).
uint32_t rx_queue_index
LINKFIX entry + GWDCC[i] index.
uint8_t mac_port
MAC port (0..3) that frames are sourced from / sent to.
uint32_t rx_head
Round-robin read cursor.
Per-queue configuration descriptor for ra8_eth_gwca_configure_queue.
bool stop_on_last
SL: stop processing on last.
bool extended
EDE: true = 16-byte extended descriptors.
bool is_tx
DQT: true = TX, false = RX.
void * chain_head
First descriptor in the queue (basic or extended).
uint8_t priority
DCP[2:0]: class priority (0..7).
8-byte basic descriptor (HUM Ch 34.5.1.2 "General Formats").
16-byte extended descriptor (HUM Ch 34.5.1.2 "Extended descriptor", GWDCCi.ETS == 0 && GWDCCi....