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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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16-byte extended descriptor (HUM Ch 34.5.1.2 "Extended descriptor", GWDCCi.ETS == 0 && GWDCCi.EDE == 1). More...
#include <ra8_ether_regs.h>
Data Fields | |
| volatile uint8_t | ds_l |
| 0..7 Descriptor size (low byte). | |
| volatile uint8_t | ds_h: 4 |
| 8..11 Descriptor size (high nibble). | |
| volatile uint8_t | info0: 4 |
| 12..15 Information 0. | |
| volatile uint8_t | err: 3 |
| 16..18 Error bits (data/AXI errors). | |
| volatile uint8_t | die: 1 |
| 19 Descriptor interrupt enable. | |
| volatile uint8_t | dt: 4 |
| 20..23 Descriptor type (ra8_gwdcc_dt_t). | |
| volatile uint8_t | ptr_h |
| 24..31 Pointer high byte (PTR[39:32]). | |
| volatile uint32_t | ptr_l |
| 32..63 Pointer low 32 bits. | |
| volatile uint32_t | info1_lo |
| 64..95 INFO1[31:0]. | |
| volatile uint32_t | info1_hi |
| 96..127 INFO1[63:32]. | |
16-byte extended descriptor (HUM Ch 34.5.1.2 "Extended descriptor", GWDCCi.ETS == 0 && GWDCCi.EDE == 1).
Bytes 0..7 are the basic descriptor (identical layout to ra8_gwca_basic_descriptor_t – DS / INFO0 / DT / PTR). Bytes 8..15 are INFO1[63:0]. On a TX queue INFO1 carries the transmit metadata (matches FSP layer3_switch_descriptor_t info1_tx): the descriptor format bit and the destination vector that route the frame. The two INFO1 words are exposed as plain uint32_t and the named fields are composed via ra8_gwca_info1_tx_t so the volatile bit-field ABI never varies between toolchains.
Definition at line 365 of file ra8_ether_regs.h.
| volatile uint8_t ra8_gwca_ext_descriptor_t::die |
19 Descriptor interrupt enable.
Definition at line 370 of file ra8_ether_regs.h.
| volatile uint8_t ra8_gwca_ext_descriptor_t::ds_h |
8..11 Descriptor size (high nibble).
Definition at line 367 of file ra8_ether_regs.h.
Referenced by internal_tx_ext_init(), and ra8_eth_gwca_default_send().
| volatile uint8_t ra8_gwca_ext_descriptor_t::ds_l |
0..7 Descriptor size (low byte).
Definition at line 366 of file ra8_ether_regs.h.
Referenced by internal_tx_ext_init(), and ra8_eth_gwca_default_send().
| volatile uint8_t ra8_gwca_ext_descriptor_t::dt |
20..23 Descriptor type (ra8_gwdcc_dt_t).
Definition at line 371 of file ra8_ether_regs.h.
Referenced by internal_tx_ext_init(), internal_tx_ext_rearm(), internal_wait_tx0_done(), and ra8_eth_gwca_default_send().
| volatile uint8_t ra8_gwca_ext_descriptor_t::err |
16..18 Error bits (data/AXI errors).
Definition at line 369 of file ra8_ether_regs.h.
| volatile uint8_t ra8_gwca_ext_descriptor_t::info0 |
12..15 Information 0.
Definition at line 368 of file ra8_ether_regs.h.
| volatile uint32_t ra8_gwca_ext_descriptor_t::info1_hi |
96..127 INFO1[63:32].
Definition at line 375 of file ra8_ether_regs.h.
Referenced by ra8_eth_gwca_default_send().
| volatile uint32_t ra8_gwca_ext_descriptor_t::info1_lo |
64..95 INFO1[31:0].
Definition at line 374 of file ra8_ether_regs.h.
Referenced by ra8_eth_gwca_default_send().
| volatile uint8_t ra8_gwca_ext_descriptor_t::ptr_h |
24..31 Pointer high byte (PTR[39:32]).
Definition at line 372 of file ra8_ether_regs.h.
Referenced by internal_tx_ext_init(), and internal_tx_ext_rearm().
| volatile uint32_t ra8_gwca_ext_descriptor_t::ptr_l |
32..63 Pointer low 32 bits.
Definition at line 373 of file ra8_ether_regs.h.
Referenced by internal_tx_ext_init(), and internal_tx_ext_rearm().