ra8_sdramc_regs.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stddef.h>
#include <stdint.h>
 
typedef enum : uintptr_t {
  /* R_BUS_SDRAM is a sub-block inside R_BUS (R_BUS_BASE = 0x40003000)
   * at offset +0xC00, so the SDRAMC control registers sit at
   * 0x40003C00. */
  k_ra8_sdramc_base_addr = 0x40003C00UL, 
  k_ra8_sdram_base_addr  = 0x68000000UL, 
  /* SDRAM Clock Output Control Register lives in R_SYSTEM (0x4001E000)
   * at offset 0x53; it gates the SDCLK output to the external device.
   * HUM Ch 9 "Clock Generation Circuit". */
  k_ra8_system_sdckocr_addr = 0x4001E053UL, 
} ra8_sdramc_addr_t;
 
typedef enum : uint32_t {
  k_ra8_sdram_size_bytes = 0x04000000UL, 
} ra8_sdram_geom_t;

typedef enum : uint8_t {
  k_ra8_sdramc_off_sdccr  = 0x00U, 
  k_ra8_sdramc_off_sdcmod = 0x01U, 
  k_ra8_sdramc_off_sdamod = 0x02U, 
  k_ra8_sdramc_off_sdself = 0x10U, 
  k_ra8_sdramc_off_sdrfcr = 0x14U, 
  k_ra8_sdramc_off_sdrfen = 0x16U, 
  k_ra8_sdramc_off_sdicr  = 0x20U, 
  k_ra8_sdramc_off_sdir   = 0x24U, 
  k_ra8_sdramc_off_sdadr  = 0x40U, 
  k_ra8_sdramc_off_sdtr   = 0x44U, 
  k_ra8_sdramc_off_sdmod  = 0x48U, 
  k_ra8_sdramc_off_sdsr   = 0x50U, 
} ra8_sdramc_off_t;

typedef struct {
  volatile uint8_t SDCCR;  
  volatile uint8_t SDCMOD; 
  volatile uint8_t SDAMOD; 
  volatile uint8_t _rsv0[k_ra8_sdramc_off_sdself - k_ra8_sdramc_off_sdamod - 1];
  volatile uint8_t SDSELF; 
  volatile uint8_t  _rsv1[k_ra8_sdramc_off_sdrfcr - k_ra8_sdramc_off_sdself - 1];
  volatile uint16_t SDRFCR; 
  volatile uint8_t  SDRFEN; 
  volatile uint8_t _rsv2[k_ra8_sdramc_off_sdicr - k_ra8_sdramc_off_sdrfen - 1];
  volatile uint8_t SDICR; 
  volatile uint8_t  _rsv3[k_ra8_sdramc_off_sdir - k_ra8_sdramc_off_sdicr - 1];
  volatile uint16_t SDIR; 
  volatile uint8_t _rsv4[k_ra8_sdramc_off_sdadr - k_ra8_sdramc_off_sdir - 2];
  volatile uint8_t SDADR; 
  volatile uint8_t  _rsv5[k_ra8_sdramc_off_sdtr - k_ra8_sdramc_off_sdadr - 1];
  volatile uint32_t SDTR;  
  volatile uint16_t SDMOD; 
  volatile uint8_t _rsv6[k_ra8_sdramc_off_sdsr - k_ra8_sdramc_off_sdmod - 2];
  volatile uint8_t SDSR; 
} r_sdramc_regs_t;
 
static_assert(offsetof(r_sdramc_regs_t, SDTR) == (size_t)k_ra8_sdramc_off_sdtr,
              "SDRAMC SDTR offset");
static_assert(offsetof(r_sdramc_regs_t, SDSR) == (size_t)k_ra8_sdramc_off_sdsr,
              "SDRAMC SDSR offset");
static_assert(offsetof(r_sdramc_regs_t, SDICR) == (size_t)k_ra8_sdramc_off_sdicr,
              "SDRAMC SDICR offset");
static_assert(offsetof(r_sdramc_regs_t, SDADR) == (size_t)k_ra8_sdramc_off_sdadr,
              "SDRAMC SDADR offset");

static inline volatile r_sdramc_regs_t* ra8_sdramc(void)
{
  return (volatile r_sdramc_regs_t*)k_ra8_sdramc_base_addr;
}

static inline volatile uint8_t* ra8_sdramc_sdckocr(void)
{
  return (volatile uint8_t*)k_ra8_system_sdckocr_addr;
}
 
#ifdef __cplusplus
}
#endif