ra8_dotf_regs.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
 
#include "ra8_attributes.h"

typedef enum : uintptr_t {
  k_ra8_dotf0_base_addr    = 0x40268800UL, 
  k_ra8_dotf1_base_addr    = 0x40268900UL, 
  k_ra8_dotf0_ns_base_addr = 0x50268800UL, 
  k_ra8_dotf1_ns_base_addr = 0x50268900UL, 
  k_ra8_dotf_stride        = 0x100UL,      
} ra8_dotf_addr_t;

typedef enum : uint32_t {
  k_ra8_dotf0_window_lo = 0x80000000UL, 
  k_ra8_dotf0_window_hi = 0x9FFFFFFFUL, 
  k_ra8_dotf1_window_lo = 0x70000000UL, 
  k_ra8_dotf1_window_hi = 0x7FFFFFFFUL, 
} ra8_dotf_xspi_window_t;

typedef enum : uint8_t {
  k_ra8_dotf_channel_count       = 2U,  
  k_ra8_dotf_align_shift         = 12U, 
  k_ra8_dotf_iv_word_count       = 4U,  
  k_ra8_dotf_max_regions         = 4U,  
  k_ra8_dotf_rsv_words_convaread = 30U, 
} ra8_dotf_limits_t;

typedef enum : uint32_t {
  k_ra8_dotf_addr_granule  = 0x00001000UL, 
  k_ra8_dotf_addr_mask     = 0xFFFFF000UL, 
  k_ra8_dotf_addr_low_mask = 0x00000FFFUL, 
} ra8_dotf_align_t;

typedef enum : uint8_t {
  k_ra8_dotf_reg00_bit09     = 9U,  
  k_ra8_dotf_reg00_bit_st    = 20U, 
  k_ra8_dotf_reg00_bit_sca0  = 16U, 
  k_ra8_dotf_reg00_bit_sca1  = 17U, 
  k_ra8_dotf_reg00_bit_ksz0  = 24U, 
  k_ra8_dotf_reg00_bit_ksz1  = 25U, 
  k_ra8_dotf_reg00_bit_mode0 = 28U, 
  k_ra8_dotf_reg00_bit_mode1 = 29U, 
} ra8_dotf_reg00_bit_t;

typedef enum : uint32_t {
  k_ra8_dotf_reg00_aes_enable    = 0x00000200UL, 
  k_ra8_dotf_reg00_self_test     = 0x00100000UL, 
  k_ra8_dotf_reg00_sca_en        = 0x00010000UL, 
  k_ra8_dotf_reg00_sca_mode      = 0x00020000UL, 
  k_ra8_dotf_reg00_key_size_mask = 0x03000000UL, 
  k_ra8_dotf_reg00_key_size_128  = 0x02000000UL, 
  k_ra8_dotf_reg00_key_size_192  = 0x01000000UL, 
  k_ra8_dotf_reg00_key_size_256  = 0x03000000UL, 
  k_ra8_dotf_reg00_mode_mask     = 0x30000000UL, 
  k_ra8_dotf_reg00_mode_ctr      = 0x20000000UL, 
  k_ra8_dotf_reg00_default_field = 0x22000000UL, 
  k_ra8_dotf_reg00_disable_value = 0x00000000UL, 
  k_ra8_dotf_reg00_enable_value  = 0x22000200UL, 
} ra8_dotf_reg00_mask_t;

typedef struct {
  volatile uint32_t CONVAREAST; 
  volatile uint32_t CONVAREAD;  
  volatile uint32_t
    _r0[k_ra8_dotf_rsv_words_convaread]; 
  volatile uint32_t REG00;               
  volatile uint32_t _r1[2];              
  volatile uint32_t REG03;               
} ra8_dotf_regs_t;

RA8_HW_REGISTER_ACCESS
static inline volatile ra8_dotf_regs_t* ra8_dotf_regs(uint8_t channel)
{
  if ((uint16_t)channel >= (uint16_t)k_ra8_dotf_channel_count) {
    return nullptr;
  }
  return (volatile ra8_dotf_regs_t*)(k_ra8_dotf0_base_addr +
                                     ((uintptr_t)channel * k_ra8_dotf_stride));
}
 
#ifdef __cplusplus
}
#endif