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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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xSPI / Octo-SPI driver (flash read/program/erase + ID/status) More...
Go to the source code of this file.
Typedefs | |
| typedef void(* | ra8_xspi_event_fn_t) (void *ctx, uint32_t status_mask) |
| xSPI event callback. | |
Functions | |
| ra8_err_t | ra8_xspi_init (uint8_t instance, ra8_xspi_lio_mode_t mode) |
| Initialise an xSPI instance in the chosen link-layer IO mode. | |
| ra8_err_t | ra8_xspi_direct_command (uint8_t instance, const uint8_t *cmd_buf, uint8_t len) |
| Issue a raw command via the direct-command registers. | |
| ra8_err_t | ra8_xspi_flash_read (uint8_t instance, uint32_t flash_addr, uint8_t *buf, uint32_t len) |
| Read len bytes from external flash into buf. | |
| ra8_err_t | ra8_xspi_flash_program (uint8_t instance, uint32_t flash_addr, const uint8_t *data, uint32_t len) |
| Program (write) len bytes at flash_addr. | |
| ra8_err_t | ra8_xspi_flash_erase_sector (uint8_t instance, uint32_t flash_addr) |
| Erase the 4 KiB sector containing flash_addr. | |
| ra8_err_t | ra8_xspi_flash_read_status (uint8_t instance, uint8_t *out_status) |
| Read the flash Status Register (opcode 0x05). | |
| ra8_err_t | ra8_xspi_flash_read_id (uint8_t instance, uint32_t *out_id) |
| Read the JEDEC ID (opcode 0x9F), returning 24 bits in a uint32_t. | |
| ra8_err_t | ra8_xspi_deinit (uint8_t instance) |
| Tear down the xSPI instance (disable + MSTP release). | |
| ra8_err_t | ra8_xspi_get_status (uint8_t instance, uint32_t *out_mask) |
| Read the xSPI COMSTT busy/error mask. | |
| ra8_err_t | ra8_xspi_clear_status (uint8_t instance, uint32_t mask) |
| Clear transfer-complete / error bits in INTS via INTC. | |
| ra8_err_t | ra8_xspi_attach_handler (uint8_t instance, ra8_xspi_event_fn_t fn, void *ctx) |
| Attach a completion callback. | |
| void | ra8_xspi_dispatch (uint8_t instance) |
| Dispatch an xSPI event – snapshot INTS + fire callback. | |
| ra8_err_t | ra8_xspi_enter_stop (uint8_t instance) |
| Put an xSPI instance into MSTP-gated stop. | |
| ra8_err_t | ra8_xspi_exit_stop (uint8_t instance) |
| Exit MSTP-gated stop. | |
| ra8_err_t | ra8_xspi_xip_enter (uint8_t instance, uint8_t enter_code, uint8_t exit_code) |
| Enable XIP (execute-in-place) memory-mapped read mode. | |
| ra8_err_t | ra8_xspi_xip_exit (uint8_t instance) |
| Disable XIP mode and restore command-only access. | |
| ra8_err_t | ra8_xspi_set_xip_mode (uint8_t instance, bool enable, uint8_t read_cmd, uint8_t addr_bytes) |
| Enable or disable memory-mapped (XIP) read mode. | |
| ra8_err_t | ra8_xspi_set_dtr_mode (uint8_t instance, bool enable) |
| Enable or disable double-data-rate (DDR / DTR) link mode. | |
| ra8_err_t | ra8_xspi_calibrate_dqs (uint8_t instance) |
| Run the data-strobe (DQS) calibration sequence. | |
| ra8_err_t | ra8_xspi_suspend (uint8_t instance) |
| Suspend a long-running flash erase / program operation. | |
| ra8_err_t | ra8_xspi_resume (uint8_t instance) |
| Resume a previously suspended erase / program. | |
| ra8_err_t | ra8_xspi_software_reset (uint8_t instance, uint8_t cmd_bytes) |
| Issue the JEDEC software-reset pair (RSTEN 0x66 + RST 0x99). | |
xSPI / Octo-SPI driver (flash read/program/erase + ID/status)
Driver surface for the RA8D2 xSPI controller in direct-command mode. Supports initialisation at a given link-layer IO width, raw command-buffer writes, and a minimal set of SPI NOR flash operations (read, page program, sector erase, status/ID read).
Definition in file ra8_xspi.h.
| typedef void(* ra8_xspi_event_fn_t) (void *ctx, uint32_t status_mask) |
xSPI event callback.
Definition at line 154 of file ra8_xspi.h.
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Attach a completion callback.
Definition at line 483 of file ra8_xspi.c.
References k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_xspi_instance_count, and s_xspi_state.
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Run the data-strobe (DQS) calibration sequence.
Project-native equivalent of FSP R_OSPI_B_AutoCalibrate for target 0. Programmes the CCCTLCS[0..7] calibration descriptor with FSP-derived defaults, sets CAEN to start the controller's automatic phase-scan state machine, then polls until the controller clears CAEN itself or the bounded spin budget expires. On success the controller updates WRAPCFG.DSSFTCS0 with the winning sample-shift code. Cite: HUM Ch 44 p 2986.
| [in] | instance | xSPI instance (0 or 1). |
Definition at line 664 of file ra8_xspi.c.
References r_xspi_regs_t::CCCTLCS, k_ra8_xspi_calib_spin, k_ra8_xspi_ccctl0_mask_caen, RA8_CHECK_NULL_PTR, ra8_hw_wait_flag_clear32(), ra8_xspi(), and s_tag.
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Clear transfer-complete / error bits in INTS via INTC.
Definition at line 474 of file ra8_xspi.c.
References r_xspi_regs_t::INTC, k_ra8_ok, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
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Tear down the xSPI instance (disable + MSTP release).
Definition at line 449 of file ra8_xspi.c.
References r_xspi_regs_t::INTC, r_xspi_regs_t::INTE, k_ra8_xspi_ints_mask_all, r_xspi_regs_t::LIOCFGCS, RA8_CHECK_NULL_PTR, ra8_mstp_disable(), ra8_xspi(), s_tag, s_xspi_mstp_table, and s_xspi_state.
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Issue a raw command via the direct-command registers.
| [in] | instance | xSPI channel (0 or 1). |
| [in] | cmd_buf | Up to 16 bytes of command / address / data. |
| [in] | len | Number of bytes in cmd_buf. |
Definition at line 402 of file ra8_xspi.c.
References r_xspi_regs_t::CDBUF, k_ra8_err_invalid_size, k_ra8_err_out_of_range, k_ra8_ok, k_ra8_xspi_cmd_max_bytes, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
| void ra8_xspi_dispatch | ( | uint8_t | instance | ) |
Dispatch an xSPI event – snapshot INTS + fire callback.
Called from the xSPI transfer-complete / error ISR (HUM Ch 49 "xSPI", p 2581) to snapshot INTS and invoke the registered handler. Out-of-range instance and unattached slots are silently dropped so spurious IRQs are harmless.
| [in] | instance | xSPI controller instance index (0 or 1). |
Definition at line 494 of file ra8_xspi.c.
References r_xspi_regs_t::INTC, r_xspi_regs_t::INTS, k_ra8_xspi_instance_count, k_ra8_xspi_ints_mask_all, ra8_xspi(), and s_xspi_state.
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Put an xSPI instance into MSTP-gated stop.
Definition at line 517 of file ra8_xspi.c.
References k_ra8_err_invalid_arg, k_ra8_xspi_instance_count, ra8_mstp_disable(), and s_xspi_mstp_table.
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Exit MSTP-gated stop.
Definition at line 525 of file ra8_xspi.c.
References k_ra8_err_invalid_arg, k_ra8_xspi_instance_count, ra8_mstp_enable(), and s_xspi_mstp_table.
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Erase the 4 KiB sector containing flash_addr.
| [in] | instance | xSPI instance. |
| [in] | flash_addr | Address within the target sector (3-byte addressable). |
Definition at line 724 of file ra8_xspi_flash.c.
References internal_build_chunk_header(), internal_flash_range_check(), internal_poll_wip_clear(), k_ra8_ok, k_ra8_spi_flash_op_erase_sector, k_ra8_spi_flash_op_write_enable, k_ra8_xspi_cdt_trtype_write, priv_ra8_xspi_issue_simple_opcode(), priv_ra8_xspi_kick_command(), RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by flash_journal_round_trip(), internal_nor_block_erase(), internal_write_one_sector(), internal_xspi_erase(), ospirw_ospi_provision(), and selftest_ospi_write_pattern().
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Program (write) len bytes at flash_addr.
Sequence per chunk is: Write Enable -> Page Program -> Poll WIP, with chunks clamped to the 8-byte manual-command slot and to 256-byte NOR page boundaries. Every build drives the identical xSPI register sequence; host unit tests run it against the register-level NOR model in tests/mocks/src/ra8_fake_xspi_flash.c.
| [in] | instance | xSPI instance. |
| [in] | flash_addr | Flash offset (3-byte addressable). |
| [in] | data | Source buffer. |
| [in] | len | Number of bytes to program. |
Definition at line 685 of file ra8_xspi_flash.c.
References internal_flash_program_chunk(), internal_flash_range_check(), k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_xspi_cdt_max_data_bytes, k_ra8_xspi_max_xfer, k_ra8_xspi_page_len, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by flash_journal_round_trip(), internal_nor_write(), internal_xspi_program_chunked(), ospirw_msc_write(), and selftest_ospi_write_pattern().
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Read len bytes from external flash into buf.
Builds a standard 0x03 (1S-1S-1S) read command sequence in 8-byte manual-command chunks, kicks each via CDCTL0.TRREQ, polls INTS.CMDCMP for completion, and copies the CDD0/CDD1 response words into buf. Host unit tests exercise the identical sequence against the register-level NOR model in tests/mocks/src/ra8_fake_xspi_flash.c.
| [in] | instance | xSPI instance (0 or 1). |
| [in] | flash_addr | Flash offset to read from (3-byte addressable). |
| [out] | buf | Destination buffer. Must not be NULL. |
| [in] | len | Number of bytes to read. |
Definition at line 431 of file ra8_xspi_flash.c.
References internal_flash_range_check(), internal_flash_read_chunk(), k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_xspi_cdt_max_data_bytes, k_ra8_xspi_max_xfer, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by flash_journal_round_trip(), internal_nor_block_erased_verify(), internal_nor_read(), internal_xspi_read_chunked(), ospirw_msc_read(), ra8_nsc_xspi_read(), and selftest_fat_fill_sector().
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Read the JEDEC ID (opcode 0x9F), returning 24 bits in a uint32_t.
The returned word packs the three JEDEC bytes as: (manufacturer << 16) | (mem_type << 8) | capacity. Compatible with Macronix MX25, Winbond W25, Renesas AT25, and ISSI IS25 parts.
| [in] | instance | xSPI instance. |
| [out] | out_id | 24-bit JEDEC ID in a 32-bit word. |
Definition at line 773 of file ra8_xspi_flash.c.
References r_xspi_regs_t::CDBUF, internal_issue_read_opcode(), k_ra8_ok, k_ra8_spi_flash_op_read_id, k_ra8_xspi_cdbuf_idx_data0, k_ra8_xspi_resp_bytes_jedec, k_xspi_byte_mask, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by flash_journal_setup_or_halt(), internal_probe_rdid(), ospirw_ospi_provision(), and selftest_ospi_provision().
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Read the flash Status Register (opcode 0x05).
| [in] | instance | xSPI instance. |
| [out] | out_status | Status-register value (WIP is bit 0). |
Definition at line 753 of file ra8_xspi_flash.c.
References r_xspi_regs_t::CDBUF, internal_issue_read_opcode(), k_ra8_ok, k_ra8_spi_flash_op_read_status, k_ra8_xspi_cdbuf_idx_data0, k_ra8_xspi_resp_bytes_status, k_xspi_byte_mask, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by internal_poll_wip_clear().
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Read the xSPI COMSTT busy/error mask.
Definition at line 464 of file ra8_xspi.c.
References r_xspi_regs_t::COMSTT, k_ra8_ok, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by ra8_nsc_xspi_status().
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Initialise an xSPI instance in the chosen link-layer IO mode.
| [in] | instance | xSPI instance (0 or 1). |
| [in] | mode | Desired LIOCFG mode (1S/2S/4S/8S/8D). |
Definition at line 372 of file ra8_xspi.c.
References internal_xspi_apply_config(), internal_xspi_clock_block_init(), internal_xspi_reset_device(), k_ra8_err_invalid_arg, k_ra8_ok, RA8_CHECK_NULL_PTR, ra8_log_info_val, ra8_mstp_enable(), RA8_RETURN_ON_ERROR, ra8_xspi(), s_tag, and s_xspi_mstp_table.
Referenced by demo_run(), flash_journal_setup_or_halt(), internal_reset_phase_1s(), internal_reset_phase_8d(), internal_swap_run_all(), ospirw_ospi_provision(), and selftest_ospi_provision().
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Resume a previously suspended erase / program.
Issues the JEDEC resume opcode (0x7A) via the manual-command engine and polls CMDCMP for completion. Pairs 1:1 with ra8_xspi_suspend().
| [in] | instance | xSPI instance (0 or 1). |
Definition at line 690 of file ra8_xspi.c.
References k_ra8_spi_flash_op_resume, priv_ra8_xspi_issue_simple_opcode(), RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
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Enable or disable double-data-rate (DDR / DTR) link mode.
Sets / clears LIOCFGCS[0].DDREN (HUM Ch 44 p 2986). Callers must already have selected an appropriate protocol mode (typically k_ra8_xspi_lio_8d8d8d) via ra8_xspi_init().
| [in] | instance | xSPI instance (0 or 1). |
| [in] | enable | true: DDR; false: SDR. |
Definition at line 648 of file ra8_xspi.c.
References k_ra8_ok, k_ra8_xspi_liocfgcs_mask_ddren, r_xspi_regs_t::LIOCFGCS, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
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Enable or disable memory-mapped (XIP) read mode.
Programs the CMCFGCS[0] read-command slot with the supplied opcode + address-byte width, mirrors FSP r_ospi_b_xip(true/false) by toggling the per-channel CMCTLCH.XIPEN bits, and arms the read-only system-bus mapping via BMCTL0. The matching write command is left at zero because XiP windows are read-only by design. Cite: HUM Ch 44 "Octal Serial Peripheral Interface (OSPI)" p 2986.
| [in] | instance | xSPI instance (0 or 1). |
| [in] | enable | true to enable XIP, false to tear it down. |
| [in] | read_cmd | JEDEC read opcode (e.g. 0xEB / 0xEE / 0x0B). |
| [in] | addr_bytes | Address byte count (3 or 4). |
Definition at line 617 of file ra8_xspi.c.
References r_xspi_regs_t::BMCTL0, r_xspi_regs_t::CMCFGCS, r_xspi_regs_t::CMCTLCH, k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_xspi_addr_bytes_3, k_ra8_xspi_addr_bytes_4, k_ra8_xspi_bmctl0_read_only, k_ra8_xspi_bmctl0_read_write, k_ra8_xspi_cmcfgcs_pos_addr_size, k_ra8_xspi_cmcfgcs_pos_cmd, k_ra8_xspi_cmcfgcs_word_addr, k_ra8_xspi_cmcfgcs_word_read_cmd, k_ra8_xspi_cmctlch_xipen_mask, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
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Issue the JEDEC software-reset pair (RSTEN 0x66 + RST 0x99).
Drives the two-step JEDEC reset sequence used by every modern SPI NOR vendor (ISSI IS25LX, Macronix MX25, Winbond W25, Micron MT25Q): first RSTEN (Reset Enable, opcode 0x66) and then RST (Reset, opcode 0x99). After RST returns the device must be left undisturbed for tRPH (~50 us) before the next CS assertion; the caller is responsible for that wait (we use ra8_delay_ms(1)).
The two protocol modes the driver exercises are:
To recover from an unknown protocol state at cold-or-warm boot the board bring-up should call this function once in each protocol mode: one of the two will be the no-op (the chip ignores the wrong-shape opcode) and the other will actually reset the chip back to 1S-1S-1S.
Cite: IS25LX512M datasheet Ch 8.20 "Reset Enable (RSTEN)" and Ch 8.21 "Reset (RST)" (p 39); HUM Ch 44 p 2986 for the manual- command engine fields used to send the opcodes.
| [in] | instance | xSPI instance (0 or 1). |
| [in] | cmd_bytes | Number of opcode bytes to ship per command: 1 for 1S-1S-1S SPI, 2 for 8D-8D-8D OPI. |
Definition at line 756 of file ra8_xspi.c.
References internal_issue_reset_opcode(), k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_spi_flash_op_reset_dev, k_ra8_spi_flash_op_reset_en, k_ra8_xspi_reset_cmd_bytes_1s, k_ra8_xspi_reset_cmd_bytes_8d, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
Referenced by internal_reset_phase_1s(), and internal_reset_phase_8d().
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Suspend a long-running flash erase / program operation.
Issues the JEDEC suspend opcode (0x75) via the manual-command engine, polls CMDCMP, and lets the SPI device pause its in-flight erase or program so that interactive reads can be served. Cite: HUM Ch 44 p 2986.
| [in] | instance | xSPI instance (0 or 1). |
Definition at line 683 of file ra8_xspi.c.
References k_ra8_spi_flash_op_suspend, priv_ra8_xspi_issue_simple_opcode(), RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
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Enable XIP (execute-in-place) memory-mapped read mode.
Programs CMCTLCH[0/1] with the supplied XiP enter/exit codes, sets BMCTL0 = 0x55 to map the target window read-only on the system bus, and arms CMCTLCH.XIPEN. Tracks FSP R_OSPI_B_XipEnter / r_ospi_b_xip(true). Cite: HUM Ch 44 "Octal Serial Peripheral Interface (OSPI)" p 2986.
| [in] | instance | xSPI instance (0 or 1). |
| [in] | enter_code | Vendor-specific XIP enter byte (e.g. 0xA5). |
| [in] | exit_code | Vendor-specific XIP exit byte (e.g. 0x5A). |
Definition at line 533 of file ra8_xspi.c.
References r_xspi_regs_t::BMCTL0, r_xspi_regs_t::CMCTLCH, k_ra8_ok, k_ra8_xspi_bmctl0_read_only, k_ra8_xspi_cmctlch_xipen_mask, k_ra8_xspi_cmctlch_xipencode_pos, k_ra8_xspi_cmctlch_xipexcode_pos, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.
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Disable XIP mode and restore command-only access.
Clears CMCTLCH[0/1].XIPEN and zeroes out the XIP enter/exit codes, then resets BMCTL0 so further direct-command transfers are not blocked by an active memory-mapped path. Tracks FSP R_OSPI_B_XipExit / r_ospi_b_xip(false).
| [in] | instance | xSPI instance (0 or 1). |
Definition at line 555 of file ra8_xspi.c.
References r_xspi_regs_t::BMCTL0, r_xspi_regs_t::CMCTLCH, k_ra8_ok, k_ra8_xspi_bmctl0_read_write, RA8_CHECK_NULL_PTR, ra8_xspi(), and s_tag.