Asynchronous General-Purpose Timer (AGT) register layout for RA8D2. More...

#include <stdint.h>
#include "ra8_attributes.h"

Include dependency graph for ra8_agt_regs.h:

This graph shows which files directly or indirectly include this file:

Data Structures
struct	r_agt_regs_t
	AGT (16-bit view) register layout, one per channel. More...

Enumerations
enum	ra8_agt_addr_t : uintptr_t { k_ra8_agt0_base_addr = 0x40221000UL }
enum	ra8_agt_limits_t : uint16_t { k_ra8_agt_channel_count = 10U , k_ra8_agt_channel_stride = 0x100U }
enum	ra8_agt_agtcr_bits_t : uint8_t { k_ra8_agt_agtcr_tstart_pos = 0U , k_ra8_agt_agtcr_tcstf_pos = 1U , k_ra8_agt_agtcr_tstop_pos = 2U , k_ra8_agt_agtcr_tedgf_pos = 4U , k_ra8_agt_agtcr_tundf_pos = 5U , k_ra8_agt_agtcr_tcmaf_pos = 6U , k_ra8_agt_agtcr_tcmbf_pos = 7U }
	AGTCR (AGT Control Register) bit positions. More...
enum	ra8_agt_agtcr_masks_t : uint8_t { k_ra8_agt_agtcr_tstart_msk = 0x01U , k_ra8_agt_agtcr_tcstf_msk = 0x02U , k_ra8_agt_agtcr_tstop_msk = 0x04U , k_ra8_agt_agtcr_tundf_msk = 0x20U , k_ra8_agt_agtcr_tcmaf_msk = 0x40U , k_ra8_agt_agtcr_tcmbf_msk = 0x80U , k_ra8_agt_agtcr_status_msk = 0xF0U }
	AGTCR bit masks. More...
enum	ra8_agt_agtmr1_fields_t : uint8_t { k_ra8_agt_agtmr1_tmod_timer = 0x00U , k_ra8_agt_agtmr1_tmod_pulse_output = 0x01U , k_ra8_agt_agtmr1_tmod_event_count = 0x02U , k_ra8_agt_agtmr1_tmod_mask = 0x07U , k_ra8_agt_agtmr1_tck_pclkb = 0x00U , k_ra8_agt_agtmr1_tck_pclkb_div8 = 0x10U , k_ra8_agt_agtmr1_tck_pclkb_div2 = 0x30U , k_ra8_agt_agtmr1_tck_agt0_underflow = 0x50U , k_ra8_agt_agtmr1_tck_mask = 0x70U }
	AGTMR1 (AGT Mode Register 1) field encodings. More...
enum	ra8_agt_agtioc_masks_t : uint8_t { k_ra8_agt_agtioc_tedgsel_msk = 0x01U , k_ra8_agt_agtioc_toe_msk = 0x04U }
	AGTIOC (AGT I/O Control Register) bit masks. More...
enum	ra8_agt_compare_sentinel_t : uint16_t { k_ra8_agt_compare_parked_value = 0xFFFFU }
	Compare-match register "parked" sentinel. More...
enum	ra8_agt_agtcmsr_masks_t : uint8_t { k_ra8_agt_agtcmsr_tcmea_msk = 0x01U , k_ra8_agt_agtcmsr_toea_msk = 0x02U , k_ra8_agt_agtcmsr_topola_msk = 0x04U , k_ra8_agt_agtcmsr_tcmeb_msk = 0x10U , k_ra8_agt_agtcmsr_toeb_msk = 0x20U , k_ra8_agt_agtcmsr_topolb_msk = 0x40U }
	AGTCMSR (AGT Compare Match Function Select) bit masks. More...
enum	ra8_agt_cascade_channels_t : uint8_t { k_ra8_agt_cascade_lo_channel = 0U , k_ra8_agt_cascade_hi_channel = 1U }
	Cascade-mode channel indices. More...

Functions
static volatile r_agt_regs_t *	ra8_agt (uint8_t channel)
	Get pointer to AGT channel N.

Detailed Description

Asynchronous General-Purpose Timer (AGT) register layout for RA8D2.

The AGT is a 16-bit down-counter typically used as a tick timer or a low-power wakeup source. RA8D2 has AGTX0..AGTX9 at 0x40221000 with a 0x100 stride per instance. Each AGT can clock from PCLKB, LOCO, subclock, or an underflow of another AGT. RA8D2 also exposes each channel as a 32-bit AGTW alias starting at offset 0x00; the 16-bit and 32-bit views overlay the same channel registers and the 8-bit CTRL block lives at offset 0x08 (16-bit view) / 0x0C (32-bit view). This driver targets the 16-bit view and matches the authoritative FSP R_AGTX0_AGT16_Type layout exactly. HUM Ch 24 "Low Power Asynchronous General Purpose Timer (AGT)" p 1164-1186.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_agt_regs.h.

Enumeration Type Documentation

◆ ra8_agt_addr_t

enum ra8_agt_addr_t : uintptr_t

Enumerator
k_ra8_agt0_base_addr	RA8 agt0 base address.

Definition at line 32 of file ra8_agt_regs.h.

◆ ra8_agt_agtcmsr_masks_t

enum ra8_agt_agtcmsr_masks_t : uint8_t

AGTCMSR (AGT Compare Match Function Select) bit masks.

HUM Ch 24.2.9 "AGTCMSR : AGT Compare Match Function Select Register" p 1172.

Enumerator
k_ra8_agt_agtcmsr_tcmea_msk	Compare match A enable.
k_ra8_agt_agtcmsr_toea_msk	AGTOAn output enable.
k_ra8_agt_agtcmsr_topola_msk	AGTOAn output polarity.
k_ra8_agt_agtcmsr_tcmeb_msk	Compare match B enable.
k_ra8_agt_agtcmsr_toeb_msk	AGTOBn output enable.
k_ra8_agt_agtcmsr_topolb_msk	AGTOBn output polarity.

Definition at line 109 of file ra8_agt_regs.h.

◆ ra8_agt_agtcr_bits_t

enum ra8_agt_agtcr_bits_t : uint8_t

AGTCR (AGT Control Register) bit positions.

HUM Ch 24.2.4 "AGTCR : AGT Control Register" p 1167.

Enumerator
k_ra8_agt_agtcr_tstart_pos	Start request (RW).
k_ra8_agt_agtcr_tcstf_pos	Count status flag (RO).
k_ra8_agt_agtcr_tstop_pos	Forced stop (W).
k_ra8_agt_agtcr_tedgf_pos	Active edge flag (RW1C).
k_ra8_agt_agtcr_tundf_pos	Underflow flag (RW1C).
k_ra8_agt_agtcr_tcmaf_pos	Compare-match A (RW1C).
k_ra8_agt_agtcr_tcmbf_pos	Compare-match B (RW1C).

Definition at line 45 of file ra8_agt_regs.h.

◆ ra8_agt_agtcr_masks_t

enum ra8_agt_agtcr_masks_t : uint8_t

AGTCR bit masks.

Mirror of ra8_agt_agtcr_bits_t for ALU use.

Enumerator
k_ra8_agt_agtcr_tstart_msk	RA8 AGT agtcr tstart msk.
k_ra8_agt_agtcr_tcstf_msk	RA8 AGT agtcr tcstf msk.
k_ra8_agt_agtcr_tstop_msk	RA8 AGT agtcr tstop msk.
k_ra8_agt_agtcr_tundf_msk	Underflow flag.
k_ra8_agt_agtcr_tcmaf_msk	Compare-match A flag.
k_ra8_agt_agtcr_tcmbf_msk	Compare-match B flag.
k_ra8_agt_agtcr_status_msk	TEDGF\|TUNDF\|TCMAF\|TCMBF.

Definition at line 59 of file ra8_agt_regs.h.

◆ ra8_agt_agtioc_masks_t

enum ra8_agt_agtioc_masks_t : uint8_t

AGTIOC (AGT I/O Control Register) bit masks.

HUM Ch 24.2.7 "AGTIOC : AGT I/O Control Register" p 1170.

Enumerator
k_ra8_agt_agtioc_tedgsel_msk	Output polarity bit 0.
k_ra8_agt_agtioc_toe_msk	AGTOn pin output enable.

Definition at line 89 of file ra8_agt_regs.h.

◆ ra8_agt_agtmr1_fields_t

enum ra8_agt_agtmr1_fields_t : uint8_t

AGTMR1 (AGT Mode Register 1) field encodings.

HUM Ch 24.2.5 "AGTMR1 : AGT Mode Register 1" p 1168.

Enumerator
k_ra8_agt_agtmr1_tmod_timer	TMOD = 000b.
k_ra8_agt_agtmr1_tmod_pulse_output	TMOD = 001b.
k_ra8_agt_agtmr1_tmod_event_count	TMOD = 010b.
k_ra8_agt_agtmr1_tmod_mask	TMOD[2:0] field mask.
k_ra8_agt_agtmr1_tck_pclkb	TCK = 000b @ bit 4.
k_ra8_agt_agtmr1_tck_pclkb_div8	TCK = 001b @ bit 4.
k_ra8_agt_agtmr1_tck_pclkb_div2	TCK = 011b @ bit 4.
k_ra8_agt_agtmr1_tck_agt0_underflow	TCK = 101b (AGT1 only).
k_ra8_agt_agtmr1_tck_mask	TCK[2:0] field mask.

Definition at line 73 of file ra8_agt_regs.h.

◆ ra8_agt_cascade_channels_t

enum ra8_agt_cascade_channels_t : uint8_t

Cascade-mode channel indices.

RA8D2 only supports cascade on the AGT0 / AGT1 pair – AGT1's TCK[2:0] = 101b uses "Underflow event signal from AGT0" (HUM Ch 24.2.5 p 1168, Note 6).

Enumerator
k_ra8_agt_cascade_lo_channel	Low 16 bits live in AGT0.
k_ra8_agt_cascade_hi_channel	High 16 bits live in AGT1.

Definition at line 124 of file ra8_agt_regs.h.

◆ ra8_agt_compare_sentinel_t

enum ra8_agt_compare_sentinel_t : uint16_t

Compare-match register "parked" sentinel.

HUM Ch 24.2.2 "AGTCMA : AGT Compare Match A Register" p 1166 Note 1: "Set the AGTCMA register to 0xFFFF when compare match A is not used." Same applies to AGTCMB (HUM Ch 24.2.3 p 1166).

Enumerator
k_ra8_agt_compare_parked_value	RA8 AGT compare parked value.

Definition at line 100 of file ra8_agt_regs.h.

◆ ra8_agt_limits_t

enum ra8_agt_limits_t : uint16_t

Enumerator
k_ra8_agt_channel_count	RA8 AGT channel count.
k_ra8_agt_channel_stride	RA8 AGT channel stride.

Definition at line 36 of file ra8_agt_regs.h.

Function Documentation

◆ ra8_agt()

volatile r_agt_regs_t * ra8_agt ( uint8_t channel )

inlinestatic

Get pointer to AGT channel N.

Definition at line 157 of file ra8_agt_regs.h.

References k_ra8_agt0_base_addr, k_ra8_agt_channel_count, and k_ra8_agt_channel_stride.

Referenced by internal_agt_cascade_resolve_halves(), ra8_agt_deinit(), ra8_agt_dispatch(), ra8_agt_enter_stop(), ra8_agt_exit_stop(), ra8_agt_get_status(), ra8_agt_set_reload(), ra8_agt_start_free_run(), ra8_agt_start_pulse_output(), and ra8_agt_stop().

Data Structures

Enumerations

Functions