AGT (16-bit view) register layout, one per channel. More...

#include <ra8_agt_regs.h>

Data Fields
volatile uint16_t	AGT
	+0x00 16-bit counter.
volatile uint16_t	AGTCMA
	+0x02 Compare Match A.
volatile uint16_t	AGTCMB
	+0x04 Compare Match B.
volatile uint16_t	_r0
	+0x06 reserved.
volatile uint8_t	AGTCR
	+0x08 Control.
volatile uint8_t	AGTMR1
	+0x09 Mode 1.
volatile uint8_t	AGTMR2
	+0x0A Mode 2.
volatile uint8_t	AGTIOSEL_ALT
	+0x0B Pin Select (alt alias).
volatile uint8_t	AGTIOC
	+0x0C I/O Control.
volatile uint8_t	AGTISR
	+0x0D Event Pin Select.
volatile uint8_t	AGTCMSR
	+0x0E Compare Match Function.
volatile uint8_t	AGTIOSEL
	+0x0F Pin Select.

Detailed Description

AGT (16-bit view) register layout, one per channel.

Mirrors the FSP R_AGTX0_AGT16_Type layout from the RA8D2 BSP (CMSIS device header R7KA8D2KF_core0.h). The 32-bit AGTW view shares the same channel base but widens AGT/AGTCMA/AGTCMB to 32 bits and pushes CTRL to offset 0x0C; this struct is the 16-bit mode driver path. HUM Ch 24.2 "Register Descriptions" p 1165-1173.

Definition at line 140 of file ra8_agt_regs.h.

Field Documentation

◆ _r0

volatile uint16_t r_agt_regs_t::_r0

+0x06 reserved.

Definition at line 144 of file ra8_agt_regs.h.

◆ AGT

volatile uint16_t r_agt_regs_t::AGT

+0x00 16-bit counter.

Definition at line 141 of file ra8_agt_regs.h.

Referenced by internal_agt_cascade_arm_half(), internal_agt_pulse_program_registers(), ra8_agt_set_reload(), and ra8_agt_start_free_run().

◆ AGTCMA

volatile uint16_t r_agt_regs_t::AGTCMA

+0x02 Compare Match A.

Definition at line 142 of file ra8_agt_regs.h.

Referenced by internal_agt_pulse_program_compare().

◆ AGTCMB

volatile uint16_t r_agt_regs_t::AGTCMB

+0x04 Compare Match B.

Definition at line 143 of file ra8_agt_regs.h.

Referenced by internal_agt_pulse_program_compare().

◆ AGTCMSR

volatile uint8_t r_agt_regs_t::AGTCMSR

+0x0E Compare Match Function.

Definition at line 151 of file ra8_agt_regs.h.

Referenced by internal_agt_cascade_arm_half(), and internal_agt_pulse_program_registers().

◆ AGTCR

volatile uint8_t r_agt_regs_t::AGTCR

+0x08 Control.

Definition at line 145 of file ra8_agt_regs.h.

Referenced by internal_agt_cascade_arm_half(), internal_agt_cascade_program_and_start(), internal_agt_pulse_program_registers(), ra8_agt_deinit(), ra8_agt_enter_stop(), ra8_agt_get_status(), ra8_agt_start_free_run(), ra8_agt_start_pulse_output(), and ra8_agt_stop().

◆ AGTIOC

volatile uint8_t r_agt_regs_t::AGTIOC

+0x0C I/O Control.

Definition at line 149 of file ra8_agt_regs.h.

Referenced by internal_agt_cascade_arm_half(), and internal_agt_pulse_program_registers().

◆ AGTIOSEL

volatile uint8_t r_agt_regs_t::AGTIOSEL

+0x0F Pin Select.

Definition at line 152 of file ra8_agt_regs.h.

◆ AGTIOSEL_ALT

volatile uint8_t r_agt_regs_t::AGTIOSEL_ALT

+0x0B Pin Select (alt alias).

Definition at line 148 of file ra8_agt_regs.h.

◆ AGTISR

volatile uint8_t r_agt_regs_t::AGTISR

+0x0D Event Pin Select.

Definition at line 150 of file ra8_agt_regs.h.

◆ AGTMR1

volatile uint8_t r_agt_regs_t::AGTMR1

+0x09 Mode 1.

Definition at line 146 of file ra8_agt_regs.h.

Referenced by internal_agt_cascade_arm_half(), internal_agt_pulse_program_registers(), and ra8_agt_start_free_run().

◆ AGTMR2

volatile uint8_t r_agt_regs_t::AGTMR2

+0x0A Mode 2.

Definition at line 147 of file ra8_agt_regs.h.