ra8_agt_regs.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
 
#include "ra8_attributes.h"
 
typedef enum : uintptr_t {
  k_ra8_agt0_base_addr = 0x40221000UL, 
} ra8_agt_addr_t;
 
typedef enum : uint16_t {
  k_ra8_agt_channel_count  = 10U,    
  k_ra8_agt_channel_stride = 0x100U, 
} ra8_agt_limits_t;

typedef enum : uint8_t {
  k_ra8_agt_agtcr_tstart_pos = 0U, 
  k_ra8_agt_agtcr_tcstf_pos  = 1U, 
  k_ra8_agt_agtcr_tstop_pos  = 2U, 
  k_ra8_agt_agtcr_tedgf_pos  = 4U, 
  k_ra8_agt_agtcr_tundf_pos  = 5U, 
  k_ra8_agt_agtcr_tcmaf_pos  = 6U, 
  k_ra8_agt_agtcr_tcmbf_pos  = 7U, 
} ra8_agt_agtcr_bits_t;

typedef enum : uint8_t {
  k_ra8_agt_agtcr_tstart_msk = 0x01U, 
  k_ra8_agt_agtcr_tcstf_msk  = 0x02U, 
  k_ra8_agt_agtcr_tstop_msk  = 0x04U, 
  k_ra8_agt_agtcr_tundf_msk  = 0x20U, 
  k_ra8_agt_agtcr_tcmaf_msk  = 0x40U, 
  k_ra8_agt_agtcr_tcmbf_msk  = 0x80U, 
  k_ra8_agt_agtcr_status_msk = 0xF0U, 
} ra8_agt_agtcr_masks_t;

typedef enum : uint8_t {
  k_ra8_agt_agtmr1_tmod_timer         = 0x00U, 
  k_ra8_agt_agtmr1_tmod_pulse_output  = 0x01U, 
  k_ra8_agt_agtmr1_tmod_event_count   = 0x02U, 
  k_ra8_agt_agtmr1_tmod_mask          = 0x07U, 
  k_ra8_agt_agtmr1_tck_pclkb          = 0x00U, 
  k_ra8_agt_agtmr1_tck_pclkb_div8     = 0x10U, 
  k_ra8_agt_agtmr1_tck_pclkb_div2     = 0x30U, 
  k_ra8_agt_agtmr1_tck_agt0_underflow = 0x50U, 
  k_ra8_agt_agtmr1_tck_mask           = 0x70U, 
} ra8_agt_agtmr1_fields_t;

typedef enum : uint8_t {
  k_ra8_agt_agtioc_tedgsel_msk = 0x01U, 
  k_ra8_agt_agtioc_toe_msk     = 0x04U, 
} ra8_agt_agtioc_masks_t;

typedef enum : uint16_t {
  k_ra8_agt_compare_parked_value = 0xFFFFU, 
} ra8_agt_compare_sentinel_t;

typedef enum : uint8_t {
  k_ra8_agt_agtcmsr_tcmea_msk  = 0x01U, 
  k_ra8_agt_agtcmsr_toea_msk   = 0x02U, 
  k_ra8_agt_agtcmsr_topola_msk = 0x04U, 
  k_ra8_agt_agtcmsr_tcmeb_msk  = 0x10U, 
  k_ra8_agt_agtcmsr_toeb_msk   = 0x20U, 
  k_ra8_agt_agtcmsr_topolb_msk = 0x40U, 
} ra8_agt_agtcmsr_masks_t;

typedef enum : uint8_t {
  k_ra8_agt_cascade_lo_channel = 0U, 
  k_ra8_agt_cascade_hi_channel = 1U, 
} ra8_agt_cascade_channels_t;

typedef struct {
  volatile uint16_t AGT;          
  volatile uint16_t AGTCMA;       
  volatile uint16_t AGTCMB;       
  volatile uint16_t _r0;          
  volatile uint8_t  AGTCR;        
  volatile uint8_t  AGTMR1;       
  volatile uint8_t  AGTMR2;       
  volatile uint8_t  AGTIOSEL_ALT; 
  volatile uint8_t  AGTIOC;       
  volatile uint8_t  AGTISR;       
  volatile uint8_t  AGTCMSR;      
  volatile uint8_t  AGTIOSEL;     
} r_agt_regs_t;

RA8_HW_REGISTER_ACCESS
static inline volatile r_agt_regs_t* ra8_agt(uint8_t channel)
{
  if ((uint16_t)channel >= k_ra8_agt_channel_count) {
    return nullptr;
  }
  return (volatile r_agt_regs_t*)(k_ra8_agt0_base_addr +
                                  ((uintptr_t)channel * (uintptr_t)k_ra8_agt_channel_stride));
}
 
#ifdef __cplusplus
}
#endif