ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_rsip_regs_fields.h File Reference

RSIP-E50D register field/value enums and the reg32 accessor. More...

#include <stdint.h>
#include "ra8_attributes.h"
#include "ra8_rsip_regs_offsets.h"
Include dependency graph for ra8_rsip_regs_fields.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Enumerations

enum  ra8_rsip_ctrl_bits_t : uint8_t {
  k_ra8_rsip_ctrl_bit_enable = 0U ,
  k_ra8_rsip_ctrl_bit_bist = 1U ,
  k_ra8_rsip_ctrl_bit_reset = 2U ,
  k_ra8_rsip_ctrl_bit_dpa_arm = 3U ,
  k_ra8_rsip_ctrl_bit_irq_glob = 4U
}
 Field positions inside the CTRL mailbox word. More...
enum  ra8_rsip_status_bits_t : uint8_t {
  k_ra8_rsip_status_bit_ready = 0U ,
  k_ra8_rsip_status_bit_busy = 1U ,
  k_ra8_rsip_status_bit_bist_ok = 2U ,
  k_ra8_rsip_status_bit_kv_ok = 3U ,
  k_ra8_rsip_status_bit_huk_ok = 4U ,
  k_ra8_rsip_status_bit_dpa_on = 5U ,
  k_ra8_rsip_status_bit_err = 7U
}
 Field positions inside the STATUS mailbox word. More...
enum  ra8_rsip_isr_bits_t : uint8_t {
  k_ra8_rsip_isr_bit_done = 0U ,
  k_ra8_rsip_isr_bit_rnd = 1U ,
  k_ra8_rsip_isr_bit_hash = 2U ,
  k_ra8_rsip_isr_bit_asym_done = 3U ,
  k_ra8_rsip_isr_bit_kv_done = 4U ,
  k_ra8_rsip_isr_bit_kdf_done = 5U ,
  k_ra8_rsip_isr_bit_err = 6U ,
  k_ra8_rsip_isr_bit_tamper = 7U
}
 Field positions inside the IER / ISR words. More...
enum  ra8_rsip_mask_t : uint32_t {
  k_ra8_rsip_mask_ctrl_enable = 0x00000001UL ,
  k_ra8_rsip_mask_ctrl_bist = 0x00000002UL ,
  k_ra8_rsip_mask_ctrl_reset = 0x00000004UL ,
  k_ra8_rsip_mask_ctrl_dpa_arm = 0x00000008UL ,
  k_ra8_rsip_mask_ctrl_irq_glob = 0x00000010UL ,
  k_ra8_rsip_mask_status_ready = 0x00000001UL ,
  k_ra8_rsip_mask_status_busy = 0x00000002UL ,
  k_ra8_rsip_mask_status_bistok = 0x00000004UL ,
  k_ra8_rsip_mask_status_kvok = 0x00000008UL ,
  k_ra8_rsip_mask_status_hukok = 0x00000010UL ,
  k_ra8_rsip_mask_status_dpa_on = 0x00000020UL ,
  k_ra8_rsip_mask_status_err = 0x00000080UL ,
  k_ra8_rsip_mask_isr_done = 0x00000001UL ,
  k_ra8_rsip_mask_isr_rnd = 0x00000002UL ,
  k_ra8_rsip_mask_isr_hash = 0x00000004UL ,
  k_ra8_rsip_mask_isr_asym_done = 0x00000008UL ,
  k_ra8_rsip_mask_isr_kv_done = 0x00000010UL ,
  k_ra8_rsip_mask_isr_kdf_done = 0x00000020UL ,
  k_ra8_rsip_mask_isr_err = 0x00000040UL ,
  k_ra8_rsip_mask_isr_tamper = 0x00000080UL ,
  k_ra8_rsip_mask_isr_all = 0x000000FFUL ,
  k_ra8_rsip_mask_kv_busy = 0x80000000UL ,
  k_ra8_rsip_mask_kv_ready = 0x80000000UL
}
 Pre-computed bit masks for the CTRL / STATUS / ISR words. More...
enum  ra8_rsip_hash_alg_t : uint32_t {
  k_ra8_rsip_hash_sha224 = 0x00000001UL ,
  k_ra8_rsip_hash_sha256 = 0x00000002UL ,
  k_ra8_rsip_hash_sha384 = 0x00000003UL ,
  k_ra8_rsip_hash_sha512 = 0x00000004UL ,
  k_ra8_rsip_hash_sha512_224 = 0x00000005UL ,
  k_ra8_rsip_hash_sha512_256 = 0x00000006UL ,
  k_ra8_rsip_hash_sha3_224 = 0x00000011UL ,
  k_ra8_rsip_hash_sha3_256 = 0x00000012UL ,
  k_ra8_rsip_hash_sha3_384 = 0x00000013UL ,
  k_ra8_rsip_hash_sha3_512 = 0x00000014UL ,
  k_ra8_rsip_hash_shake128 = 0x00000018UL ,
  k_ra8_rsip_hash_shake256 = 0x00000019UL
}
 Algorithm selector value written to the HASH CTRL word. More...
enum  ra8_rsip_oem_cmd_t : uint32_t {
  k_ra8_rsip_oem_cmd_invalid = 0U ,
  k_ra8_rsip_oem_cmd_aes128 = 5U ,
  k_ra8_rsip_oem_cmd_aes192 = 6U ,
  k_ra8_rsip_oem_cmd_aes256 = 7U ,
  k_ra8_rsip_oem_cmd_aes128_xts = 8U ,
  k_ra8_rsip_oem_cmd_aes256_xts = 9U ,
  k_ra8_rsip_oem_cmd_rsa2048_priv = 13U ,
  k_ra8_rsip_oem_cmd_rsa3072_priv = 15U ,
  k_ra8_rsip_oem_cmd_rsa4096_priv = 17U ,
  k_ra8_rsip_oem_cmd_ecc_secp256r1_priv = 23U ,
  k_ra8_rsip_oem_cmd_ecc_secp384r1_priv = 25U ,
  k_ra8_rsip_oem_cmd_hmac_sha224 = 26U ,
  k_ra8_rsip_oem_cmd_hmac_sha256 = 27U ,
  k_ra8_rsip_oem_cmd_ecc_brain256r1_priv = 29U ,
  k_ra8_rsip_oem_cmd_ecc_brain384r1_priv = 31U ,
  k_ra8_rsip_oem_cmd_ecc_brain512r1_priv = 33U ,
  k_ra8_rsip_oem_cmd_ecc_secp256k1_priv = 35U ,
  k_ra8_rsip_oem_cmd_ecc_secp521r1_priv = 37U ,
  k_ra8_rsip_oem_cmd_ecc_ed25519_priv = 39U ,
  k_ra8_rsip_oem_cmd_hmac_sha384 = 40U ,
  k_ra8_rsip_oem_cmd_hmac_sha512 = 41U ,
  k_ra8_rsip_oem_cmd_hmac_sha512_224 = 42U ,
  k_ra8_rsip_oem_cmd_hmac_sha512_256 = 43U ,
  k_ra8_rsip_oem_cmd_chacha20 = 48U
}
 OEM-key install opcode written to OEM_CTRL. More...
enum  ra8_rsip_kv_op_t : uint32_t {
  k_ra8_rsip_kv_op_idle = 0x00000000UL ,
  k_ra8_rsip_kv_op_read = 0x00000001UL ,
  k_ra8_rsip_kv_op_write = 0x00000002UL ,
  k_ra8_rsip_kv_op_erase = 0x00000003UL ,
  k_ra8_rsip_kv_op_count = 0x00000004UL
}
 Key-vault command word values written to KV_CTRL. More...
enum  ra8_rsip_sym_alg_t : uint8_t {
  k_ra8_rsip_sym_alg_aes128 = 1U ,
  k_ra8_rsip_sym_alg_aes192 = 2U ,
  k_ra8_rsip_sym_alg_aes256 = 3U ,
  k_ra8_rsip_sym_alg_chacha20 = 4U
}
 Symmetric-cipher algorithm selector low byte of SYM_CTRL. More...
enum  ra8_rsip_handle_word_t : uint16_t {
  k_ra8_rsip_handle_words_aes128 = 8U ,
  k_ra8_rsip_handle_words_aes192 = 12U ,
  k_ra8_rsip_handle_words_aes256 = 12U ,
  k_ra8_rsip_handle_words_chacha20 = 12U ,
  k_ra8_rsip_handle_words_hmac_sha224 = 12U ,
  k_ra8_rsip_handle_words_hmac_sha256 = 12U ,
  k_ra8_rsip_handle_words_hmac_sha384 = 16U ,
  k_ra8_rsip_handle_words_hmac_sha512 = 20U ,
  k_ra8_rsip_handle_words_ecc256_priv = 12U ,
  k_ra8_rsip_handle_words_ecc384_priv = 16U ,
  k_ra8_rsip_handle_words_ecc521_priv = 24U ,
  k_ra8_rsip_handle_words_rsa2048_priv = 132U ,
  k_ra8_rsip_handle_words_rsa3072_priv = 196U ,
  k_ra8_rsip_handle_words_rsa4096_priv = 260U
}
 Wrapped-key handle word counts (FSP rsip_wrapped_key_t). More...
enum  ra8_rsip_kw_op_t : uint32_t {
  k_ra8_rsip_kw_op_wrap = 0x00000001UL ,
  k_ra8_rsip_kw_op_unwrap = 0x00000002UL
}
 Key-wrap command word values written to KW_CTRL. More...
enum  ra8_rsip_dotf_route_t : uint32_t {
  k_ra8_rsip_dotf_off = 0x00000000UL ,
  k_ra8_rsip_dotf_on = 0x00000001UL
}
 DOTF key route command value written to DOTFn_CTRL. More...
enum  ra8_rsip_kdf_op_t : uint32_t {
  k_ra8_rsip_kdf_op_huk_label = 0x00000001UL ,
  k_ra8_rsip_kdf_op_uid_label = 0x00000002UL ,
  k_ra8_rsip_kdf_op_hkdf_sha256 = 0x00000010UL ,
  k_ra8_rsip_kdf_op_hkdf_sha384 = 0x00000011UL ,
  k_ra8_rsip_kdf_op_hkdf_sha512 = 0x00000012UL
}
 KDF mode selector written to KDF_CTRL. More...
enum  ra8_rsip_life_state_t : uint32_t {
  k_ra8_rsip_life_cm = 0x00000000UL ,
  k_ra8_rsip_life_ssd = 0x00000001UL ,
  k_ra8_rsip_life_nsecsd = 0x00000002UL ,
  k_ra8_rsip_life_dpl = 0x00000003UL ,
  k_ra8_rsip_life_lcm = 0x00000004UL ,
  k_ra8_rsip_life_rma = 0x00000005UL
}
 Device-lifecycle state values (off-target-only model – no documented RA8D2 register; real state is in the DLM, see ra8_rsip_devsec.c). More...
enum  ra8_rsip_debug_level_t : uint8_t {
  k_ra8_rsip_debug_al0 = 0U ,
  k_ra8_rsip_debug_al1 = 1U ,
  k_ra8_rsip_debug_al2 = 2U
}
 Debug authorisation levels AL0/AL1/AL2 (off-target-only model – no documented RA8D2 register; real state is in the DLM, see ra8_rsip_devsec.c). More...
enum  ra8_rsip_aes_mode_t : uint8_t {
  k_ra8_rsip_aes_mode_ecb = 0U ,
  k_ra8_rsip_aes_mode_cbc = 1U ,
  k_ra8_rsip_aes_mode_ctr = 2U ,
  k_ra8_rsip_aes_mode_gcm = 3U ,
  k_ra8_rsip_aes_mode_ccm = 4U ,
  k_ra8_rsip_aes_mode_xts = 5U ,
  k_ra8_rsip_aes_mode_cmac = 6U ,
  k_ra8_rsip_aes_mode_gmac = 7U
}
 Block-cipher mode selector for the AES engine. More...
enum  ra8_rsip_aes_dir_t : uint8_t {
  k_ra8_rsip_dir_encrypt = 0U ,
  k_ra8_rsip_dir_decrypt = 1U
}
 Direction selector for symmetric ciphers. More...
enum  ra8_rsip_curve_t : uint8_t {
  k_ra8_rsip_curve_secp192r1 = 0U ,
  k_ra8_rsip_curve_secp224r1 = 1U ,
  k_ra8_rsip_curve_secp256r1 = 2U ,
  k_ra8_rsip_curve_secp384r1 = 3U ,
  k_ra8_rsip_curve_secp521r1 = 4U ,
  k_ra8_rsip_curve_brain256r1 = 5U ,
  k_ra8_rsip_curve_brain384r1 = 6U ,
  k_ra8_rsip_curve_brain512r1 = 7U ,
  k_ra8_rsip_curve_ed25519 = 8U ,
  k_ra8_rsip_curve_secp256k1 = 9U
}
 ECC curve selector (HUM Ch 52.1 Table 52.1 "ECC" p 3302). More...
enum  ra8_rsip_rsa_size_t : uint16_t {
  k_ra8_rsip_rsa_1024 = 1024U ,
  k_ra8_rsip_rsa_2048 = 2048U ,
  k_ra8_rsip_rsa_3072 = 3072U ,
  k_ra8_rsip_rsa_4096 = 4096U
}
 RSA key-size selector (HUM Ch 52.1 Table 52.1 "RSA" p 3302). More...
enum  ra8_rsip_asym_op_t : uint32_t {
  k_ra8_rsip_asym_op_rsa_sign = 0x00000001UL ,
  k_ra8_rsip_asym_op_rsa_verify = 0x00000002UL ,
  k_ra8_rsip_asym_op_rsa_encrypt = 0x00000003UL ,
  k_ra8_rsip_asym_op_rsa_decrypt = 0x00000004UL ,
  k_ra8_rsip_asym_op_ecdsa_sign = 0x00000005UL ,
  k_ra8_rsip_asym_op_ecdsa_verify = 0x00000006UL ,
  k_ra8_rsip_asym_op_ecdh_compute = 0x00000007UL ,
  k_ra8_rsip_asym_op_ecc_keygen = 0x00000008UL ,
  k_ra8_rsip_asym_op_eddsa_sign = 0x00000009UL ,
  k_ra8_rsip_asym_op_eddsa_verify = 0x0000000AUL
}
 Opcode written to ASYM_CTRL to select the operation. More...
enum  ra8_rsip_rsa_pad_t : uint32_t {
  k_ra8_rsip_rsa_pad_pkcs1 = 0x00000001UL ,
  k_ra8_rsip_rsa_pad_oaep = 0x00000002UL
}
 RSA encryption padding-scheme selector written to ASYM_ARG. More...
enum  ra8_rsip_tamper_src_t : uint32_t {
  k_ra8_rsip_tamper_src_ext0 = 0x00000001UL ,
  k_ra8_rsip_tamper_src_ext1 = 0x00000002UL ,
  k_ra8_rsip_tamper_src_ext2 = 0x00000004UL ,
  k_ra8_rsip_tamper_src_ext3 = 0x00000008UL ,
  k_ra8_rsip_tamper_src_ext4 = 0x00000010UL ,
  k_ra8_rsip_tamper_src_ext5 = 0x00000020UL ,
  k_ra8_rsip_tamper_src_volt = 0x00010000UL ,
  k_ra8_rsip_tamper_src_clk = 0x00020000UL ,
  k_ra8_rsip_tamper_src_self = 0x00040000UL ,
  k_ra8_rsip_tamper_src_all = 0x0007003FUL
}
 Tamper-source identifier bits inside TAMPER_CTRL / TAMPER_STATUS. More...
enum  ra8_rsip_chacha_op_t : uint32_t {
  k_ra8_rsip_chacha_op_encrypt = 0x00000001UL ,
  k_ra8_rsip_chacha_op_decrypt = 0x00000002UL ,
  k_ra8_rsip_chacha_op_aead_encrypt = 0x00000003UL ,
  k_ra8_rsip_chacha_op_aead_decrypt = 0x00000004UL ,
  k_ra8_rsip_chacha_op_poly1305_mac = 0x00000005UL
}
 ChaCha20 / Poly1305 operation selector. More...
enum  ra8_rsip_sizes_t : uint16_t {
  k_ra8_rsip_sha224_digest_bytes = 28U ,
  k_ra8_rsip_sha256_digest_bytes = 32U ,
  k_ra8_rsip_sha256_digest_words = 8U ,
  k_ra8_rsip_sha384_digest_bytes = 48U ,
  k_ra8_rsip_sha512_digest_bytes = 64U ,
  k_ra8_rsip_sha512_224_digest_bytes = 28U ,
  k_ra8_rsip_sha512_256_digest_bytes = 32U ,
  k_ra8_rsip_sha3_224_digest_bytes = 28U ,
  k_ra8_rsip_sha3_256_digest_bytes = 32U ,
  k_ra8_rsip_sha3_384_digest_bytes = 48U ,
  k_ra8_rsip_sha3_512_digest_bytes = 64U ,
  k_ra8_rsip_aes_block_bytes = 16U ,
  k_ra8_rsip_aes128_key_bytes = 16U ,
  k_ra8_rsip_aes192_key_bytes = 24U ,
  k_ra8_rsip_aes256_key_bytes = 32U ,
  k_ra8_rsip_chacha_key_bytes = 32U ,
  k_ra8_rsip_chacha_nonce_bytes = 12U ,
  k_ra8_rsip_poly1305_tag_bytes = 16U ,
  k_ra8_rsip_gcm_tag_bytes = 16U ,
  k_ra8_rsip_ccm_tag_bytes = 16U ,
  k_ra8_rsip_huk_bytes = 32U ,
  k_ra8_rsip_uid_bytes = 16U ,
  k_ra8_rsip_trng_word_bytes = 4U ,
  k_ra8_rsip_kv_slot_bytes = 64U ,
  k_ra8_rsip_kv_slot_count = 16U
}
 Buffer sizes published to callers. More...

Functions

static volatile uint32_t * ra8_rsip_reg32 (ra8_rsip_off_t offset)
 Volatile pointer to a 32-bit RSIP register at offset.

Detailed Description

RSIP-E50D register field/value enums and the reg32 accessor.

Sub-header of ra8_rsip_regs.h. Carries every register field-position / bit-mask / command-value enum for the RSIP-E50D engine (CTRL / STATUS / ISR fields and masks, HASH algorithm selectors, OEM-key install opcodes, key-vault / key-wrap / DOTF / KDF command words, lifecycle + debug-level states, AES mode + direction, ECC curve + RSA size selectors, asymmetric opcodes, tamper sources, ChaCha20 opcodes, and the published buffer sizes), plus the ra8_rsip_reg32 register-pointer accessor.

The RSIP-E50D engine on the RA8D2 is an isolated security subsystem (HUM Ch 52 "Renesas Secure IP (RSIP-E50D)" p 3302). It is mailbox-driven; field semantics are inferred from the FSP primitives that touch REG_xxxxH in crypto_procedures_protected/.../ra8_rsip_e50d.

Since
0.1.0

Definition in file ra8_rsip_regs_fields.h.

Enumeration Type Documentation

◆ ra8_rsip_aes_dir_t

enum ra8_rsip_aes_dir_t : uint8_t

Direction selector for symmetric ciphers.

Enumerator
k_ra8_rsip_dir_encrypt 

Plaintext -> Ciphertext.

k_ra8_rsip_dir_decrypt 

Ciphertext -> Plaintext.

Definition at line 318 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_aes_mode_t

enum ra8_rsip_aes_mode_t : uint8_t

Block-cipher mode selector for the AES engine.

HUM Ch 52.1 Table 52.1 p 3302: AES supports ECB, CBC, CTR (NIST SP 800-38A), CCM (38C), GCM (38D), XTS (IEEE 1619-2007), CMAC (38B), GMAC (38D).

Enumerator
k_ra8_rsip_aes_mode_ecb 

ECB.

k_ra8_rsip_aes_mode_cbc 

CBC.

k_ra8_rsip_aes_mode_ctr 

CTR.

k_ra8_rsip_aes_mode_gcm 

GCM (AEAD).

k_ra8_rsip_aes_mode_ccm 

CCM (AEAD).

k_ra8_rsip_aes_mode_xts 

XTS.

k_ra8_rsip_aes_mode_cmac 

CMAC.

k_ra8_rsip_aes_mode_gmac 

GMAC.

Definition at line 303 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_asym_op_t

enum ra8_rsip_asym_op_t : uint32_t

Opcode written to ASYM_CTRL to select the operation.

EdDSA (Ed25519 PureEdDSA, RFC 8032) is a distinct opcode from ECDSA: the Edwards-curve signature scheme hashes the message internally (SHA-512) and is not interchangeable with the Weierstrass-curve ECDSA modular-exponentiation path. Routing an Ed25519 key through ..._ecdsa_sign would NOT produce a valid RFC 8032 signature, so the EdDSA sign / verify operations carry their own opcodes here.

Enumerator
k_ra8_rsip_asym_op_rsa_sign 

RSA signature gen.

k_ra8_rsip_asym_op_rsa_verify 

RSA signature ver.

k_ra8_rsip_asym_op_rsa_encrypt 

RSA public encrypt.

k_ra8_rsip_asym_op_rsa_decrypt 

RSA private decrypt.

k_ra8_rsip_asym_op_ecdsa_sign 

ECDSA signature gen.

k_ra8_rsip_asym_op_ecdsa_verify 

ECDSA signature ver.

k_ra8_rsip_asym_op_ecdh_compute 

ECDH shared secret.

k_ra8_rsip_asym_op_ecc_keygen 

ECC keypair gen.

k_ra8_rsip_asym_op_eddsa_sign 

Ed25519 PureEdDSA sign.

k_ra8_rsip_asym_op_eddsa_verify 

Ed25519 PureEdDSA verify.

Definition at line 364 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_chacha_op_t

enum ra8_rsip_chacha_op_t : uint32_t

ChaCha20 / Poly1305 operation selector.

Enumerator
k_ra8_rsip_chacha_op_encrypt 

ChaCha20 stream encrypt.

k_ra8_rsip_chacha_op_decrypt 

ChaCha20 stream decrypt.

k_ra8_rsip_chacha_op_aead_encrypt 

ChaCha20-Poly1305 enc.

k_ra8_rsip_chacha_op_aead_decrypt 

ChaCha20-Poly1305 dec.

k_ra8_rsip_chacha_op_poly1305_mac 

Poly1305 MAC only.

Definition at line 423 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_ctrl_bits_t

enum ra8_rsip_ctrl_bits_t : uint8_t

Field positions inside the CTRL mailbox word.

The CTRL word gates the engine clock, arms the BIST / TRNG health checks, and routes command FIFOs. Bit positions are derived from the FSP primitives that touch REG_0000H / REG_0004H.

Enumerator
k_ra8_rsip_ctrl_bit_enable 

1 = clock the engine.

k_ra8_rsip_ctrl_bit_bist 

1 = arm built-in self-test.

k_ra8_rsip_ctrl_bit_reset 

1 = soft-reset the engine.

k_ra8_rsip_ctrl_bit_dpa_arm 

1 = enable SPA/DPA countermeasures.

k_ra8_rsip_ctrl_bit_irq_glob 

1 = globally enable RSIP IRQ line.

Definition at line 48 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_curve_t

enum ra8_rsip_curve_t : uint8_t

ECC curve selector (HUM Ch 52.1 Table 52.1 "ECC" p 3302).

Enumerator
k_ra8_rsip_curve_secp192r1 

NIST P-192.

k_ra8_rsip_curve_secp224r1 

NIST P-224.

k_ra8_rsip_curve_secp256r1 

NIST P-256.

k_ra8_rsip_curve_secp384r1 

NIST P-384.

k_ra8_rsip_curve_secp521r1 

NIST P-521.

k_ra8_rsip_curve_brain256r1 

Brainpool P-256r1.

k_ra8_rsip_curve_brain384r1 

Brainpool P-384r1.

k_ra8_rsip_curve_brain512r1 

Brainpool P-512r1.

k_ra8_rsip_curve_ed25519 

Ed25519.

k_ra8_rsip_curve_secp256k1 

secp256k1.

Definition at line 327 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_debug_level_t

enum ra8_rsip_debug_level_t : uint8_t

Debug authorisation levels AL0/AL1/AL2 (off-target-only model – no documented RA8D2 register; real state is in the DLM, see ra8_rsip_devsec.c).

Enumerator
k_ra8_rsip_debug_al0 

AL0 – no debug functions available.

k_ra8_rsip_debug_al1 

AL1 – non-secure debug only.

k_ra8_rsip_debug_al2 

AL2 – secure + non-secure debug.

Definition at line 288 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_dotf_route_t

enum ra8_rsip_dotf_route_t : uint32_t

DOTF key route command value written to DOTFn_CTRL.

Enumerator
k_ra8_rsip_dotf_off 

Disable key feed.

k_ra8_rsip_dotf_on 

Feed key from slot bits 31..16.

Definition at line 251 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_handle_word_t

enum ra8_rsip_handle_word_t : uint16_t

Wrapped-key handle word counts (FSP rsip_wrapped_key_t).

A wrapped key blob is a 32-bit alg selector plus a number of 32-bit body words; the body word counts come from RSIP_WORD_SIZE_WRAPPED_KEY_* in the FSP private header.

Enumerator
k_ra8_rsip_handle_words_aes128 

AES-128 wrapped-key body.

k_ra8_rsip_handle_words_aes192 

AES-192 wrapped-key body.

k_ra8_rsip_handle_words_aes256 

AES-256 wrapped-key body.

k_ra8_rsip_handle_words_chacha20 

ChaCha20 wrapped key body.

k_ra8_rsip_handle_words_hmac_sha224 

HMAC-SHA-224 wrapped key.

k_ra8_rsip_handle_words_hmac_sha256 

HMAC-SHA-256 wrapped key.

k_ra8_rsip_handle_words_hmac_sha384 

HMAC-SHA-384 wrapped key.

k_ra8_rsip_handle_words_hmac_sha512 

HMAC-SHA-512 wrapped key.

k_ra8_rsip_handle_words_ecc256_priv 

ECC P-256 wrapped private.

k_ra8_rsip_handle_words_ecc384_priv 

ECC P-384 wrapped private.

k_ra8_rsip_handle_words_ecc521_priv 

ECC P-521 wrapped private.

k_ra8_rsip_handle_words_rsa2048_priv 

RSA-2048 wrapped private.

k_ra8_rsip_handle_words_rsa3072_priv 

RSA-3072 wrapped private.

k_ra8_rsip_handle_words_rsa4096_priv 

RSA-4096 wrapped private.

Definition at line 221 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_hash_alg_t

enum ra8_rsip_hash_alg_t : uint32_t

Algorithm selector value written to the HASH CTRL word.

Modelled algorithm-selector values for the RSIP HASH CTRL word. The shipping hash path is software SHA-256 (ra8_rsip_sha256), not this selector; HUM Ch 52 is a feature overview with no hash register map (issue #215).

Enumerator
k_ra8_rsip_hash_sha224 

SHA-224.

k_ra8_rsip_hash_sha256 

SHA-256.

k_ra8_rsip_hash_sha384 

SHA-384.

k_ra8_rsip_hash_sha512 

SHA-512.

k_ra8_rsip_hash_sha512_224 

SHA-512/224.

k_ra8_rsip_hash_sha512_256 

SHA-512/256.

k_ra8_rsip_hash_sha3_224 

SHA3-224 FIPS PUB 202.

k_ra8_rsip_hash_sha3_256 

SHA3-256 FIPS PUB 202.

k_ra8_rsip_hash_sha3_384 

SHA3-384 FIPS PUB 202.

k_ra8_rsip_hash_sha3_512 

SHA3-512 FIPS PUB 202.

k_ra8_rsip_hash_shake128 

SHAKE128 FIPS PUB 202.

k_ra8_rsip_hash_shake256 

SHAKE256 FIPS PUB 202.

Definition at line 130 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_isr_bits_t

enum ra8_rsip_isr_bits_t : uint8_t

Field positions inside the IER / ISR words.

The RSIP routes a small handful of edge-triggered events into one peripheral IRQ line; HUM Ch 52.1 Table 52.1 p 3302 names the tamper line RSIP_TADI.

Enumerator
k_ra8_rsip_isr_bit_done 

Generic command-complete.

k_ra8_rsip_isr_bit_rnd 

RNG fresh-data ready.

k_ra8_rsip_isr_bit_hash 

Hash absorption complete.

k_ra8_rsip_isr_bit_asym_done 

RSA/ECC operation complete.

k_ra8_rsip_isr_bit_kv_done 

Key vault op complete.

k_ra8_rsip_isr_bit_kdf_done 

KDF complete.

k_ra8_rsip_isr_bit_err 

Generic access/algorithm error.

k_ra8_rsip_isr_bit_tamper 

Tamper / RSIP_TADI interrupt.

Definition at line 79 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_kdf_op_t

enum ra8_rsip_kdf_op_t : uint32_t

KDF mode selector written to KDF_CTRL.

Enumerator
k_ra8_rsip_kdf_op_huk_label 

Derive from HUK + label.

k_ra8_rsip_kdf_op_uid_label 

Derive from UID + label.

k_ra8_rsip_kdf_op_hkdf_sha256 

HKDF SHA-256.

k_ra8_rsip_kdf_op_hkdf_sha384 

HKDF SHA-384.

k_ra8_rsip_kdf_op_hkdf_sha512 

HKDF SHA-512.

Definition at line 260 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_kv_op_t

enum ra8_rsip_kv_op_t : uint32_t

Key-vault command word values written to KV_CTRL.

Enumerator
k_ra8_rsip_kv_op_idle 

No-op.

k_ra8_rsip_kv_op_read 

Read slot -> KV_DATA.

k_ra8_rsip_kv_op_write 

Write KV_DATA -> slot.

k_ra8_rsip_kv_op_erase 

Zeroise slot.

k_ra8_rsip_kv_op_count 

Snapshot populated-slot count.

Definition at line 187 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_kw_op_t

enum ra8_rsip_kw_op_t : uint32_t

Key-wrap command word values written to KW_CTRL.

Enumerator
k_ra8_rsip_kw_op_wrap 

Wrap a plaintext handle -> blob.

k_ra8_rsip_kw_op_unwrap 

Unwrap a blob -> handle.

Definition at line 242 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_life_state_t

enum ra8_rsip_life_state_t : uint32_t

Device-lifecycle state values (off-target-only model – no documented RA8D2 register; real state is in the DLM, see ra8_rsip_devsec.c).

Enumerator
k_ra8_rsip_life_cm 

Chip-manufacturing.

k_ra8_rsip_life_ssd 

Secure software development.

k_ra8_rsip_life_nsecsd 

Non-secure software dev.

k_ra8_rsip_life_dpl 

Deployed.

k_ra8_rsip_life_lcm 

Locked.

k_ra8_rsip_life_rma 

Return-merchandise-auth.

Definition at line 273 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_mask_t

enum ra8_rsip_mask_t : uint32_t

Pre-computed bit masks for the CTRL / STATUS / ISR words.

Enumerator
k_ra8_rsip_mask_ctrl_enable 

CTRL.ENABLE bit.

k_ra8_rsip_mask_ctrl_bist 

CTRL.BIST bit.

k_ra8_rsip_mask_ctrl_reset 

CTRL.RESET bit.

k_ra8_rsip_mask_ctrl_dpa_arm 

CTRL.DPA_ARM bit.

k_ra8_rsip_mask_ctrl_irq_glob 

CTRL.IRQ_GLOB bit.

k_ra8_rsip_mask_status_ready 

STATUS.READY bit.

k_ra8_rsip_mask_status_busy 

STATUS.BUSY bit.

k_ra8_rsip_mask_status_bistok 

STATUS.BIST_OK.

k_ra8_rsip_mask_status_kvok 

STATUS.KV_OK.

k_ra8_rsip_mask_status_hukok 

STATUS.HUK_OK.

k_ra8_rsip_mask_status_dpa_on 

STATUS.DPA_ON.

k_ra8_rsip_mask_status_err 

STATUS.ERR bit.

k_ra8_rsip_mask_isr_done 

ISR.DONE bit.

k_ra8_rsip_mask_isr_rnd 

ISR.RND bit.

k_ra8_rsip_mask_isr_hash 

ISR.HASH bit.

k_ra8_rsip_mask_isr_asym_done 

ISR.ASYM_DONE bit.

k_ra8_rsip_mask_isr_kv_done 

ISR.KV_DONE bit.

k_ra8_rsip_mask_isr_kdf_done 

ISR.KDF_DONE bit.

k_ra8_rsip_mask_isr_err 

ISR.ERR bit.

k_ra8_rsip_mask_isr_tamper 

ISR.TAMPER bit.

k_ra8_rsip_mask_isr_all 

Union of ISR bits.

k_ra8_rsip_mask_kv_busy 

Key-op status BUSY.

k_ra8_rsip_mask_kv_ready 

Key-op status READY.

Definition at line 94 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_oem_cmd_t

enum ra8_rsip_oem_cmd_t : uint32_t

OEM-key install opcode written to OEM_CTRL.

Mirrors the rsip_oem_cmd_t table in the FSP key-injection driver (r_rsip_key_injection.c). These opcodes select which algorithm + key length the OEM-flow installs into the wrapped key vault. HUM Ch 52 documents no key-vault register map (issue #215); the opcode values come from the FSP primitive above.

Enumerator
k_ra8_rsip_oem_cmd_invalid 

Sentinel / unused.

k_ra8_rsip_oem_cmd_aes128 

AES-128.

k_ra8_rsip_oem_cmd_aes192 

AES-192.

k_ra8_rsip_oem_cmd_aes256 

AES-256.

k_ra8_rsip_oem_cmd_aes128_xts 

AES-128 XTS.

k_ra8_rsip_oem_cmd_aes256_xts 

AES-256 XTS.

k_ra8_rsip_oem_cmd_rsa2048_priv 

RSA-2048 private.

k_ra8_rsip_oem_cmd_rsa3072_priv 

RSA-3072 private.

k_ra8_rsip_oem_cmd_rsa4096_priv 

RSA-4096 private.

k_ra8_rsip_oem_cmd_ecc_secp256r1_priv 

ECC NIST P-256 private.

k_ra8_rsip_oem_cmd_ecc_secp384r1_priv 

ECC NIST P-384 private.

k_ra8_rsip_oem_cmd_hmac_sha224 

HMAC-SHA-224.

k_ra8_rsip_oem_cmd_hmac_sha256 

HMAC-SHA-256.

k_ra8_rsip_oem_cmd_ecc_brain256r1_priv 

ECC Brainpool P-256.

k_ra8_rsip_oem_cmd_ecc_brain384r1_priv 

ECC Brainpool P-384.

k_ra8_rsip_oem_cmd_ecc_brain512r1_priv 

ECC Brainpool P-512.

k_ra8_rsip_oem_cmd_ecc_secp256k1_priv 

ECC secp256k1 private.

k_ra8_rsip_oem_cmd_ecc_secp521r1_priv 

ECC NIST P-521 private.

k_ra8_rsip_oem_cmd_ecc_ed25519_priv 

Ed25519 private.

k_ra8_rsip_oem_cmd_hmac_sha384 

HMAC-SHA-384.

k_ra8_rsip_oem_cmd_hmac_sha512 

HMAC-SHA-512.

k_ra8_rsip_oem_cmd_hmac_sha512_224 

HMAC-SHA-512/224.

k_ra8_rsip_oem_cmd_hmac_sha512_256 

HMAC-SHA-512/256.

k_ra8_rsip_oem_cmd_chacha20 

ChaCha20.

Definition at line 156 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_rsa_pad_t

enum ra8_rsip_rsa_pad_t : uint32_t

RSA encryption padding-scheme selector written to ASYM_ARG.

Selects the RSAES padding applied around the RSA primitive for the public-encrypt (ra8_rsip_rsa_encrypt) and private-decrypt (ra8_rsip_rsa_decrypt) entry points. RSAES-OAEP (PKCS #1 v2.2 Section 7.1, SHA-256 MGF1) is the recommended scheme for RSA-OAEP key transport; RSAES-PKCS1-v1_5 (Section 7.2) is provided for interop with legacy peers.

Enumerator
k_ra8_rsip_rsa_pad_pkcs1 

RSAES-PKCS1-v1_5 (legacy).

k_ra8_rsip_rsa_pad_oaep 

RSAES-OAEP (SHA-256 MGF1).

Definition at line 389 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_rsa_size_t

enum ra8_rsip_rsa_size_t : uint16_t

RSA key-size selector (HUM Ch 52.1 Table 52.1 "RSA" p 3302).

Enumerator
k_ra8_rsip_rsa_1024 

1024-bit RSA.

k_ra8_rsip_rsa_2048 

2048-bit RSA.

k_ra8_rsip_rsa_3072 

3072-bit RSA.

k_ra8_rsip_rsa_4096 

4096-bit RSA.

Definition at line 344 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_sizes_t

enum ra8_rsip_sizes_t : uint16_t

Buffer sizes published to callers.

AES block size = 128 bits (HUM Ch 52.1 Table 52.1 "Symmetric cryptography" p 3302). Hash digest sizes follow FIPS PUB 180-4 / FIPS PUB 202.

Enumerator
k_ra8_rsip_sha224_digest_bytes 

SHA-224 digest length.

k_ra8_rsip_sha256_digest_bytes 

SHA-256 digest length.

k_ra8_rsip_sha256_digest_words 

SHA-256 = 8 * uint32_t.

k_ra8_rsip_sha384_digest_bytes 

SHA-384 digest length.

k_ra8_rsip_sha512_digest_bytes 

SHA-512 digest length.

k_ra8_rsip_sha512_224_digest_bytes 

SHA-512/224 length.

k_ra8_rsip_sha512_256_digest_bytes 

SHA-512/256 length.

k_ra8_rsip_sha3_224_digest_bytes 

SHA3-224 length.

k_ra8_rsip_sha3_256_digest_bytes 

SHA3-256 length.

k_ra8_rsip_sha3_384_digest_bytes 

SHA3-384 length.

k_ra8_rsip_sha3_512_digest_bytes 

SHA3-512 length.

k_ra8_rsip_aes_block_bytes 

AES block = 128 bits.

k_ra8_rsip_aes128_key_bytes 

AES-128 key length.

k_ra8_rsip_aes192_key_bytes 

AES-192 key length.

k_ra8_rsip_aes256_key_bytes 

AES-256 key length.

k_ra8_rsip_chacha_key_bytes 

ChaCha20 256-bit key.

k_ra8_rsip_chacha_nonce_bytes 

RFC 7539 12-byte nonce.

k_ra8_rsip_poly1305_tag_bytes 

Poly1305 16-byte MAC.

k_ra8_rsip_gcm_tag_bytes 

AES-GCM 128-bit tag.

k_ra8_rsip_ccm_tag_bytes 

AES-CCM max tag = 128b.

k_ra8_rsip_huk_bytes 

256-bit HUK.

k_ra8_rsip_uid_bytes 

128-bit Unique ID.

k_ra8_rsip_trng_word_bytes 

Bytes per TRNG read.

k_ra8_rsip_kv_slot_bytes 

Wrapped-key blob size.

k_ra8_rsip_kv_slot_count 

Number of vault slots.

Definition at line 440 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_status_bits_t

enum ra8_rsip_status_bits_t : uint8_t

Field positions inside the STATUS mailbox word.

Enumerator
k_ra8_rsip_status_bit_ready 

1 = idle and ready for command.

k_ra8_rsip_status_bit_busy 

1 = engine is running a command.

k_ra8_rsip_status_bit_bist_ok 

1 = self-test passed.

k_ra8_rsip_status_bit_kv_ok 

1 = key vault initialized.

k_ra8_rsip_status_bit_huk_ok 

1 = HUK loaded and unwrapped.

k_ra8_rsip_status_bit_dpa_on 

1 = SPA/DPA countermeasures live.

k_ra8_rsip_status_bit_err 

1 = access-management error.

Definition at line 60 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_sym_alg_t

enum ra8_rsip_sym_alg_t : uint8_t

Symmetric-cipher algorithm selector low byte of SYM_CTRL.

The cipher engine multiplexes AES-128/192/256 and ChaCha20 across the same data path. The low byte selects the algorithm + key length; the next byte selects the mode (ra8_rsip_aes_mode_t); the next byte selects the direction (ra8_rsip_aes_dir_t).

Enumerator
k_ra8_rsip_sym_alg_aes128 

AES with a 128-bit key.

k_ra8_rsip_sym_alg_aes192 

AES with a 192-bit key.

k_ra8_rsip_sym_alg_aes256 

AES with a 256-bit key.

k_ra8_rsip_sym_alg_chacha20 

ChaCha20 stream cipher.

Definition at line 205 of file ra8_rsip_regs_fields.h.

◆ ra8_rsip_tamper_src_t

enum ra8_rsip_tamper_src_t : uint32_t

Tamper-source identifier bits inside TAMPER_CTRL / TAMPER_STATUS.

Invented off-target-only model: six external tamper lines plus three internal sources (RSIP self-fault, voltage glitch, clock glitch). The RA8D2 exposes no such RSIP tamper register – real tamper is an I/O-port feature whose response is handled by the RTC / MRAM / VBATT blocks. See ra8_rsip_devsec.c.

Enumerator
k_ra8_rsip_tamper_src_ext0 

External tamper input 0.

k_ra8_rsip_tamper_src_ext1 

External tamper input 1.

k_ra8_rsip_tamper_src_ext2 

External tamper input 2.

k_ra8_rsip_tamper_src_ext3 

External tamper input 3.

k_ra8_rsip_tamper_src_ext4 

External tamper input 4.

k_ra8_rsip_tamper_src_ext5 

External tamper input 5.

k_ra8_rsip_tamper_src_volt 

Voltage-glitch detector.

k_ra8_rsip_tamper_src_clk 

Clock-glitch detector.

k_ra8_rsip_tamper_src_self 

RSIP internal self-fault.

k_ra8_rsip_tamper_src_all 

Union of all sources.

Definition at line 406 of file ra8_rsip_regs_fields.h.

Function Documentation

◆ ra8_rsip_reg32()

volatile uint32_t * ra8_rsip_reg32 ( ra8_rsip_off_t offset)
inlinestatic

Volatile pointer to a 32-bit RSIP register at offset.

Mirrors the ra8_glcdc_reg32 accessor pattern so the host test build can intercept reads and writes via ra8_fake_mmap. The accessor performs no validation; callers pass a value from ra8_rsip_off_t.

Parameters
[in]offsetOne of the k_ra8_rsip_off_* values.
Returns
Volatile pointer to the register cell.

Definition at line 481 of file ra8_rsip_regs_fields.h.

References k_ra8_rsip_base_addr.

Referenced by internal_run_bist(), priv_complete(), priv_load_handle(), priv_push_bytes_to_port(), priv_push_handle_body(), priv_push_iv_lanes(), priv_wait_bit(), ra8_rsip_clear_status(), ra8_rsip_deinit(), ra8_rsip_dispatch(), ra8_rsip_enter_stop(), ra8_rsip_exit_stop(), ra8_rsip_get_status(), ra8_rsip_init(), ra8_rsip_sha256(), and ra8_rsip_trng_read().