ra8_i3c.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
 
#include "ra8_err.h"

typedef enum : uint8_t {
  k_ra8_i3c_mode_native = 0U, 
  k_ra8_i3c_mode_i2c    = 1U, 
} ra8_i3c_mode_t;

typedef struct {
  ra8_i3c_mode_t mode;     
  uint32_t       bus_hz;   
  uint32_t       pclka_hz; 
} ra8_i3c_cfg_t;

typedef enum : uint8_t {
  k_ra8_i3c_err_none     = 0x00U, 
  k_ra8_i3c_err_arb_lost = 0x01U, 
  k_ra8_i3c_err_nack     = 0x02U, 
  k_ra8_i3c_err_timeout  = 0x04U, 
} ra8_i3c_err_t;

typedef void (*ra8_i3c_event_fn_t)(void* ctx, uint32_t status);

typedef struct {
  uint8_t pid[6];          
  uint8_t bcr;             
  uint8_t dcr;             
  uint8_t dynamic_address; 
} ra8_i3c_daa_target_t;

typedef enum : uint8_t {
  k_ra8_i3c_ibi_type_interrupt    = 0U, 
  k_ra8_i3c_ibi_type_hot_join     = 1U, 
  k_ra8_i3c_ibi_type_main_request = 2U, 
} ra8_i3c_ibi_type_t;

typedef struct {
  uint8_t            address;     
  ra8_i3c_ibi_type_t type;        
  uint8_t            payload_len; 
  uint8_t            payload[8];  
  uint8_t            last;        
} ra8_i3c_ibi_t;

typedef enum : uint8_t {
  k_ra8_i3c_hdr_mode_sdr = 0U, 
  k_ra8_i3c_hdr_mode_ddr = 1U, 
  k_ra8_i3c_hdr_mode_ts  = 2U, 
} ra8_i3c_hdr_mode_t;
 
/* =========================================================================
 * Lifecycle (shared)
 * =========================================================================
 */

[[nodiscard]] ra8_err_t ra8_i3c_init(uint8_t channel, const ra8_i3c_cfg_t* cfg);

[[nodiscard]] ra8_err_t ra8_i3c_deinit(uint8_t channel);
 
/* =========================================================================
 * Data path (shared, mode-dispatched)
 * =========================================================================
 */

[[nodiscard]] ra8_err_t
ra8_i3c_write(uint8_t channel, uint8_t addr, const uint8_t* data, uint32_t len, bool restart);

[[nodiscard]] ra8_err_t
ra8_i3c_read(uint8_t channel, uint8_t addr, uint8_t* buf, uint32_t len, bool restart);

[[nodiscard]] ra8_err_t ra8_i3c_transfer(uint8_t        channel,
                                         uint8_t        addr,
                                         const uint8_t* wr,
                                         uint32_t       wr_len,
                                         uint8_t*       rd,
                                         uint32_t       rd_len);
 
/* =========================================================================
 * I2C-mode-only
 * =========================================================================
 */

[[nodiscard]] ra8_err_t ra8_i3c_set_clock(uint8_t channel, uint32_t bus_hz, uint32_t pclka_hz);

[[nodiscard]] ra8_err_t ra8_i3c_scan(uint8_t channel, uint8_t addr, bool* out_acked);

[[nodiscard]] ra8_err_t ra8_i3c_get_errors(uint8_t channel, uint8_t* out_mask);

[[nodiscard]] ra8_err_t ra8_i3c_clear_errors(uint8_t channel);

[[nodiscard]] ra8_err_t ra8_i3c_abort(uint8_t channel);
 
/* =========================================================================
 * IRQ / status (shared)
 * =========================================================================
 */

[[nodiscard]] ra8_err_t ra8_i3c_attach_handler(uint8_t channel, ra8_i3c_event_fn_t fn, void* ctx);

void ra8_i3c_dispatch(uint8_t channel);
 
/* =========================================================================
 * Native-mode-only (single I3C0 instance)
 * =========================================================================
 */

[[nodiscard]] ra8_err_t ra8_i3c_set_address(uint32_t addr);

[[nodiscard]] ra8_err_t ra8_i3c_bus_enable(bool enable);

[[nodiscard]] ra8_err_t ra8_i3c_get_status(uint32_t* out_mask);

[[nodiscard]] ra8_err_t ra8_i3c_clear_status(uint32_t mask);

[[nodiscard]] ra8_err_t ra8_i3c_enter_stop(void);

[[nodiscard]] ra8_err_t ra8_i3c_exit_stop(void);

[[nodiscard]] ra8_err_t ra8_i3c_dynamic_address_assign(ra8_i3c_daa_target_t* targets,
                                                       uint8_t               target_count);

[[nodiscard]] ra8_err_t ra8_i3c_set_dynamic_address(uint8_t static_addr, uint8_t dynamic_addr);

[[nodiscard]] ra8_err_t ra8_i3c_reset_dynamic_addresses(void);

[[nodiscard]] ra8_err_t
ra8_i3c_send_ccc(uint8_t ccc, uint8_t target_addr, const uint8_t* payload, uint8_t len);

[[nodiscard]] ra8_err_t
ra8_i3c_recv_ccc(uint8_t ccc, uint8_t target_addr, uint8_t* buf, uint8_t max_len, uint8_t* got_len);

[[nodiscard]] ra8_err_t ra8_i3c_set_hdr_mode(uint8_t target_addr, ra8_i3c_hdr_mode_t mode);

[[nodiscard]] ra8_err_t ra8_i3c_ibi_enable(uint8_t target_addr);

[[nodiscard]] ra8_err_t ra8_i3c_ibi_drain(ra8_i3c_ibi_t* ibi);

[[nodiscard]] ra8_err_t ra8_i3c_ibi_read(ra8_i3c_ibi_t* out_ibi);

[[nodiscard]] ra8_err_t ra8_i3c_target_open(uint8_t static_addr);
 
/* =========================================================================
 * I2C-compatibility peripheral (responder) mode
 * =========================================================================
 */

typedef struct {
  uint8_t peripheral_addr_7b; 
  uint8_t general_call;       
} ra8_i3c_peripheral_cfg_t;

typedef enum : uint8_t {
  k_ra8_i3c_peripheral_status_idle     = 0x00U, 
  k_ra8_i3c_peripheral_status_aas      = 0x01U, 
  k_ra8_i3c_peripheral_status_rx_full  = 0x02U, 
  k_ra8_i3c_peripheral_status_tx_empty = 0x04U, 
  k_ra8_i3c_peripheral_status_stop     = 0x08U, 
  k_ra8_i3c_peripheral_status_nack     = 0x10U, 
} ra8_i3c_peripheral_status_t;

[[nodiscard]] ra8_err_t ra8_i3c_peripheral_open(uint8_t                         channel,
                                                const ra8_i3c_peripheral_cfg_t* cfg);

[[nodiscard]] ra8_err_t ra8_i3c_peripheral_close(uint8_t channel);

[[nodiscard]] ra8_err_t ra8_i3c_peripheral_send(uint8_t channel, const uint8_t* data, uint32_t len);

[[nodiscard]] ra8_err_t ra8_i3c_peripheral_receive(uint8_t channel, uint8_t* buf, uint32_t len);

[[nodiscard]] ra8_err_t ra8_i3c_peripheral_status(uint8_t channel, uint8_t* out_mask);
 
#ifdef __cplusplus
}
#endif