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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Per-channel bring-up configuration for ra8_i3c_init. More...
#include <ra8_i3c.h>
Data Fields | |
| ra8_i3c_mode_t | mode |
| Operating mode for this channel. | |
| uint32_t | bus_hz |
| Target bus clock in Hz (I2C mode). | |
| uint32_t | pclka_hz |
| Source clock for the bit-rate calc (I2C). | |
Per-channel bring-up configuration for ra8_i3c_init.
bus_hz and pclka_hz are used by the I2C-compat mode to compute the STDBR bit-rate divider; native mode currently ignores them (SCL is driven from the I3C clock tree). mode selects the operating mode.
bus_hz and pclka_hz are non-zero in I2C mode. | uint32_t ra8_i3c_cfg_t::bus_hz |
Target bus clock in Hz (I2C mode).
Definition at line 92 of file ra8_i3c.h.
Referenced by ra8_i3c_init().
| ra8_i3c_mode_t ra8_i3c_cfg_t::mode |
Operating mode for this channel.
Definition at line 91 of file ra8_i3c.h.
Referenced by ra8_i3c_init(), and ra8_nsc_iic_init().
| uint32_t ra8_i3c_cfg_t::pclka_hz |
Source clock for the bit-rate calc (I2C).
Definition at line 93 of file ra8_i3c.h.
Referenced by ra8_i3c_init().