ra8_usb_regs.h File Reference

USB Full-Speed + High-Speed controller layout for the Renesas RA8D2. More...

#include <stddef.h>
#include <stdint.h>
#include "ra8_attributes.h"

Include dependency graph for ra8_usb_regs.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures
struct	r_usb_regs_t
	USB FS / HS register window (device-mode subset). More...

Enumerations
enum	ra8_usb_addr_t : uintptr_t {   k_ra8_usb_fs0_base_addr = 0x40250000UL ,   k_ra8_usb_hs0_base_addr = 0x40351000UL }
	Per-instance base addresses for the two USB controllers. More...
enum	ra8_usb_limits_t : uint8_t {   k_ra8_usb_pipe_count = 10U ,   k_ra8_usb_pipectr_count = 9U ,   k_ra8_usb_pad_2 = 2U ,   k_ra8_usb_pad_3 = 3U ,   k_ra8_usb_pad_5 = 5U ,   k_ra8_usb_pad_8 = 8U ,   k_ra8_usb_dcp_max_packet_fs = 64U }
	Pipe / endpoint count constants. More...
enum	ra8_usb_offset_t : uint16_t {   k_ra8_usb_off_syscfg = 0x000U ,   k_ra8_usb_off_buswait = 0x002U ,   k_ra8_usb_off_syssts0 = 0x004U ,   k_ra8_usb_off_dvstctr0 = 0x008U ,   k_ra8_usb_off_cfifo = 0x014U ,   k_ra8_usb_off_d0fifo = 0x018U ,   k_ra8_usb_off_d1fifo = 0x01CU ,   k_ra8_usb_off_cfifosel = 0x020U ,   k_ra8_usb_off_cfifoctr = 0x022U ,   k_ra8_usb_off_d0fifosel = 0x028U ,   k_ra8_usb_off_d0fifoctr = 0x02AU ,   k_ra8_usb_off_d1fifosel = 0x02CU ,   k_ra8_usb_off_d1fifoctr = 0x02EU ,   k_ra8_usb_off_intenb0 = 0x030U ,   k_ra8_usb_off_intenb1 = 0x032U ,   k_ra8_usb_off_brdyenb = 0x036U ,   k_ra8_usb_off_nrdyenb = 0x038U ,   k_ra8_usb_off_bempenb = 0x03AU ,   k_ra8_usb_off_sofcfg = 0x03CU ,   k_ra8_usb_off_intsts0 = 0x040U ,   k_ra8_usb_off_intsts1 = 0x042U ,   k_ra8_usb_off_brdysts = 0x046U ,   k_ra8_usb_off_nrdysts = 0x048U ,   k_ra8_usb_off_bempsts = 0x04AU ,   k_ra8_usb_off_frmnum = 0x04CU ,   k_ra8_usb_off_usbaddr = 0x050U ,   k_ra8_usb_off_usbreq = 0x054U ,   k_ra8_usb_off_usbval = 0x056U ,   k_ra8_usb_off_usbindx = 0x058U ,   k_ra8_usb_off_usbleng = 0x05AU ,   k_ra8_usb_off_dcpcfg = 0x05CU ,   k_ra8_usb_off_dcpmaxp = 0x05EU ,   k_ra8_usb_off_dcpctr = 0x060U ,   k_ra8_usb_off_pipesel = 0x064U ,   k_ra8_usb_off_pipecfg = 0x068U ,   k_ra8_usb_off_pipebuf = 0x06AU ,   k_ra8_usb_off_pipemaxp = 0x06CU ,   k_ra8_usb_off_pipeperi = 0x06EU ,   k_ra8_usb_off_pipectr = 0x070U }
	Byte offsets of the named USB register fields within r_usb_regs_t. More...
enum	ra8_usb_size_t : uint16_t { k_ra8_usb_window_bytes = 0x082U }
	Total byte size of the modelled USB register window. More...
enum	ra8_usbhs_offset_t : uint16_t {   k_ra8_usbhs_off_pllsta = 0x006U ,   k_ra8_usbhs_off_physet = 0x03EU ,   k_ra8_usbhs_off_lpsts = 0x102U }
	Byte offsets of USBHS-only registers not modelled in r_usb_regs_t. More...
enum	ra8_usbhs_physet_bit_t : uint16_t {   k_ra8_physet_dirpd = 0x0001U ,   k_ra8_physet_pllreset = 0x0002U ,   k_ra8_physet_clksel = 0x0030U ,   k_ra8_physet_clksel_12 = 0x0000U ,   k_ra8_physet_clksel_48 = 0x0010U ,   k_ra8_physet_clksel_20 = 0x0020U ,   k_ra8_physet_clksel_24 = 0x0030U ,   k_ra8_physet_repsel_16 = 0x0100U ,   k_ra8_physet_hseb = 0x8000U }
	PHYSET bit positions and masks (HUM Ch 37 "PHYSET" register). More...
enum	ra8_usbhs_lpsts_bit_t : uint16_t { k_ra8_lpsts_suspendm = 0x4000U }
	LPSTS bit positions (HUM Ch 37 "LPSTS" register). More...
enum	ra8_usbhs_pllsta_bit_t : uint16_t { k_ra8_pllsta_plllock = 0x0001U }
	PLLSTA bit positions (HUM Ch 37 "PLLSTA" register). More...
enum	ra8_usbhs_buswait_t : uint16_t { k_ra8_buswait_default = 0x0F04U }
	BUSWAIT canonical value (HUM Ch 37 "BUSWAIT"). More...
enum	ra8_usb_syscfg_bit_t : uint8_t {   k_ra8_syscfg_bit_usbe = 0U ,   k_ra8_syscfg_bit_dprpu = 4U ,   k_ra8_syscfg_bit_drpd = 5U ,   k_ra8_syscfg_bit_dcfm = 6U ,   k_ra8_syscfg_bit_hse = 7U ,   k_ra8_syscfg_bit_cnen = 8U ,   k_ra8_syscfg_bit_scke = 10U }
	SYSCFG bit positions. More...
enum	ra8_usb_intenb0_bit_t : uint8_t {   k_ra8_int0_bit_brdy = 8U ,   k_ra8_int0_bit_nrdy = 9U ,   k_ra8_int0_bit_bemp = 10U ,   k_ra8_int0_bit_ctrt = 11U ,   k_ra8_int0_bit_dvst = 12U ,   k_ra8_int0_bit_sofr = 13U ,   k_ra8_int0_bit_rsme = 14U ,   k_ra8_int0_bit_vbse = 15U }
	INTENB0 / INTSTS0 bit positions (the layouts match). More...
enum	ra8_usb_intsts1_bit_t : uint8_t {   k_ra8_int1_bit_sack = 4U ,   k_ra8_int1_bit_sign = 5U ,   k_ra8_int1_bit_eoferr = 6U ,   k_ra8_int1_bit_attch = 11U ,   k_ra8_int1_bit_dtch = 12U ,   k_ra8_int1_bit_bchg = 14U ,   k_ra8_int1_bit_ovrcr = 15U }
	INTSTS1 / INTENB1 host-mode bit positions (HUM Ch 36.2.11/15). More...
enum	ra8_usb_intenb0_mask_t : uint16_t { k_ra8_int0_full_mask = 0x9F00U }
	INTENB0 aggregate masks (HUM Ch 36.2.10 p 1980). More...
enum	ra8_usb_intsts0_mask_t : uint16_t {   k_ra8_intsts0_mask_ctsq = 0x0007U ,   k_ra8_intsts0_mask_valid = 0x0008U ,   k_ra8_intsts0_mask_dvsq = 0x0070U ,   k_ra8_intsts0_mask_vbsts = 0x0080U }
	INTSTS0 multi-bit field masks. More...
enum	ra8_usb_dvsq_t : uint16_t {   k_ra8_dvsq_powered = 0x0000U ,   k_ra8_dvsq_default = 0x0010U ,   k_ra8_dvsq_address = 0x0020U ,   k_ra8_dvsq_configured = 0x0030U ,   k_ra8_dvsq_suspend = 0x0040U }
	Device-state values reported in INTSTS0.DVSQ[2:0]. More...
enum	ra8_usb_ctsq_t : uint16_t {   k_ra8_ctsq_idle = 0x0000U ,   k_ra8_ctsq_rdds = 0x0001U ,   k_ra8_ctsq_rdss = 0x0002U ,   k_ra8_ctsq_wrds = 0x0003U ,   k_ra8_ctsq_wrss = 0x0004U ,   k_ra8_ctsq_wrnd = 0x0005U ,   k_ra8_ctsq_sqer = 0x0006U }
	Control-transfer-stage values reported in INTSTS0.CTSQ[2:0]. More...
enum	ra8_usb_dcpctr_bit_t : uint8_t {   k_ra8_dcpctr_bit_pid_lo = 0U ,   k_ra8_dcpctr_bit_pid_hi = 1U ,   k_ra8_dcpctr_bit_ccpl = 2U ,   k_ra8_dcpctr_bit_pbusy = 5U ,   k_ra8_dcpctr_bit_sqmon = 6U ,   k_ra8_dcpctr_bit_sqset = 7U ,   k_ra8_dcpctr_bit_sqclr = 8U ,   k_ra8_dcpctr_bit_sureqclr = 11U ,   k_ra8_dcpctr_bit_sureq = 14U ,   k_ra8_dcpctr_bit_bsts = 15U }
	DCPCTR bit positions used by the device-mode driver. More...
enum	ra8_usb_dcpcfg_bit_t : uint8_t { k_ra8_dcpcfg_bit_dir = 4U }
	DCPCFG bit positions used by the control-transfer engine. More...
enum	ra8_usb_pid_t : uint16_t {   k_ra8_pid_nak = 0x0000U ,   k_ra8_pid_buf = 0x0001U ,   k_ra8_pid_stall = 0x0002U ,   k_ra8_pid_mask = 0x0003U }
	Response PID values written into the low two bits of DCPCTR / PIPECTR. More...
enum	ra8_usb_fifosel_field_t : uint16_t {   k_ra8_fifosel_curpipe = 0x000FU ,   k_ra8_fifosel_isel = 0x0020U ,   k_ra8_fifosel_bigend = 0x0100U ,   k_ra8_fifosel_mbw_8 = 0x0000U ,   k_ra8_fifosel_mbw_16 = 0x0400U ,   k_ra8_fifosel_mbw_32 = 0x0800U ,   k_ra8_fifosel_mbw_msk = 0x0C00U ,   k_ra8_fifosel_dreqe = 0x1000U ,   k_ra8_fifosel_dclrm = 0x2000U ,   k_ra8_fifosel_rew = 0x4000U ,   k_ra8_fifosel_rcnt = 0x8000U }
	CFIFOSEL / DxFIFOSEL field masks. More...
enum	ra8_usb_fifoctr_field_t : uint16_t {   k_ra8_fifoctr_dtln = 0x0FFFU ,   k_ra8_fifoctr_frdy = 0x2000U ,   k_ra8_fifoctr_bclr = 0x4000U ,   k_ra8_fifoctr_bval = 0x8000U }
	CFIFOCTR / DxFIFOCTR field masks. More...
enum	ra8_usb_addr_field_t : uint16_t { k_ra8_usbaddr_addr_mask = 0x007FU }
	USBADDR field masks. More...
enum	ra8_usb_pipecfg_field_t : uint16_t {   k_ra8_pipecfg_epnum_mask = 0x000FU ,   k_ra8_pipecfg_dir_in = 0x0010U ,   k_ra8_pipecfg_shtnak = 0x0080U ,   k_ra8_pipecfg_dblb = 0x0200U ,   k_ra8_pipecfg_bfre = 0x0400U ,   k_ra8_pipecfg_type_bulk = 0x4000U ,   k_ra8_pipecfg_type_intr = 0x8000U ,   k_ra8_pipecfg_type_iso = 0xC000U ,   k_ra8_pipecfg_type_mask = 0xC000U }
	PIPECFG field masks / shifts used by the driver. More...
enum	ra8_usb_pipebuf_field_t : uint16_t {   k_ra8_pipebuf_bufnmb_mask = 0x00FFU ,   k_ra8_pipebuf_bufsize_mask = 0x7C00U ,   k_ra8_pipebuf_bufsize_shift = 10U ,   k_ra8_pipebuf_block_bytes = 64U }
	PIPEBUF field masks / shifts. More...
enum	ra8_usb_pipectr_bit_t : uint16_t {   k_ra8_pipectr_pid_mask = 0x0003U ,   k_ra8_pipectr_pbusy = 0x0020U ,   k_ra8_pipectr_sqmon = 0x0040U ,   k_ra8_pipectr_sqset = 0x0080U ,   k_ra8_pipectr_sqclr = 0x0100U ,   k_ra8_pipectr_aclrm = 0x0200U ,   k_ra8_pipectr_atrepm = 0x0400U ,   k_ra8_pipectr_inbufm = 0x4000U ,   k_ra8_pipectr_bsts = 0x8000U }
	PIPECTR bit positions / fields used by the driver. More...

Functions
static volatile r_usb_regs_t *	ra8_usb_fs (void)
	Compile-time offset and size insurance for r_usb_regs_t.
static volatile r_usb_regs_t *	ra8_usb_hs (void)
	Get pointer to the USB HS controller register block.
static volatile uint16_t *	ra8_usbhs_pllsta (void)
	Get pointer to USBHS PLLSTA register (read-only).
static volatile uint16_t *	ra8_usbhs_physet (void)
	Get pointer to USBHS PHYSET register.
static volatile uint16_t *	ra8_usbhs_lpsts (void)
	Get pointer to USBHS LPSTS register.

Detailed Description

USB Full-Speed + High-Speed controller layout for the Renesas RA8D2.

RA8D2 has two USB controllers:

• USB FS at 0x40250000 – 12 Mbps, integrated PHY (HUM Ch 36).
• USB HS at 0x40351000 – 480 Mbps, embedded HS PHY (HUM Ch 37).

Both use the Renesas "USB2_B" IP (common across RA / RZ / RX). The register layouts are identical between the two instances for the device-side bring-up subset modelled here; HS-only registers (PHYSET, LPSTS, PLLSTA, ...) live past offset 0x90 and are not consumed by the device-mode driver yet.

Device and host mode share the same register block; the mode bit is in SYSCFG.DCFM. This driver targets device mode only.

Register map (device-mode subset)

Offset	Name	Width	Purpose
0x000	SYSCFG	16	System Configuration
0x002	BUSWAIT	16	CPU bus wait
0x004	SYSSTS0	16	System Status 0
0x008	DVSTCTR0	16	Device State Control 0
0x014	CFIFO	16	Control FIFO port
0x018	D0FIFO	16	DMA FIFO 0
0x01C	D1FIFO	16	DMA FIFO 1
0x020	CFIFOSEL	16	Control FIFO select
0x022	CFIFOCTR	16	Control FIFO control (FRDY/BVAL/BCLR)
0x028	D0FIFOSEL	16	DMA FIFO 0 select
0x02A	D0FIFOCTR	16	DMA FIFO 0 control
0x02C	D1FIFOSEL	16	DMA FIFO 1 select
0x02E	D1FIFOCTR	16	DMA FIFO 1 control
0x030	INTENB0	16	Interrupt Enable 0
0x032	INTENB1	16	Interrupt Enable 1
0x036	BRDYENB	16	BRDY Interrupt Enable
0x038	NRDYENB	16	NRDY Interrupt Enable
0x03A	BEMPENB	16	BEMP Interrupt Enable
0x03C	SOFCFG	16	SOF Output Configuration
0x040	INTSTS0	16	Interrupt Status 0
0x042	INTSTS1	16	Interrupt Status 1
0x046	BRDYSTS	16	BRDY Interrupt Status
0x048	NRDYSTS	16	NRDY Interrupt Status
0x04A	BEMPSTS	16	BEMP Interrupt Status
0x04C	FRMNUM	16	Frame Number
0x050	USBADDR	16	USB Address
0x054	USBREQ	16	USB Request Type / bRequest
0x056	USBVAL	16	USB Request wValue
0x058	USBINDX	16	USB Request wIndex
0x05A	USBLENG	16	USB Request wLength
0x05C	DCPCFG	16	DCP Config
0x05E	DCPMAXP	16	DCP Max Packet
0x060	DCPCTR	16	DCP Control (PID/CCPL/SUREQ)
0x064	PIPESEL	16	Pipe window select
0x068	PIPECFG	16	Selected pipe Config
0x06A	PIPEBUF	16	Selected pipe Buffer
0x06C	PIPEMAXP	16	Selected pipe Max Packet
0x06E	PIPEPERI	16	Selected pipe Period
0x070	PIPECTR[9]	16x9	PIPE1..PIPE9 Control

Copyright

Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_usb_regs.h.

Enumeration Type Documentation

ra8_usb_addr_field_t

enum ra8_usb_addr_field_t : uint16_t

USBADDR field masks.

Enumerator
k_ra8_usbaddr_addr_mask	7-bit USB address [6:0].

Definition at line 632 of file ra8_usb_regs.h.

ra8_usb_addr_t

enum ra8_usb_addr_t : uintptr_t

Per-instance base addresses for the two USB controllers.

Sourced from HUM Ch 36 "USB 2.0 Full-Speed Module (USBFS)" p 1965 and HUM Ch 37 "USB 2.0 High-Speed Module (USBHS)" p 2059.

Enumerator
k_ra8_usb_fs0_base_addr	USB Full-Speed base.
k_ra8_usb_hs0_base_addr	USB High-Speed base. (anon).

Definition at line 87 of file ra8_usb_regs.h.

ra8_usb_ctsq_t

enum ra8_usb_ctsq_t : uint16_t

Control-transfer-stage values reported in INTSTS0.CTSQ[2:0].

Enumerator
k_ra8_ctsq_idle	Idle / setup stage end.
k_ra8_ctsq_rdds	Control read data stage.
k_ra8_ctsq_rdss	Control read status stage.
k_ra8_ctsq_wrds	Control write data stage.
k_ra8_ctsq_wrss	Control write status stage.
k_ra8_ctsq_wrnd	Control write nodata status.
k_ra8_ctsq_sqer	Sequence error.

Definition at line 527 of file ra8_usb_regs.h.

ra8_usb_dcpcfg_bit_t

enum ra8_usb_dcpcfg_bit_t : uint8_t

DCPCFG bit positions used by the control-transfer engine.

In host mode DIR selects the data-stage token direction the controller issues on the DCP: 0 = IN (host receives, e.g. GET_DESCRIPTOR), 1 = OUT (host transmits, e.g. DFU_DNLOAD). The default DCPCFG = 0 issues IN tokens, so a control-WRITE data stage MUST set DIR before sending or the device sees an IN token in its write-data stage and flags CTSQ = SQER.

Enumerator
k_ra8_dcpcfg_bit_dir	Transfer direction (host: 0 = IN, 1 = OUT).

Definition at line 568 of file ra8_usb_regs.h.

ra8_usb_dcpctr_bit_t

enum ra8_usb_dcpctr_bit_t : uint8_t

DCPCTR bit positions used by the device-mode driver.

Enumerator
k_ra8_dcpctr_bit_pid_lo	PID[0] (NAK / BUF / STALL).
k_ra8_dcpctr_bit_pid_hi	PID[1].
k_ra8_dcpctr_bit_ccpl	Control transfer end enable.
k_ra8_dcpctr_bit_pbusy	Pipe busy.
k_ra8_dcpctr_bit_sqmon	Sequence toggle monitor.
k_ra8_dcpctr_bit_sqset	Sequence toggle set.
k_ra8_dcpctr_bit_sqclr	Sequence toggle clear.
k_ra8_dcpctr_bit_sureqclr	SUREQ clear (USBHS host only).
k_ra8_dcpctr_bit_sureq	Send USB request (host mode).
k_ra8_dcpctr_bit_bsts	Buffer status.

Definition at line 546 of file ra8_usb_regs.h.

ra8_usb_dvsq_t

enum ra8_usb_dvsq_t : uint16_t

Device-state values reported in INTSTS0.DVSQ[2:0].

Read these as (INTSTS0 & k_ra8_intsts0_mask_dvsq) == <value>.

Enumerator
k_ra8_dvsq_powered	Powered (no reset yet).
k_ra8_dvsq_default	Default (post bus reset).
k_ra8_dvsq_address	Address assigned.
k_ra8_dvsq_configured	Configured.
k_ra8_dvsq_suspend	Suspended (any sub-state).

Definition at line 512 of file ra8_usb_regs.h.

ra8_usb_fifoctr_field_t

enum ra8_usb_fifoctr_field_t : uint16_t

CFIFOCTR / DxFIFOCTR field masks.

Enumerator
k_ra8_fifoctr_dtln	Data length (write-bytes-rem).
k_ra8_fifoctr_frdy	FIFO ready.
k_ra8_fifoctr_bclr	Buffer clear.
k_ra8_fifoctr_bval	Buffer valid.

Definition at line 616 of file ra8_usb_regs.h.

ra8_usb_fifosel_field_t

enum ra8_usb_fifosel_field_t : uint16_t

CFIFOSEL / DxFIFOSEL field masks.

Enumerator
k_ra8_fifosel_curpipe	Current pipe select [3:0].
k_ra8_fifosel_isel	CFIFO direction (DCP only).
k_ra8_fifosel_bigend	Big-endian access.
k_ra8_fifosel_mbw_8	8-bit FIFO access width.
k_ra8_fifosel_mbw_16	16-bit FIFO access width.
k_ra8_fifosel_mbw_32	32-bit FIFO access width.
k_ra8_fifosel_mbw_msk	MBW field mask.
k_ra8_fifosel_dreqe	DREQ enable (DMA).
k_ra8_fifosel_dclrm	Auto FIFO clear mode.
k_ra8_fifosel_rew	Buffer rewind.
k_ra8_fifosel_rcnt	Read count mode.

Definition at line 593 of file ra8_usb_regs.h.

ra8_usb_intenb0_bit_t

enum ra8_usb_intenb0_bit_t : uint8_t

INTENB0 / INTSTS0 bit positions (the layouts match).

Enumerator
k_ra8_int0_bit_brdy	Buffer-ready interrupt.
k_ra8_int0_bit_nrdy	Buffer-not-ready interrupt.
k_ra8_int0_bit_bemp	Buffer-empty interrupt.
k_ra8_int0_bit_ctrt	Control-transfer-stage transition.
k_ra8_int0_bit_dvst	Device-state transition.
k_ra8_int0_bit_sofr	Start-of-Frame.
k_ra8_int0_bit_rsme	Resume.
k_ra8_int0_bit_vbse	VBUS change.

Definition at line 447 of file ra8_usb_regs.h.

ra8_usb_intenb0_mask_t

enum ra8_usb_intenb0_mask_t : uint16_t

INTENB0 aggregate masks (HUM Ch 36.2.10 p 1980).

Enumerator

k_ra8_int0_full_mask

Device-mode event mask: BRDY | NRDY | BEMP | CTRT | DVST | VBSE. Equals 0x9F00. SOFR and RSME are intentionally omitted – SOFR fires every 125us on HS, and RSME on USBHS stays asserted while the host holds resume signalling (PHY USBR signal); together they starve PendSV. NRDY drives per-pipe NAK re-arm and does not cause a storm on its own. Used by the watchdog thread in tz_secure_only_usb_hs to re-arm INTENB0 if a USB Reset clears it.

Definition at line 480 of file ra8_usb_regs.h.

ra8_usb_intsts0_mask_t

enum ra8_usb_intsts0_mask_t : uint16_t

INTSTS0 multi-bit field masks.

Enumerator
k_ra8_intsts0_mask_ctsq	Control transfer stage.
k_ra8_intsts0_mask_valid	SETUP packet detect flag.
k_ra8_intsts0_mask_dvsq	Device state.
k_ra8_intsts0_mask_vbsts	VBUS input port level.

Definition at line 498 of file ra8_usb_regs.h.

ra8_usb_intsts1_bit_t

enum ra8_usb_intsts1_bit_t : uint8_t

INTSTS1 / INTENB1 host-mode bit positions (HUM Ch 36.2.11/15).

Host-side bus events. SACK / SIGN report the outcome of a SETUP transaction started with DCPCTR.SUREQ: SACK latches when the device ACKs the SETUP, SIGN when three transmission attempts fail.

Enumerator
k_ra8_int1_bit_sack	SETUP transaction ACKed.
k_ra8_int1_bit_sign	SETUP transaction failed (3x).
k_ra8_int1_bit_eoferr	EOF error detected.
k_ra8_int1_bit_attch	Device attach detected.
k_ra8_int1_bit_dtch	Device detach detected.
k_ra8_int1_bit_bchg	Bus change.
k_ra8_int1_bit_ovrcr	Overcurrent input change.

Definition at line 466 of file ra8_usb_regs.h.

ra8_usb_limits_t

enum ra8_usb_limits_t : uint8_t

Pipe / endpoint count constants.

Enumerator
k_ra8_usb_pipe_count	DCP (pipe 0) + PIPE1..PIPE9.
k_ra8_usb_pipectr_count	PIPECTR[9] = PIPE1..PIPE9.
k_ra8_usb_pad_2	Reserved length (2 hwords).
k_ra8_usb_pad_3	Reserved length (3 hwords).
k_ra8_usb_pad_5	Reserved length (5 hwords).
k_ra8_usb_pad_8	Reserved length (8 hwords).
k_ra8_usb_dcp_max_packet_fs	EP0 max packet at FS / HS-FS.

Definition at line 106 of file ra8_usb_regs.h.

ra8_usb_offset_t

enum ra8_usb_offset_t : uint16_t

Byte offsets of the named USB register fields within r_usb_regs_t.

Sourced from HUM Ch 36 (USBFS, p 1965) and HUM Ch 37 (USBHS, p 2059). Both controllers share the same device-mode register layout in this offset window, so a single set of constants covers both instances.

Enumerator
k_ra8_usb_off_syscfg	SYSCFG : System config.
k_ra8_usb_off_buswait	BUSWAIT : CPU bus wait.
k_ra8_usb_off_syssts0	SYSSTS0 : System status 0.
k_ra8_usb_off_dvstctr0	DVSTCTR0 : Device state ctrl.
k_ra8_usb_off_cfifo	CFIFO : Control FIFO port.
k_ra8_usb_off_d0fifo	D0FIFO : DMA FIFO 0 port.
k_ra8_usb_off_d1fifo	D1FIFO : DMA FIFO 1 port.
k_ra8_usb_off_cfifosel	CFIFOSEL : Control FIFO select.
k_ra8_usb_off_cfifoctr	CFIFOCTR : Control FIFO control.
k_ra8_usb_off_d0fifosel	D0FIFOSEL : DMA FIFO 0 select.
k_ra8_usb_off_d0fifoctr	D0FIFOCTR : DMA FIFO 0 control.
k_ra8_usb_off_d1fifosel	D1FIFOSEL : DMA FIFO 1 select.
k_ra8_usb_off_d1fifoctr	D1FIFOCTR : DMA FIFO 1 control.
k_ra8_usb_off_intenb0	INTENB0 : Interrupt Enable 0.
k_ra8_usb_off_intenb1	INTENB1 : Interrupt Enable 1.
k_ra8_usb_off_brdyenb	BRDYENB : BRDY Enable.
k_ra8_usb_off_nrdyenb	NRDYENB : NRDY Enable.
k_ra8_usb_off_bempenb	BEMPENB : BEMP Enable.
k_ra8_usb_off_sofcfg	SOFCFG : SOF Output Config.
k_ra8_usb_off_intsts0	INTSTS0 : Interrupt Status 0.
k_ra8_usb_off_intsts1	INTSTS1 : Interrupt Status 1.
k_ra8_usb_off_brdysts	BRDYSTS : BRDY Status.
k_ra8_usb_off_nrdysts	NRDYSTS : NRDY Status.
k_ra8_usb_off_bempsts	BEMPSTS : BEMP Status.
k_ra8_usb_off_frmnum	FRMNUM : Frame number.
k_ra8_usb_off_usbaddr	USBADDR : USB address.
k_ra8_usb_off_usbreq	USBREQ : USB request type.
k_ra8_usb_off_usbval	USBVAL : USB request wValue.
k_ra8_usb_off_usbindx	USBINDX : USB request wIndex.
k_ra8_usb_off_usbleng	USBLENG : USB request wLength.
k_ra8_usb_off_dcpcfg	DCPCFG : DCP configuration.
k_ra8_usb_off_dcpmaxp	DCPMAXP : DCP max packet.
k_ra8_usb_off_dcpctr	DCPCTR : DCP control.
k_ra8_usb_off_pipesel	PIPESEL : Pipe window select.
k_ra8_usb_off_pipecfg	PIPECFG : Selected pipe cfg.
k_ra8_usb_off_pipebuf	PIPEBUF : Selected pipe buf.
k_ra8_usb_off_pipemaxp	PIPEMAXP : Selected pipe maxp.
k_ra8_usb_off_pipeperi	PIPEPERI : Selected pipe period.
k_ra8_usb_off_pipectr	PIPECTR : PIPE1..9 control.

Definition at line 189 of file ra8_usb_regs.h.

ra8_usb_pid_t

enum ra8_usb_pid_t : uint16_t

Response PID values written into the low two bits of DCPCTR / PIPECTR.

Enumerator
k_ra8_pid_nak	NAK response.
k_ra8_pid_buf	BUF response (transmit/receive).
k_ra8_pid_stall	STALL response.
k_ra8_pid_mask	PID[1:0] field mask.

Definition at line 577 of file ra8_usb_regs.h.

ra8_usb_pipebuf_field_t

enum ra8_usb_pipebuf_field_t : uint16_t

PIPEBUF field masks / shifts.

Layout: BUFSIZE[14:10] | BUFNMB[7:0]. Buffer block is 64 bytes; the pipe's FIFO region is (BUFSIZE+1) * 64 bytes starting at BUFNMB * 64. With PIPECFG.DBLB the region is split into two equal halves of (BUFSIZE+1)/2 * 64 bytes each, so a 1024-byte region (BUFSIZE=15) holds 2x512 packets for HS bulk MPS=512.

Enumerator
k_ra8_pipebuf_bufnmb_mask	RA8 pipebuf bufnmb mask.
k_ra8_pipebuf_bufsize_mask	RA8 pipebuf bufsize mask.
k_ra8_pipebuf_bufsize_shift	RA8 pipebuf bufsize shift.
k_ra8_pipebuf_block_bytes	Each buffer block is 64 bytes.

Definition at line 672 of file ra8_usb_regs.h.

ra8_usb_pipecfg_field_t

enum ra8_usb_pipecfg_field_t : uint16_t

PIPECFG field masks / shifts used by the driver.

Enumerator
k_ra8_pipecfg_epnum_mask	Endpoint number [3:0].
k_ra8_pipecfg_dir_in	1 = IN, 0 = OUT (peri).
k_ra8_pipecfg_shtnak	Auto NAK on short pkt.
k_ra8_pipecfg_dblb	Double-buffer mode.
k_ra8_pipecfg_bfre	BRDY notify on read end.
k_ra8_pipecfg_type_bulk	Type = bulk.
k_ra8_pipecfg_type_intr	Type = interrupt.
k_ra8_pipecfg_type_iso	Type = isochronous.
k_ra8_pipecfg_type_mask	Type field mask.

Definition at line 645 of file ra8_usb_regs.h.

ra8_usb_pipectr_bit_t

enum ra8_usb_pipectr_bit_t : uint16_t

PIPECTR bit positions / fields used by the driver.

Enumerator
k_ra8_pipectr_pid_mask	PID[1:0] response field.
k_ra8_pipectr_pbusy	Pipe busy (read-only).
k_ra8_pipectr_sqmon	Toggle monitor.
k_ra8_pipectr_sqset	Toggle set.
k_ra8_pipectr_sqclr	Toggle clear.
k_ra8_pipectr_aclrm	Auto buffer clear mode.
k_ra8_pipectr_atrepm	Auto response mode.
k_ra8_pipectr_inbufm	IN buffer monitor.
k_ra8_pipectr_bsts	Buffer status.

Definition at line 688 of file ra8_usb_regs.h.

ra8_usb_size_t

enum ra8_usb_size_t : uint16_t

Total byte size of the modelled USB register window.

The device-mode subset ends at PIPECTR[9] (last halfword at offset 0x080..0x081). HS-only registers past 0x090 (PHYSET, LPCTRL, LPSTS, BCCTRL, ...) are intentionally not modelled.

Enumerator
k_ra8_usb_window_bytes	0x070 + (9 * 2) = 0x082 bytes.

Definition at line 239 of file ra8_usb_regs.h.

ra8_usb_syscfg_bit_t

enum ra8_usb_syscfg_bit_t : uint8_t

SYSCFG bit positions.

Enumerator
k_ra8_syscfg_bit_usbe	USB module enable.
k_ra8_syscfg_bit_dprpu	D+ pull-up enable (device).
k_ra8_syscfg_bit_drpd	D+/D- pull-down (host).
k_ra8_syscfg_bit_dcfm	1 = host mode, 0 = device.
k_ra8_syscfg_bit_hse	HS enable (HS instance only).
k_ra8_syscfg_bit_cnen	Single-end receiver enable.
k_ra8_syscfg_bit_scke	USB clock enable.

Definition at line 428 of file ra8_usb_regs.h.

ra8_usbhs_buswait_t

enum ra8_usbhs_buswait_t : uint16_t

BUSWAIT canonical value (HUM Ch 37 "BUSWAIT").

FSP r_usb_preg_access.c uses USB_CFG_BUSWAIT | USB_BWAIT_B11_B8_WRITE where the b11-b8 "reserved must-write" pattern is 0x0F00 and the wait field defaults to 4 cycles (USB_BWAIT_4 == 0x0F04) on RA8.

Enumerator
k_ra8_buswait_default	4-wait + b11-b8 reserved-write.

Definition at line 415 of file ra8_usb_regs.h.

ra8_usbhs_lpsts_bit_t

enum ra8_usbhs_lpsts_bit_t : uint16_t

LPSTS bit positions (HUM Ch 37 "LPSTS" register).

Enumerator
k_ra8_lpsts_suspendm	b14: UTMI SuspendM (1=run).

Definition at line 394 of file ra8_usb_regs.h.

ra8_usbhs_offset_t

enum ra8_usbhs_offset_t : uint16_t

Byte offsets of USBHS-only registers not modelled in r_usb_regs_t.

These exist only on the HS instance (HUM Ch 37) and are required for embedded-PHY bring-up. They sit either inside reserved gaps of the shared device-mode struct (PLLSTA at 0x06, PHYSET at 0x3E) or past it (LPSTS at 0x102). Accessed via base + offset rather than struct fields to keep the shared r_usb_regs_t layout common between FS and HS instances.

• PLLSTA at 0x06 – HUM Ch 37 "PLL Status Register"
• PHYSET at 0x3E – HUM Ch 37 "PHY Setting Register"
• LPSTS at 0x102 – HUM Ch 37 "Low Power Status Register"

Enumerator
k_ra8_usbhs_off_pllsta	PLLSTA : PLL lock flag.
k_ra8_usbhs_off_physet	PHYSET : embedded-PHY setup.
k_ra8_usbhs_off_lpsts	LPSTS : SUSPENDM gate.

Definition at line 347 of file ra8_usb_regs.h.

ra8_usbhs_physet_bit_t

enum ra8_usbhs_physet_bit_t : uint16_t

PHYSET bit positions and masks (HUM Ch 37 "PHYSET" register).

Enumerator
k_ra8_physet_dirpd	b0 : PHY power-down (1=PD).
k_ra8_physet_pllreset	b1 : PHY PLL reset.
k_ra8_physet_clksel	b5-4: input clock select mask.
k_ra8_physet_clksel_12	b5-4 = 00b: 12 MHz reference.
k_ra8_physet_clksel_48	b5-4 = 01b: 48 MHz reference.
k_ra8_physet_clksel_20	b5-4 = 10b: 20 MHz reference.
k_ra8_physet_clksel_24	b5-4 = 11b: 24 MHz reference.
k_ra8_physet_repsel_16	b9-8: 16-cycle terminator.
k_ra8_physet_hseb	b15 : CL-only mode.

Definition at line 378 of file ra8_usb_regs.h.

ra8_usbhs_pllsta_bit_t

enum ra8_usbhs_pllsta_bit_t : uint16_t

PLLSTA bit positions (HUM Ch 37 "PLLSTA" register).

Enumerator
k_ra8_pllsta_plllock	b0 : PHY PLL locked flag.

Definition at line 402 of file ra8_usb_regs.h.

Function Documentation

ra8_usb_fs()

volatile r_usb_regs_t * ra8_usb_fs ( void )

inlinestatic

Compile-time offset and size insurance for r_usb_regs_t.

Mirrors HUM Ch 36 / Ch 37 byte-for-byte. If any field drifts (a reserved gap is mis-sized, or a halfword-versus-word width slips), these assertions fire at compile time before any test runs – silent register-bank corruption (writing the wrong USB pipe, or stomping on the next peripheral) is avoided.

Both USB FS (HUM Ch 36, p 1965) and USB HS (HUM Ch 37, p 2059) share the same device-mode register layout in this window, so one set of offset assertions covers both controller instances.

Get pointer to the USB FS controller register block.

Definition at line 315 of file ra8_usb_regs.h.

References k_ra8_usb_fs0_base_addr.

Referenced by internal_ctrt_handle_valid(), internal_irq_complete_in(), internal_pick_regs(), priv_dvst_default_state(), priv_handle_ctrl_out_data(), priv_irq_dvst_prelude(), and priv_pick().

ra8_usb_hs()

volatile r_usb_regs_t * ra8_usb_hs ( void )

inlinestatic

Get pointer to the USB HS controller register block.

Definition at line 322 of file ra8_usb_regs.h.

References k_ra8_usb_hs0_base_addr.

Referenced by demo_worker_capture_echo_probes(), intenb0_watchdog_entry(), internal_ack_spurious(), internal_ctrt_handle_valid(), internal_irq_complete_in(), internal_pick_regs(), priv_dvst_default_state(), priv_handle_ctrl_out_data(), priv_irq_dvst_prelude(), priv_is_hs(), priv_pick(), and ux_dcd_ra8_usb_initialize().

ra8_usbhs_lpsts()

volatile uint16_t * ra8_usbhs_lpsts ( void )

inlinestatic

Get pointer to USBHS LPSTS register.

Definition at line 369 of file ra8_usb_regs.h.

References k_ra8_usb_hs0_base_addr, and k_ra8_usbhs_off_lpsts.

Referenced by demo_worker_capture_echo_probes(), priv_usbhs_phy_bringup(), ra8_usb_device_attach(), ra8_usb_device_init(), and ux_dcd_ra8_usb_initialize().

ra8_usbhs_physet()

volatile uint16_t * ra8_usbhs_physet ( void )

inlinestatic

Get pointer to USBHS PHYSET register.

Definition at line 362 of file ra8_usb_regs.h.

References k_ra8_usb_hs0_base_addr, and k_ra8_usbhs_off_physet.

Referenced by priv_usbhs_phy_bringup().

ra8_usbhs_pllsta()

volatile uint16_t * ra8_usbhs_pllsta ( void )

inlinestatic

Get pointer to USBHS PLLSTA register (read-only).

Definition at line 355 of file ra8_usb_regs.h.

References k_ra8_usb_hs0_base_addr, and k_ra8_usbhs_off_pllsta.

Referenced by internal_usbhs_wait_pll_lock_short().