109 if (port_regs ==
nullptr) {
113 const uint32_t pdr_mask = (uint32_t)(1UL << (uint32_t)
pin);
118 uint32_t pcntr1 = port_regs->
PCNTR1;
123 pcntr1 &= ~podr_mask;
127 port_regs->
PCNTR1 = pcntr1;
164 if (out_level ==
nullptr) {
175 if (port_regs ==
nullptr) {
181 const uint32_t pidr = port_regs->
PCNTR2;
182 const uint32_t pin_mask = (uint32_t)(1UL << (uint32_t)
pin);
ra8_board_eth_pin_t pin
Pin.
Error Code Definitions for ra8-firmware.
@ k_ra8_err_hw_unmapped
Peripheral register block is not mapped in this MCU variant.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
@ k_ra8_err_null_ptr
Pointer was NULL where a valid pointer was required.
@ k_ra8_err_gpio_invalid_pin
GPIO pin index out of range within its port (valid: 0..15).
@ k_ra8_err_gpio_invalid_port
GPIO port index out of range for this MCU.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
static ra8_err_t ra8_pcntr_read(ra8_port_t port, ra8_pin_t pin, ra8_level_t *out_level)
Read a pin's live level from PCNTR2 (PIDR).
static ra8_err_t ra8_pcntr_set_output(ra8_port_t port, ra8_pin_t pin, ra8_level_t level)
Hold a pin an output and drive it to a level, via PCNTR1 (combined).
Typed Port / Pin Constants for the RA8D2 IOPORT Module.
ra8_port_t
Port indices for the RA8D2 IOPORT module.
@ k_ra8_port_max
Highest valid port index.
ra8_level_t
Digital output / input level.
@ k_ra8_level_high
Drive or read 1.
@ k_ra8_level_low
Drive or read 0.
ra8_pin_t
Pin indices within an IOPORT port (0..15).
@ k_ra8_pin_max
Highest valid pin index.
IOPORT (GPIO) register layout for the Renesas RA8D2.
@ k_ra8_pcntr_high_half_shift
PODR/EIDR/PORR/EORR half.
static volatile r_port_regs_t * ra8_port(ra8_port_t port)
Get the PORT register window for a given port index.
Per-port IOPORT register window.
volatile uint32_t PCNTR2
PCNTR2 – { EIDR[31:16], PIDR[15:0] } (read-only).
volatile uint32_t PCNTR1
PCNTR1 – { PODR[31:16], PDR[15:0] }.