ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_dac_b_regs.h
Go to the documentation of this file.
1
31
32#pragma once
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#include <stdint.h>
39
40#include "ra8_attributes.h"
41
46typedef enum : uintptr_t {
47 k_ra8_dac_b0_base_addr = 0x40233000UL,
48 k_ra8_dac_b1_base_addr = 0x40233100UL,
50
60
74
82typedef enum : uint32_t {
83 k_ra8_dacr0_mask_dacen = 0x00000001UL,
84 k_ra8_dacr0_mask_dae = 0x00008000UL,
87
96typedef enum : uint8_t {
99
104typedef enum : uint32_t {
105 k_ra8_dacr1_mask_dpsel = 0x00010000UL,
107
117typedef enum : uint8_t {
120
125typedef enum : uint32_t {
126 k_ra8_dacr2_mask_ofssel = 0x00000100UL,
128
137typedef struct {
138 volatile uint16_t DADR;
139 volatile uint16_t reserved_dadr;
140 volatile uint32_t DACR0;
141 volatile uint32_t DACR1;
142 volatile uint32_t DACR2;
144
153static inline volatile r_dac_b_regs_t* ra8_dac_b(uint8_t instance)
154{
155 if ((uint16_t)instance >= k_ra8_dac_b_channel_count) {
156 return nullptr;
157 }
158 return (volatile r_dac_b_regs_t*)(k_ra8_dac_b0_base_addr +
159 ((uintptr_t)instance * (uintptr_t)k_ra8_dac_b_stride));
160}
161
162#ifdef __cplusplus
163}
164#endif
Annotation-attribute framework macros for ra8-firmware.
#define RA8_HW_REGISTER_ACCESS
Mark an MMIO accessor function (returns volatile register pointer).
ra8_dacr1_bit_t
DACR1 bit positions (data placement).
@ k_ra8_dacr1_bit_dpsel
DPSEL: data placement select.
static volatile r_dac_b_regs_t * ra8_dac_b(uint8_t instance)
Get pointer to DAC_B instance N (0 or 1).
ra8_dac_b_limits_t
Channel count, stride, and value range.
@ k_ra8_dac_b_channel_count
Two independent DAC_B instances.
@ k_ra8_dac_b_max_value
12-bit full-scale count.
@ k_ra8_dac_b_stride
Bytes between DAC_B0 and DAC_B1.
ra8_dacr2_bit_t
DACR2 bit positions (DAC-HM operating-voltage mode).
@ k_ra8_dacr2_bit_ofssel
OFSSEL: VREFH range select.
ra8_dacr0_bit_t
DACR0 bit positions (per-channel control register 0).
@ k_ra8_dacr0_bit_daoutdis
DAOUTDIS: output disable.
@ k_ra8_dacr0_bit_dacen
DACEN: channel enable.
@ k_ra8_dacr0_bit_dae
DAE: batch conversion control.
ra8_dacr0_mask_t
DACR0 bit masks.
@ k_ra8_dacr0_mask_dae
Mirror of FSP DAE_Msk.
@ k_ra8_dacr0_mask_daoutdis
Mirror of FSP DAOUTDIS_Msk.
@ k_ra8_dacr0_mask_dacen
Mirror of FSP DACEN_Msk.
ra8_dacr1_mask_t
DACR1 bit masks.
@ k_ra8_dacr1_mask_dpsel
Mirror of FSP DPSEL_Msk.
ra8_dacr2_mask_t
DACR2 bit masks.
@ k_ra8_dacr2_mask_ofssel
Mirror of FSP OFSSEL_Msk.
ra8_dac_b_addr_t
Memory-mapped base addresses for DAC_B0 / DAC_B1.
@ k_ra8_dac_b0_base_addr
FSP R_DAC_B0_BASE.
@ k_ra8_dac_b1_base_addr
FSP R_DAC_B1_BASE (stride 0x100).
Per-instance DAC_B register window.
volatile uint16_t DADR
+0x00 12-bit data value (low 12 bits).
volatile uint32_t DACR2
+0x0C Control 2 (OFSSEL bit 8).
volatile uint16_t reserved_dadr
+0x02 RESERVED (FSP field).
volatile uint32_t DACR1
+0x08 Control 1 (DPSEL bit 16).
volatile uint32_t DACR0
+0x04 Control 0 (DACEN/DAE/DAOUTDIS).