12-bit DAC_B register layout for the Renesas RA8D2 More...

#include <stdint.h>
#include "ra8_attributes.h"

Include dependency graph for ra8_dac_b_regs.h:

This graph shows which files directly or indirectly include this file:

Data Structures
struct	r_dac_b_regs_t
	Per-instance DAC_B register window. More...

Enumerations
enum	ra8_dac_b_addr_t : uintptr_t { k_ra8_dac_b0_base_addr = 0x40233000UL , k_ra8_dac_b1_base_addr = 0x40233100UL }
	Memory-mapped base addresses for DAC_B0 / DAC_B1. More...
enum	ra8_dac_b_limits_t : uint16_t { k_ra8_dac_b_channel_count = 2U , k_ra8_dac_b_stride = 0x100U , k_ra8_dac_b_max_value = 4095U }
	Channel count, stride, and value range. More...
enum	ra8_dacr0_bit_t : uint8_t { k_ra8_dacr0_bit_dacen = 0U , k_ra8_dacr0_bit_dae = 15U , k_ra8_dacr0_bit_daoutdis = 31U }
	DACR0 bit positions (per-channel control register 0). More...
enum	ra8_dacr0_mask_t : uint32_t { k_ra8_dacr0_mask_dacen = 0x00000001UL , k_ra8_dacr0_mask_dae = 0x00008000UL , k_ra8_dacr0_mask_daoutdis = 0x80000000UL }
	DACR0 bit masks. More...
enum	ra8_dacr1_bit_t : uint8_t { k_ra8_dacr1_bit_dpsel = 16U }
	DACR1 bit positions (data placement). More...
enum	ra8_dacr1_mask_t : uint32_t { k_ra8_dacr1_mask_dpsel = 0x00010000UL }
	DACR1 bit masks. More...
enum	ra8_dacr2_bit_t : uint8_t { k_ra8_dacr2_bit_ofssel = 8U }
	DACR2 bit positions (DAC-HM operating-voltage mode). More...
enum	ra8_dacr2_mask_t : uint32_t { k_ra8_dacr2_mask_ofssel = 0x00000100UL }
	DACR2 bit masks. More...

Functions
static volatile r_dac_b_regs_t *	ra8_dac_b (uint8_t instance)
	Get pointer to DAC_B instance N (0 or 1).

Detailed Description

12-bit DAC_B register layout for the Renesas RA8D2

The RA8D2 has two separate DAC_B instances DAC_B0 / DAC_B1 at base addresses 0x40233000 and 0x40233100 (stride 0x100). Each instance drives ONE 12-bit channel. This is a different IP block from the pre-RA8 "DAC12" (which had a single block with two DADR0/DADR1 registers and a shared DACR control byte).

Per-instance register map, verified against FSP R_DAC_B0_Type (R7KA8D2KF_core0.h around line 5396):

Offset	Name	Width	Bit fields
0x00	DADR	16	DADR[15:0] 12-bit data
0x02	(rsvd)	16	RESERVED (must read as 0)
0x04	DACR0	32	DACEN[0], DAE[15], DAOUTDIS[31]
0x08	DACR1	32	DPSEL[16] (data placement)
0x0C	DACR2	32	OFSSEL[8] (DAC-HM operating mode)

Register offsets and bit positions tracked against HUM Ch 54 "12-Bit D/A Converter (DAC12)" p 3490..3496 and against FSP R_DAC_B0_DACR{0,1,2}_*_Msk constants.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_dac_b_regs.h.

Enumeration Type Documentation

◆ ra8_dac_b_addr_t

enum ra8_dac_b_addr_t : uintptr_t

Memory-mapped base addresses for DAC_B0 / DAC_B1.

Enumerator
k_ra8_dac_b0_base_addr	FSP R_DAC_B0_BASE.
k_ra8_dac_b1_base_addr	FSP R_DAC_B1_BASE (stride 0x100).

Definition at line 46 of file ra8_dac_b_regs.h.

◆ ra8_dac_b_limits_t

enum ra8_dac_b_limits_t : uint16_t

Channel count, stride, and value range.

Enumerator
k_ra8_dac_b_channel_count	Two independent DAC_B instances.
k_ra8_dac_b_stride	Bytes between DAC_B0 and DAC_B1.
k_ra8_dac_b_max_value	12-bit full-scale count.

Definition at line 55 of file ra8_dac_b_regs.h.

◆ ra8_dacr0_bit_t

enum ra8_dacr0_bit_t : uint8_t

DACR0 bit positions (per-channel control register 0).

Verified against FSP R_DAC_B0_DACR0_*_Pos – see HUM Ch 54 "12-Bit D/A Converter (DAC12)" p 3490..3496.

Enumerator
k_ra8_dacr0_bit_dacen	DACEN: channel enable.
k_ra8_dacr0_bit_dae	DAE: batch conversion control.
k_ra8_dacr0_bit_daoutdis	DAOUTDIS: output disable.

Definition at line 69 of file ra8_dac_b_regs.h.

◆ ra8_dacr0_mask_t

enum ra8_dacr0_mask_t : uint32_t

DACR0 bit masks.

Mirror FSP R_DAC_B0_DACR0_*_Msk.

Enumerator
k_ra8_dacr0_mask_dacen	Mirror of FSP DACEN_Msk.
k_ra8_dacr0_mask_dae	Mirror of FSP DAE_Msk.
k_ra8_dacr0_mask_daoutdis	Mirror of FSP DAOUTDIS_Msk.

Definition at line 82 of file ra8_dac_b_regs.h.

◆ ra8_dacr1_bit_t

enum ra8_dacr1_bit_t : uint8_t

DACR1 bit positions (data placement).

DPSEL selects right- (0) vs left-justified (1) 12-bit data in the 16-bit DADR field. Verified against FSP R_DAC_B0_DACR1_DPSEL_Pos.

Enumerator
k_ra8_dacr1_bit_dpsel	DPSEL: data placement select.

Definition at line 96 of file ra8_dac_b_regs.h.

◆ ra8_dacr1_mask_t

enum ra8_dacr1_mask_t : uint32_t

DACR1 bit masks.

Enumerator
k_ra8_dacr1_mask_dpsel	Mirror of FSP DPSEL_Msk.

Definition at line 104 of file ra8_dac_b_regs.h.

◆ ra8_dacr2_bit_t

enum ra8_dacr2_bit_t : uint8_t

DACR2 bit positions (DAC-HM operating-voltage mode).

OFSSEL selects the high-voltage reference range. FSP exposes only two values: NORMAL (>= 2.7V, OFSSEL = 0) and LOW (< 2.7V, OFSSEL = 1). Verified against FSP R_DAC_B0_DACR2_OFSSEL_Pos.

Enumerator
k_ra8_dacr2_bit_ofssel	OFSSEL: VREFH range select.

Definition at line 117 of file ra8_dac_b_regs.h.

◆ ra8_dacr2_mask_t

enum ra8_dacr2_mask_t : uint32_t

DACR2 bit masks.

Enumerator
k_ra8_dacr2_mask_ofssel	Mirror of FSP OFSSEL_Msk.

Definition at line 125 of file ra8_dac_b_regs.h.

Function Documentation

◆ ra8_dac_b()

volatile r_dac_b_regs_t * ra8_dac_b ( uint8_t instance )

inlinestatic

Get pointer to DAC_B instance N (0 or 1).

Parameters

[in] instance 0 = DAC_B0, 1 = DAC_B1.

Returns: Volatile pointer to the DAC_B register window, or nullptr if instance is out of range.

Definition at line 153 of file ra8_dac_b_regs.h.

References k_ra8_dac_b0_base_addr, k_ra8_dac_b_channel_count, and k_ra8_dac_b_stride.

Referenced by internal_apply_cfg(), internal_disable_channel(), internal_start_channel(), internal_stop_channel(), ra8_dac_b_deinit(), ra8_dac_b_get_status(), ra8_dac_b_set_output_enable(), ra8_dac_b_set_vref(), and ra8_dac_b_write().

Data Structures

Enumerations

Functions