ra8_dtc_regs.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
 
#include "ra8_attributes.h"
 
typedef enum : uintptr_t {
  k_ra8_dtc_base_addr = 0x4000AC00UL, 
} ra8_dtc_addr_t;
 
typedef enum : uint8_t {
  k_ra8_dtc_xfer_info_size = 16U, 
  k_ra8_dtc_vector_align   = 16U, 
} ra8_dtc_layout_t;
 
typedef enum : uint16_t {
  k_ra8_dtc_vector_table_align = 1024U, 
} ra8_dtc_vector_align_t;
 
/* DTCCR / DTCCR_SEC bit positions (HUM 18.2.1 p 786). Bit 3 is
 * documented as "reserved -- write 1, read 1"; FSP encodes the
 * RRS-enable / RRS-disable values as the literals 0x18 / 0x08 to
 * preserve that constraint. */
typedef enum : uint8_t {
  k_ra8_dtccr_rrs_pos     = 4U,    
  k_ra8_dtccr_rrs_msk     = 0x10U, 
  k_ra8_dtccr_reserved3   = 0x08U, 
  k_ra8_dtccr_rrs_disable = 0x08U, 
  k_ra8_dtccr_rrs_enable  = 0x18U, 
} ra8_dtc_dtccr_bits_t;
 
/* DTCST bit positions (HUM 18.2.3 p 787). */
typedef enum : uint8_t {
  k_ra8_dtcst_dtcst_pos = 0U,   
  k_ra8_dtcst_dtcst_msk = 0x1U, 
} ra8_dtc_dtcst_bits_t;
 
/* DTCSTS bit positions (HUM 18.2.4 p 788). */
typedef enum : uint16_t {
  k_ra8_dtcsts_vecn_msk = 0x00FFU, 
  k_ra8_dtcsts_act_msk  = 0x8000U, 
} ra8_dtc_dtcsts_bits_t;
 
/* DTCADMOD bit positions (HUM 18.2.12 p 793). */
typedef enum : uint8_t {
  k_ra8_dtcadmod_short_msk = 0x1U, 
} ra8_dtc_dtcadmod_bits_t;

typedef struct {
  volatile uint8_t  DTCCR;      
  volatile uint8_t  _r0;        
  volatile uint16_t _r1;        
  volatile uint32_t DTCVBR;     
  volatile uint8_t  DTCADMOD;   
  volatile uint8_t  _r2;        
  volatile uint16_t _r3;        
  volatile uint8_t  DTCST;      
  volatile uint8_t  _r4;        
  volatile uint16_t DTCSTS;     
  volatile uint8_t  DTCCR_SEC;  
  volatile uint8_t  _r5;        
  volatile uint16_t _r6;        
  volatile uint32_t DTCVBR_SEC; 
  volatile uint32_t DTCDISP;    
  volatile uint32_t _r7;        
  volatile uint32_t DTEVR;      
  volatile uint32_t DTCIBR;     
  volatile uint8_t  DTCOR;      
  volatile uint8_t  _r8;        
  volatile uint16_t _r9;        
  volatile uint16_t DTCSQE;     
  volatile uint16_t _r10;       
} r_dtc_regs_t;

typedef struct {
  volatile uint32_t MR;  
  volatile uint32_t SAR; 
  volatile uint32_t DAR; 
  volatile uint16_t CRB; 
  volatile uint16_t CRA; 
} r_dtc_xfer_info_t;

RA8_HW_REGISTER_ACCESS
static inline volatile r_dtc_regs_t* ra8_dtc(void)
{
  return (volatile r_dtc_regs_t*)k_ra8_dtc_base_addr;
}
 
#ifdef __cplusplus
}
#endif