One 16-byte Transfer Information (TI) block referenced by the DTC vector table. More...

#include <ra8_dtc_regs.h>

Data Fields
volatile uint32_t	MR
	Mode word: [31:24] MRA, [23:16] MRB, [15:8] MRC.
volatile uint32_t	SAR
	Source address register.
volatile uint32_t	DAR
	Destination address register.
volatile uint16_t	CRB
	Block-count register (block mode only).
volatile uint16_t	CRA
	Transfer-count register (CRAH/CRAL).

Detailed Description

One 16-byte Transfer Information (TI) block referenced by the DTC vector table.

Each TI block is exactly 16 bytes (HUM Figure 18.4 p 799). It is placed (16-byte-aligned) anywhere in SRAM; its start address is what a call site stores into the 4-byte DTC vector-table slot for that activation source (DTCVBR + vector_number*4, HUM Ch 18.3.1 p 796). The TI block is therefore reached one indirection away from DTCVBR, not packed directly into the vector table.

Field layout matches FSP transfer_info_t so call-sites can be ported one-for-one (and the on-the-wire DTC TI block layout is therefore 16 bytes on every target):

MR (32 bits) = transfer settings word: MR[31:24] = MRA, MR[23:16] = MRB, MR[15:8] = MRC, MR[7:0] = reserved.
SAR / DAR = source / destination 32-bit bus addresses.
CRB = block-mode block count.
CRA = transfer count (16 bits) – repeat / block split as upper-byte (CRAH) / lower-byte (CRAL) halves.

SAR / DAR are uint32_t rather than void* so the structure is exactly 16 bytes on both the 32-bit Cortex-M85 target and the 64-bit unit-test host. Call sites build addresses with (uint32_t)(uintptr_t)ptr (HUM 18.2 p 793-797).

Definition at line 161 of file ra8_dtc_regs.h.

Field Documentation

◆ CRA

volatile uint16_t r_dtc_xfer_info_t::CRA

Transfer-count register (CRAH/CRAL).

Definition at line 166 of file ra8_dtc_regs.h.

◆ CRB

volatile uint16_t r_dtc_xfer_info_t::CRB

Block-count register (block mode only).

Definition at line 165 of file ra8_dtc_regs.h.

◆ DAR

volatile uint32_t r_dtc_xfer_info_t::DAR

Destination address register.

Definition at line 164 of file ra8_dtc_regs.h.

◆ MR

volatile uint32_t r_dtc_xfer_info_t::MR

Mode word: [31:24] MRA, [23:16] MRB, [15:8] MRC.

Definition at line 162 of file ra8_dtc_regs.h.

◆ SAR

volatile uint32_t r_dtc_xfer_info_t::SAR

Source address register.

Definition at line 163 of file ra8_dtc_regs.h.

The documentation for this struct was generated from the following file:

libs/ra8_hal/inc/ra8_dtc_regs.h