ra8_rmac_regs.h File Reference

Ethernet MAC (RMAC) per-port register layout for the RA8D2. More...

#include <stddef.h>
#include <stdint.h>
#include "ra8_attributes.h"
#include "ra8_ether_regs.h"

Include dependency graph for ra8_rmac_regs.h:

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Data Structures
struct	r_rmac_regs_t
	Full RMAC per-port register window (HUM Ch 33.3, FSP R_RMAC0_Type). More...

Enumerations
enum	ra8_rmac_port_t : uint8_t {   k_ra8_rmac_port_0 = 0U ,   k_ra8_rmac_port_1 = 1U ,   k_ra8_rmac_port_count = 2U }
	RMAC port index (m = 0, 1). More...
enum	ra8_rmac_mac_len_t : uint8_t { k_ra8_rmac_mac_byte_count = 6U }
	Length of an Ethernet MAC address in bytes. More...
enum	ra8_rmac_mac_byte_idx_t : uint8_t {   k_ra8_rmac_mac_byte_0 = 0U ,   k_ra8_rmac_mac_byte_1 = 1U ,   k_ra8_rmac_mac_byte_2 = 2U ,   k_ra8_rmac_mac_byte_3 = 3U ,   k_ra8_rmac_mac_byte_4 = 4U ,   k_ra8_rmac_mac_byte_5 = 5U }
	Byte indices into a 6-byte MAC address (network byte order). More...
enum	ra8_rmac_shift_t : uint8_t {   k_ra8_rmac_shift_byte0 = 0U ,   k_ra8_rmac_shift_byte1 = 8U ,   k_ra8_rmac_shift_byte2 = 16U ,   k_ra8_rmac_shift_byte3 = 24U ,   k_ra8_rmac_shift_high16 = 0U ,   k_ra8_rmac_shift_high24 = 8U ,   k_ra8_rmac_shift_mpsm_pda = 3U ,   k_ra8_rmac_shift_mpsm_pra = 8U ,   k_ra8_rmac_shift_mpsm_pop = 13U ,   k_ra8_rmac_shift_mpsm_prd = 16U ,   k_ra8_rmac_shift_mpic_lsc = 3U ,   k_ra8_rmac_shift_mpic_pis = 0U ,   k_ra8_rmac_shift_mpic_psmcs = 16U ,   k_ra8_rmac_shift_mtpfc_pt = 0U ,   k_ra8_rmac_shift_mtpfc_pfrt = 16U ,   k_ra8_rmac_shift_mrfsce_max = 0U ,   k_ra8_rmac_shift_mrfsce_min = 16U ,   k_ra8_rmac_shift_mrgc_pfcrc = 16U ,   k_ra8_rmac_shift_mpfc_val = 8U ,   k_ra8_rmac_shift_mrafc_perfect = 16U }
	Bit shifts used across the RMAC register surface. More...
enum	ra8_rmac_mask_t : uint32_t {   k_ra8_rmac_mask_byte = 0x000000FFUL ,   k_ra8_rmac_mask_mrmac0_mau = 0x0000FFFFUL ,   k_ra8_rmac_mask_mpsm_phy_reg = 0x0000001FUL ,   k_ra8_rmac_mask_mpsm_op = 0x00000003UL ,   k_ra8_rmac_mask_mpsm_data = 0x0000FFFFUL ,   k_ra8_rmac_mask_mpic_pis = 0x00000007UL ,   k_ra8_rmac_mask_mpic_lsc = 0x00000007UL ,   k_ra8_rmac_mask_mpic_psmcs = 0x0000007FUL ,   k_ra8_rmac_mask_mtpfc_pt = 0x0000FFFFUL ,   k_ra8_rmac_mask_mtpfc_pfrt = 0x000000FFUL ,   k_ra8_rmac_mask_mrfsc = 0x0000FFFFUL ,   k_ra8_rmac_mask_mrgc_pfcrc = 0x000000FFUL ,   k_ra8_rmac_mask_mpfc_val = 0x000000FFUL ,   k_ra8_rmac_mask_pfc_priority = 0x000000FFUL ,   k_ra8_rmac_mask_meis_all = 0x3FFF3FFFUL ,   k_ra8_rmac_mask_mmis0_all = 0x00001FFFUL ,   k_ra8_rmac_mask_mmis1_all = 0x0000000FUL ,   k_ra8_rmac_mask_mmis2_all = 0x00000007UL ,   k_ra8_rmac_mask_meis_rx = 0x00000001UL ,   k_ra8_rmac_mask_all = 0xFFFFFFFFUL }
	Bit masks used across the RMAC register surface. More...
enum	ra8_rmac_offset_t : uint16_t {   k_ra8_rmac_off_mpsm = 0x0000U ,   k_ra8_rmac_off_mpic = 0x0004U ,   k_ra8_rmac_off_mpim = 0x0008U ,   k_ra8_rmac_off_mioc = 0x0010U ,   k_ra8_rmac_off_mtffc = 0x0020U ,   k_ra8_rmac_off_mtpfc = 0x0024U ,   k_ra8_rmac_off_mtpfc2 = 0x0028U ,   k_ra8_rmac_off_mtpfc30 = 0x0030U ,   k_ra8_rmac_off_mtpfc31 = 0x0034U ,   k_ra8_rmac_off_mtatc0 = 0x0050U ,   k_ra8_rmac_off_mtatc1 = 0x0054U ,   k_ra8_rmac_off_mtim = 0x0060U ,   k_ra8_rmac_off_mrgc = 0x0080U ,   k_ra8_rmac_off_mrmac0 = 0x0084U ,   k_ra8_rmac_off_mrmac1 = 0x0088U ,   k_ra8_rmac_off_mrafc = 0x008CU ,   k_ra8_rmac_off_mrsce = 0x0090U ,   k_ra8_rmac_off_mrscp = 0x0094U ,   k_ra8_rmac_off_mrscc = 0x0098U ,   k_ra8_rmac_off_mrfsce = 0x009CU ,   k_ra8_rmac_off_mrfscp = 0x00A0U ,   k_ra8_rmac_off_mtrc = 0x00A4U ,   k_ra8_rmac_off_mrpfm = 0x00ACU ,   k_ra8_rmac_off_mpfc0 = 0x0100U ,   k_ra8_rmac_off_mlvc = 0x0180U ,   k_ra8_rmac_off_meeec = 0x0184U ,   k_ra8_rmac_off_mlbc = 0x0188U ,   k_ra8_rmac_off_mxgmiic = 0x0190U ,   k_ra8_rmac_off_mpch = 0x0194U ,   k_ra8_rmac_off_manm = 0x019CU ,   k_ra8_rmac_off_meis = 0x0200U ,   k_ra8_rmac_off_meie = 0x0204U ,   k_ra8_rmac_off_meid = 0x0208U ,   k_ra8_rmac_off_mmis0 = 0x0210U ,   k_ra8_rmac_off_mmie0 = 0x0214U ,   k_ra8_rmac_off_mmid0 = 0x0218U ,   k_ra8_rmac_off_mmis1 = 0x0220U ,   k_ra8_rmac_off_mmie1 = 0x0224U ,   k_ra8_rmac_off_mmid1 = 0x0228U ,   k_ra8_rmac_off_mmis2 = 0x0230U ,   k_ra8_rmac_off_mmie2 = 0x0234U ,   k_ra8_rmac_off_mmid2 = 0x0238U ,   k_ra8_rmac_off_mmpftct = 0x0300U ,   k_ra8_rmac_off_mapftct = 0x0304U ,   k_ra8_rmac_off_mpfrct = 0x0308U ,   k_ra8_rmac_off_mfcict = 0x030CU ,   k_ra8_rmac_off_meeect = 0x0310U ,   k_ra8_rmac_off_mmpcftct0 = 0x0320U ,   k_ra8_rmac_off_mmpcftct1 = 0x0324U ,   k_ra8_rmac_off_mapcftct0 = 0x0330U ,   k_ra8_rmac_off_mapcftct1 = 0x0334U ,   k_ra8_rmac_off_mpcfrct0 = 0x0340U ,   k_ra8_rmac_off_mrovfc = 0x0360U ,   k_ra8_rmac_off_mrhcrcec = 0x0364U ,   k_ra8_rmac_off_mrgfce = 0x0408U ,   k_ra8_rmac_off_mrgfcp = 0x040CU ,   k_ra8_rmac_off_mtgfce = 0x0508U ,   k_ra8_rmac_off_mtgfcp = 0x050CU }
	RMAC per-port register offsets (HUM Ch 33.3 Table 33.4). More...
enum	ra8_rmac_mrafc_t : uint32_t {   k_ra8_rmac_mrafc_hash_unicast = 0x00000001UL ,   k_ra8_rmac_mrafc_hash_multicast = 0x00000002UL ,   k_ra8_rmac_mrafc_hash_broadcast = 0x00000004UL ,   k_ra8_rmac_mrafc_mst_storm = 0x00000008UL ,   k_ra8_rmac_mrafc_bst_storm = 0x00000010UL ,   k_ra8_rmac_mrafc_mc_accept = 0x00000020UL ,   k_ra8_rmac_mrafc_bc_accept = 0x00000040UL ,   k_ra8_rmac_mrafc_no_destmac_reject = 0x00000080UL ,   k_ra8_rmac_mrafc_short_frame = 0x00000100UL ,   k_ra8_rmac_mrafc_no_srcmac_reject = 0x00000200UL ,   k_ra8_rmac_mrafc_multicast_src = 0x00000400UL ,   k_ra8_rmac_mrafc_perfect_unicast = 0x00010000UL ,   k_ra8_rmac_mrafc_perfect_multicast = 0x00020000UL ,   k_ra8_rmac_mrafc_perfect_broadcast = 0x00040000UL ,   k_ra8_rmac_mrafc_unicast_match ,   k_ra8_rmac_mrafc_multicast_hash ,   k_ra8_rmac_mrafc_broadcast ,   k_ra8_rmac_mrafc_promiscuous }
	MRAFC reception address filter mode bits (HUM Ch 33.4). More...
enum	ra8_rmac_pis_t : uint8_t {   k_ra8_rmac_pis_mii = 0U ,   k_ra8_rmac_pis_gmii = 2U }
	Physical interface selector for MPIC.PIS[2:0]. More...
enum	ra8_rmac_lsc_t : uint8_t {   k_ra8_rmac_lsc_10mbit = 0U ,   k_ra8_rmac_lsc_100mbit = 1U ,   k_ra8_rmac_lsc_1000mbit = 2U ,   k_ra8_rmac_lsc_2500mbit = 3U ,   k_ra8_rmac_lsc_10gbit = 4U ,   k_ra8_rmac_lsc_count = 5U }
	Link-speed selector for MPIC.LSC[5:3] (HUM Ch 33.4). More...
enum	ra8_rmac_duplex_t : uint8_t {   k_ra8_rmac_duplex_half = 0U ,   k_ra8_rmac_duplex_full = 1U }
	Duplex selection (programmed via MPIC.PIPP / MPIC.PIP). More...
enum	ra8_rmac_mdio_op_t : uint8_t {   k_ra8_rmac_mdio_op_c22_write = 1U ,   k_ra8_rmac_mdio_op_c22_read = 2U ,   k_ra8_rmac_mdio_op_c45_address = 0U ,   k_ra8_rmac_mdio_op_c45_write = 1U ,   k_ra8_rmac_mdio_op_c45_read_inc = 2U ,   k_ra8_rmac_mdio_op_c45_read = 3U }
	MPSM.POP[14:13] PHY MDIO operation selector. More...
enum	ra8_rmac_pause_mode_t : uint8_t {   k_ra8_rmac_pause_mode_802_3x = 0U ,   k_ra8_rmac_pause_mode_pfc = 1U }
	Selects PFM bit in MTPFC2 – pause vs PFC frame. More...
enum	ra8_rmac_pfc_group_t : uint8_t {   k_ra8_rmac_pfc_group_0 = 0U ,   k_ra8_rmac_pfc_group_1 = 1U ,   k_ra8_rmac_pfc_group_count = 2U }
	PFC priority group index (MTPFC3t, t = 0..1). More...
enum	ra8_rmac_ptp_filter_idx_t : uint8_t { k_ra8_rmac_ptp_filter_count = 16U }
	PTP filter table index for MPFCt (t = 0..15). More...
enum	ra8_rmac_pfc_rx_idx_t : uint8_t { k_ra8_rmac_pfc_rx_count = 8U }
	PFC RX counter index (MPCFRCTt, t = 0..7). More...
enum	ra8_rmac_meis_bit_t : uint32_t {   k_ra8_rmac_meis_tsls = (1UL << 0) ,   k_ra8_rmac_meis_ties = (1UL << 1) ,   k_ra8_rmac_meis_pres = (1UL << 2) ,   k_ra8_rmac_meis_pfrros = (1UL << 3) ,   k_ra8_rmac_meis_fcds = (1UL << 4) ,   k_ra8_rmac_meis_tces = (1UL << 5) ,   k_ra8_rmac_meis_tbcis = (1UL << 6) ,   k_ra8_rmac_meis_bfes = (1UL << 7) ,   k_ra8_rmac_meis_fces = (1UL << 8) ,   k_ra8_rmac_meis_reoes = (1UL << 9) ,   k_ra8_rmac_meis_rpoes = (1UL << 10) ,   k_ra8_rmac_meis_rpcres = (1UL << 11) ,   k_ra8_rmac_meis_ctles0 = (1UL << 12) ,   k_ra8_rmac_meis_ctles1 = (1UL << 13) ,   k_ra8_rmac_meis_pdes = (1UL << 20) ,   k_ra8_rmac_meis_pnaes = (1UL << 21) ,   k_ra8_rmac_meis_fcmces = (1UL << 22) ,   k_ra8_rmac_meis_ffmes = (1UL << 23) ,   k_ra8_rmac_meis_cfces = (1UL << 24) ,   k_ra8_rmac_meis_frces = (1UL << 25) ,   k_ra8_rmac_meis_rpooms = (1UL << 26) ,   k_ra8_rmac_meis_ffs = (1UL << 27) ,   k_ra8_rmac_meis_fues = (1UL << 28) ,   k_ra8_rmac_meis_foes = (1UL << 29) }
	Per-bit names inside MEIS / MEIE / MEID (HUM Ch 33.4). More...
enum	ra8_rmac_mmis0_bit_t : uint32_t {   k_ra8_rmac_mmis0_plscs = (1UL << 0) ,   k_ra8_rmac_mmis0_pids = (1UL << 1) ,   k_ra8_rmac_mmis0_lvss = (1UL << 2) ,   k_ra8_rmac_mmis0_lvfs = (1UL << 3) ,   k_ra8_rmac_mmis0_vfrs = (1UL << 4) ,   k_ra8_rmac_mmis0_andets = (1UL << 6) ,   k_ra8_rmac_mmis0_xlfds = (1UL << 8) ,   k_ra8_rmac_mmis0_xlfes = (1UL << 9) ,   k_ra8_rmac_mmis0_xlfsds = (1UL << 10) ,   k_ra8_rmac_mmis0_xrfsds = (1UL << 11) ,   k_ra8_rmac_mmis0_xlisds = (1UL << 12) }
	MMIS0 monitoring-IRQ bits (HUM Ch 33.4). More...
enum	ra8_rmac_mmis1_bit_t : uint32_t {   k_ra8_rmac_mmis1_pracs = (1UL << 0) ,   k_ra8_rmac_mmis1_pwacs = (1UL << 1) ,   k_ra8_rmac_mmis1_paacs = (1UL << 2) ,   k_ra8_rmac_mmis1_ppracs = (1UL << 3) }
	MMIS1 PHY-station-management completion bits. More...
enum	ra8_rmac_mpsm_bit_t : uint32_t { k_ra8_rmac_mpsm_psme = (1UL << 0) }
	MPSM (PHY Station Management Register) control bits. More...
enum	ra8_rmac_mmis2_bit_t : uint32_t {   k_ra8_rmac_mmis2_mpdis = (1UL << 0) ,   k_ra8_rmac_mmis2_lpiais = (1UL << 1) ,   k_ra8_rmac_mmis2_lpidis = (1UL << 2) }
	MMIS2 wake-on-LAN / EEE bits. More...
enum	ra8_rmac_mtffc_bit_t : uint32_t {   k_ra8_rmac_mtffc_dpad = (1UL << 0) ,   k_ra8_rmac_mtffc_fcm = (1UL << 1) }
	MTFFC TX-frame-format bits (HUM Ch 33.4). More...
enum	ra8_rmac_mrgc_bit_t : uint32_t {   k_ra8_rmac_mrgc_rcpt = (1UL << 0) ,   k_ra8_rmac_mrgc_pfrc = (1UL << 1) ,   k_ra8_rmac_mrgc_pfrtz = (1UL << 2) ,   k_ra8_rmac_mrgc_mpde = (1UL << 3) ,   k_ra8_rmac_mrgc_rfcfe = (1UL << 4) }
	MRGC RX-general-config bits (HUM Ch 33.4). More...
enum	ra8_rmac_mlbc_bit_t : uint32_t { k_ra8_rmac_mlbc_lbme = (1UL << 0) }
	MLBC loopback bits (HUM Ch 33.4). More...
enum	ra8_rmac_meeec_bit_t : uint32_t { k_ra8_rmac_meeec_lpitr = (1UL << 0) }
	MEEEC Energy-Efficient-Ethernet bits. More...
enum	ra8_rmac_mpim_bit_t : uint32_t {   k_ra8_rmac_mpim_pls = (1UL << 0) ,   k_ra8_rmac_mpim_lpia = (1UL << 1) }
	MPIM PHY-monitoring bits. More...
enum	ra8_rmac_mlvc_bit_t : uint32_t {   k_ra8_rmac_mlvc_pase = (1UL << 8) ,   k_ra8_rmac_mlvc_plv = (1UL << 16) }
	MLVC link-verification bits. More...
enum	ra8_rmac_mxgmiic_bit_t : uint32_t {   k_ra8_rmac_mxgmiic_lfs_txrfs = (1UL << 0) ,   k_ra8_rmac_mxgmiic_lfs_txidle = (1UL << 1) }
	MXGMIIC 10G-XGMII bits. More...
enum	ra8_rmac_rsv_words_t : uint8_t {   k_ra8_rmac_rsv_words_mtim_to_mrgc = 7U ,   k_ra8_rmac_rsv_words_mrpfm_to_mpfc = 20U ,   k_ra8_rmac_rsv_words_manm_to_meis = 24U ,   k_ra8_rmac_rsv_words_mmid2_to_mmpftct = 49U ,   k_ra8_rmac_rsv_words_mrhcrcec_to_mrgfce = 40U ,   k_ra8_rmac_rsv_words_mrxbcpl_to_mtgfce = 43U }
	Reserved-word array sizes (in 32-bit words) used inside the RMAC per-port register block. More...
enum	ra8_rmac_size_t : uint16_t { k_ra8_rmac_window_bytes = 0x530U }
	RMAC register window total size (FSP R_RMAC0_Type). More...

Functions
static volatile r_rmac_regs_t *	ra8_rmac (ra8_rmac_port_t port)
	Compile-time check that the RMAC register window matches FSP.

Detailed Description

Ethernet MAC (RMAC) per-port register layout for the RA8D2.

Tag

[Ring 3 / HAL] {World: NS}

RMAC is the per-port Ethernet MAC block. One RMAC instance exists per Ethernet port (m = 0, 1) and the two instances are mapped 0x2000 apart, interleaved with the matching ETHA instance:

ETHA0 = 0x403C_A000 RMAC0 = 0x403C_B000 ETHA1 = 0x403C_C000 RMAC1 = 0x403C_D000

The base address constants live in ra8_ether_regs.h; this file only adds the per-port register window struct, the bit-field enums, and the register-window accessor used by the per-port driver in libs/ra8_hal/src/ra8_rmac.c.

The layout is derived against the FSP CMSIS RA8D2 header R7KA8D2KF_core0.h for the R_RMAC0_Type structure (Size = 0x530). Every offset has been cross-checked against HUM Ch 33.3 Table 33.4.

The full register surface is exposed: PHY MDIO (MPSM/MPIC/MPIM), I/O configuration (MIOC), TX frame format / pause / PFC config (MTFFC/MTPFC/MTPFC2/MTPFC3t), TX timestamp config (MTATCt/MTIM), RX general / address / filter / storm / size / PTP-filter / pause monitoring (MRGC/MRMAC0/1/MRAFC/MRSCE/P/MRSCC/MRFSCE/P/MTRC/MRPFM/ MPFCt), link verification (MLVC), Energy Efficient Ethernet (MEEEC), loopback (MLBC), 10G XGMII config + auto-negotiation (MXGMIIC/MPCH/MANM), error and monitoring interrupt status/enable/disable (MEIS/MEIE/MEID, MMIS0..2/MMIE0..2/MMID0..2), and the full statistic counter block (MMPFTCT..MTXBCPL).

PTP timestamping itself stays in ra8_eth_gptp – this header exposes the per-frame TX-capture filter table (MPFCt) so RMAC can flag PTP frames to the GPTP block, but the timestamp counters are owned by the GPTP driver.

Copyright

Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_rmac_regs.h.

Enumeration Type Documentation

ra8_rmac_duplex_t

enum ra8_rmac_duplex_t : uint8_t

Duplex selection (programmed via MPIC.PIPP / MPIC.PIP).

Enumerator
k_ra8_rmac_duplex_half	Half duplex.
k_ra8_rmac_duplex_full	Full duplex.

Definition at line 326 of file ra8_rmac_regs.h.

ra8_rmac_lsc_t

enum ra8_rmac_lsc_t : uint8_t

Link-speed selector for MPIC.LSC[5:3] (HUM Ch 33.4).

Enumerator
k_ra8_rmac_lsc_10mbit	10 Mbit/s.
k_ra8_rmac_lsc_100mbit	100 Mbit/s.
k_ra8_rmac_lsc_1000mbit	1 Gbit/s.
k_ra8_rmac_lsc_2500mbit	2.5 Gbit/s.
k_ra8_rmac_lsc_10gbit	10 Gbit/s.
k_ra8_rmac_lsc_count	Sentinel.

Definition at line 313 of file ra8_rmac_regs.h.

ra8_rmac_mac_byte_idx_t

enum ra8_rmac_mac_byte_idx_t : uint8_t

Byte indices into a 6-byte MAC address (network byte order).

Enumerator
k_ra8_rmac_mac_byte_0	First byte (high octet, OUI).
k_ra8_rmac_mac_byte_1	RA8 rmac MAC byte 1.
k_ra8_rmac_mac_byte_2	RA8 rmac MAC byte 2.
k_ra8_rmac_mac_byte_3	RA8 rmac MAC byte 3.
k_ra8_rmac_mac_byte_4	RA8 rmac MAC byte 4.
k_ra8_rmac_mac_byte_5	Last byte (low octet).

Definition at line 89 of file ra8_rmac_regs.h.

ra8_rmac_mac_len_t

enum ra8_rmac_mac_len_t : uint8_t

Length of an Ethernet MAC address in bytes.

Six-byte / 48-bit IEEE 802 MAC address, split across MRMAC0 (high 16 bits in MAU field) and MRMAC1 (low 32 bits in MAL field) per HUM Ch 33.4.

Enumerator
k_ra8_rmac_mac_byte_count	Bytes in a unicast MAC.

Definition at line 81 of file ra8_rmac_regs.h.

ra8_rmac_mask_t

enum ra8_rmac_mask_t : uint32_t

Bit masks used across the RMAC register surface.

Enumerator
k_ra8_rmac_mask_byte	One MAC octet.
k_ra8_rmac_mask_mrmac0_mau	MRMAC0.MAU valid.
k_ra8_rmac_mask_mpsm_phy_reg	5-bit PHY reg/dev.
k_ra8_rmac_mask_mpsm_op	MPSM.POP[14:13].
k_ra8_rmac_mask_mpsm_data	MPSM.PRD[31:16].
k_ra8_rmac_mask_mpic_pis	MPIC.PIS[2:0].
k_ra8_rmac_mask_mpic_lsc	MPIC.LSC[5:3].
k_ra8_rmac_mask_mpic_psmcs	MPIC.PSMCS[22:16].
k_ra8_rmac_mask_mtpfc_pt	MTPFC.PT[15:0].
k_ra8_rmac_mask_mtpfc_pfrt	MTPFC.PFRT[23:16].
k_ra8_rmac_mask_mrfsc	16-bit frame size.
k_ra8_rmac_mask_mrgc_pfcrc	MRGC.PFCRC.
k_ra8_rmac_mask_mpfc_val	MPFCt.PFBV octet.
k_ra8_rmac_mask_pfc_priority	8-bit prio bitmap.
k_ra8_rmac_mask_meis_all	MEIS valid bits.
k_ra8_rmac_mask_mmis0_all	MMIS0 valid bits.
k_ra8_rmac_mask_mmis1_all	MMIS1 valid bits.
k_ra8_rmac_mask_mmis2_all	MMIS2 valid bits.
k_ra8_rmac_mask_meis_rx	Sample RX-error bit.
k_ra8_rmac_mask_all	Wildcard write.

Definition at line 130 of file ra8_rmac_regs.h.

ra8_rmac_mdio_op_t

enum ra8_rmac_mdio_op_t : uint8_t

MPSM.POP[14:13] PHY MDIO operation selector.

For Clause-22 access the encoding maps to "read" / "write". For Clause-45 access the encoding additionally selects "address frame" vs "post-read-incr" – the driver wraps the lower-level operations into ra8_rmac_mdio_c45_* helpers.

Enumerator
k_ra8_rmac_mdio_op_c22_write	01 – C22 write.
k_ra8_rmac_mdio_op_c22_read	10 – C22 read.
k_ra8_rmac_mdio_op_c45_address	00 – C45 address.
k_ra8_rmac_mdio_op_c45_write	01 – C45 write.
k_ra8_rmac_mdio_op_c45_read_inc	10 – C45 post-incr rd.
k_ra8_rmac_mdio_op_c45_read	11 – C45 read.

Definition at line 341 of file ra8_rmac_regs.h.

ra8_rmac_meeec_bit_t

enum ra8_rmac_meeec_bit_t : uint32_t

MEEEC Energy-Efficient-Ethernet bits.

Enumerator
k_ra8_rmac_meeec_lpitr	LPI transmit request.

Definition at line 502 of file ra8_rmac_regs.h.

ra8_rmac_meis_bit_t

enum ra8_rmac_meis_bit_t : uint32_t

Per-bit names inside MEIS / MEIE / MEID (HUM Ch 33.4).

Enumerator
k_ra8_rmac_meis_tsls	Transmit-side link state.
k_ra8_rmac_meis_ties	TX interrupt error.
k_ra8_rmac_meis_pres	PHY register error.
k_ra8_rmac_meis_pfrros	Pause/PFC frame RX over.
k_ra8_rmac_meis_fcds	False carrier detect.
k_ra8_rmac_meis_tces	TX collision error.
k_ra8_rmac_meis_tbcis	TX byte counter overflow.
k_ra8_rmac_meis_bfes	RX bad-fragment error.
k_ra8_rmac_meis_fces	RX fragment-count error.
k_ra8_rmac_meis_reoes	RX end-of-frame error.
k_ra8_rmac_meis_rpoes	RX preamble error.
k_ra8_rmac_meis_rpcres	RX PCH CRC error.
k_ra8_rmac_meis_ctles0	Counter overflow group 0.
k_ra8_rmac_meis_ctles1	Counter overflow group 1.
k_ra8_rmac_meis_pdes	PFC frame decode error.
k_ra8_rmac_meis_pnaes	PFC not-allowed.
k_ra8_rmac_meis_fcmces	Frame-check mCRC error.
k_ra8_rmac_meis_ffmes	Final fragment missing.
k_ra8_rmac_meis_cfces	Continuation fragment cnt.
k_ra8_rmac_meis_frces	RMAC filter rejected.
k_ra8_rmac_meis_rpooms	RX preamble out of margin.
k_ra8_rmac_meis_ffs	First-fragment status.
k_ra8_rmac_meis_fues	Frame undersize error.
k_ra8_rmac_meis_foes	Frame oversize error.

Definition at line 389 of file ra8_rmac_regs.h.

ra8_rmac_mlbc_bit_t

enum ra8_rmac_mlbc_bit_t : uint32_t

MLBC loopback bits (HUM Ch 33.4).

Enumerator
k_ra8_rmac_mlbc_lbme	Loopback mode enable.

Definition at line 494 of file ra8_rmac_regs.h.

ra8_rmac_mlvc_bit_t

enum ra8_rmac_mlvc_bit_t : uint32_t

MLVC link-verification bits.

Enumerator
k_ra8_rmac_mlvc_pase	PHY auto-startup enable.
k_ra8_rmac_mlvc_plv	Perform link verification.

Definition at line 519 of file ra8_rmac_regs.h.

ra8_rmac_mmis0_bit_t

enum ra8_rmac_mmis0_bit_t : uint32_t

MMIS0 monitoring-IRQ bits (HUM Ch 33.4).

Enumerator
k_ra8_rmac_mmis0_plscs	PHY link-state change.
k_ra8_rmac_mmis0_pids	PHY ID detected.
k_ra8_rmac_mmis0_lvss	Link verify success.
k_ra8_rmac_mmis0_lvfs	Link verify failure.
k_ra8_rmac_mmis0_vfrs	Verify frame received.
k_ra8_rmac_mmis0_andets	Auto-neg detected.
k_ra8_rmac_mmis0_xlfds	10G local-fault detect.
k_ra8_rmac_mmis0_xlfes	10G local-fault end.
k_ra8_rmac_mmis0_xlfsds	10G LF sync drop.
k_ra8_rmac_mmis0_xrfsds	10G RF sync drop.
k_ra8_rmac_mmis0_xlisds	10G LI sync drop.

Definition at line 420 of file ra8_rmac_regs.h.

ra8_rmac_mmis1_bit_t

enum ra8_rmac_mmis1_bit_t : uint32_t

MMIS1 PHY-station-management completion bits.

Enumerator
k_ra8_rmac_mmis1_pracs	PHY read access complete.
k_ra8_rmac_mmis1_pwacs	PHY write access complete.
k_ra8_rmac_mmis1_paacs	PHY address access cmpl.
k_ra8_rmac_mmis1_ppracs	PHY post-read autoinc cmpl.

Definition at line 438 of file ra8_rmac_regs.h.

ra8_rmac_mmis2_bit_t

enum ra8_rmac_mmis2_bit_t : uint32_t

MMIS2 wake-on-LAN / EEE bits.

Enumerator
k_ra8_rmac_mmis2_mpdis	Magic-packet detect.
k_ra8_rmac_mmis2_lpiais	LPI assert IRQ.
k_ra8_rmac_mmis2_lpidis	LPI de-assert IRQ.

Definition at line 463 of file ra8_rmac_regs.h.

ra8_rmac_mpim_bit_t

enum ra8_rmac_mpim_bit_t : uint32_t

MPIM PHY-monitoring bits.

Enumerator
k_ra8_rmac_mpim_pls	PHY link status.
k_ra8_rmac_mpim_lpia	LPI active.

Definition at line 510 of file ra8_rmac_regs.h.

ra8_rmac_mpsm_bit_t

enum ra8_rmac_mpsm_bit_t : uint32_t

MPSM (PHY Station Management Register) control bits.

HUM Ch 33.4.1.1 "MPSM" p 1707. PSME is the start/busy flag: software writes 1 to launch a PHY register transaction and the hardware self-clears it to 0 on completion. Writes to MPSM while PSME is asserted "have no effect" (HUM Note 2), so the driver must drain PSME to 0 before issuing a new transaction.

Enumerator
k_ra8_rmac_mpsm_psme	PHY Station Management Enable / busy.

Definition at line 455 of file ra8_rmac_regs.h.

ra8_rmac_mrafc_t

enum ra8_rmac_mrafc_t : uint32_t

MRAFC reception address filter mode bits (HUM Ch 33.4).

Bit layout (HUM Ch 33.4 "MRAFC : MAC Reception Address Filter Configuration Register" p 1707):

• bits [10:0] hash/class enables (UCENE / MCENE / BCENE / ...)
• bits [26:16] perfect-match enables (UCENP / MCENP / BCENP / ...)

The MAC's receive filter passes a frame only when BOTH halves accept it: the hash-class enable AND the corresponding perfect-match enable. FSP's r_rmac.c::rmac_configure_reception_filter (commit 8b3f2c1) always programs the two halves in lockstep – e.g. enabling broadcast sets BCENE | BCENP together; enabling unicast sets UCENE | UCENP together. Setting only the low half silently drops every frame on real silicon.

To make the public enum impossible to misuse, the three primary class-enable constants below already bundle their high-half twin (the FSP-canonical pairing). The bare register-level bits are still exposed under the k_ra8_rmac_mrafc_perfect_* / k_ra8_rmac_mrafc_hash_* aliases for callers that need to drive the halves independently (e.g. address-hash-table maintenance).

Reference: FSP renesas/fsp r_rmac.c (RMAC_REG_MRAFC_PROMISCUOUS_VALUE and rmac_configure_reception_filter) for the canonical pairing.

Enumerator
k_ra8_rmac_mrafc_hash_unicast	UCENE alone.
k_ra8_rmac_mrafc_hash_multicast	MCENE alone.
k_ra8_rmac_mrafc_hash_broadcast	BCENE alone.
k_ra8_rmac_mrafc_mst_storm	MSTENE.
k_ra8_rmac_mrafc_bst_storm	BSTENE.
k_ra8_rmac_mrafc_mc_accept	MCACE.
k_ra8_rmac_mrafc_bc_accept	BCACE.
k_ra8_rmac_mrafc_no_destmac_reject	NDAREE.
k_ra8_rmac_mrafc_short_frame	SDSFREE.
k_ra8_rmac_mrafc_no_srcmac_reject	NSAREE.
k_ra8_rmac_mrafc_multicast_src	MSAREE.
k_ra8_rmac_mrafc_perfect_unicast	UCENP alone.
k_ra8_rmac_mrafc_perfect_multicast	MCENP alone.
k_ra8_rmac_mrafc_perfect_broadcast	BCENP alone.
k_ra8_rmac_mrafc_unicast_match	UCENE|UCENP.
k_ra8_rmac_mrafc_multicast_hash	MCENE|MCENP.
k_ra8_rmac_mrafc_broadcast	BCENE|BCENP.
k_ra8_rmac_mrafc_promiscuous	RA8 rmac mrafc promiscuous.

Definition at line 250 of file ra8_rmac_regs.h.

ra8_rmac_mrgc_bit_t

enum ra8_rmac_mrgc_bit_t : uint32_t

MRGC RX-general-config bits (HUM Ch 33.4).

Enumerator
k_ra8_rmac_mrgc_rcpt	Reception-control passthru.
k_ra8_rmac_mrgc_pfrc	Pause-frame RX control.
k_ra8_rmac_mrgc_pfrtz	Pause-frame request to zero.
k_ra8_rmac_mrgc_mpde	Magic-packet detect enable.
k_ra8_rmac_mrgc_rfcfe	Receive frame check-fail en.

Definition at line 482 of file ra8_rmac_regs.h.

ra8_rmac_mtffc_bit_t

enum ra8_rmac_mtffc_bit_t : uint32_t

MTFFC TX-frame-format bits (HUM Ch 33.4).

Enumerator
k_ra8_rmac_mtffc_dpad	Disable padding.
k_ra8_rmac_mtffc_fcm	Frame-check mode (mCRC vs CRC).

Definition at line 473 of file ra8_rmac_regs.h.

ra8_rmac_mxgmiic_bit_t

enum ra8_rmac_mxgmiic_bit_t : uint32_t

MXGMIIC 10G-XGMII bits.

Enumerator
k_ra8_rmac_mxgmiic_lfs_txrfs	TX remote-fault sig.
k_ra8_rmac_mxgmiic_lfs_txidle	TX local-fault idle.

Definition at line 528 of file ra8_rmac_regs.h.

ra8_rmac_offset_t

enum ra8_rmac_offset_t : uint16_t

RMAC per-port register offsets (HUM Ch 33.3 Table 33.4).

Provided as an enum so test code and trace tools can resolve any register name to its offset without grepping the struct.

Enumerator
k_ra8_rmac_off_mpsm	PHY Station Management.
k_ra8_rmac_off_mpic	PHY Interfaces Cfg.
k_ra8_rmac_off_mpim	PHY Interfaces Monitoring.
k_ra8_rmac_off_mioc	I/O Configuration.
k_ra8_rmac_off_mtffc	TX Frame Format Cfg.
k_ra8_rmac_off_mtpfc	TX Pause/PFC Frame Cfg.
k_ra8_rmac_off_mtpfc2	TX Pause/PFC Cfg 2.
k_ra8_rmac_off_mtpfc30	TX PFC Cfg 3 group 0.
k_ra8_rmac_off_mtpfc31	TX PFC Cfg 3 group 1.
k_ra8_rmac_off_mtatc0	TX Auto Timestamp 0.
k_ra8_rmac_off_mtatc1	TX Auto Timestamp 1.
k_ra8_rmac_off_mtim	TX Interfaces Monitoring.
k_ra8_rmac_off_mrgc	RX General Configuration.
k_ra8_rmac_off_mrmac0	RX MAC Address Cfg 0.
k_ra8_rmac_off_mrmac1	RX MAC Address Cfg 1.
k_ra8_rmac_off_mrafc	RX Address Filter Cfg.
k_ra8_rmac_off_mrsce	RX Storm Cfg E-frames.
k_ra8_rmac_off_mrscp	RX Storm Cfg P-frames.
k_ra8_rmac_off_mrscc	RX Storm Counter Cfg.
k_ra8_rmac_off_mrfsce	RX Frame Size Cfg E.
k_ra8_rmac_off_mrfscp	RX Frame Size Cfg P.
k_ra8_rmac_off_mtrc	Timestamp RX Cfg.
k_ra8_rmac_off_mrpfm	RX Pause/PFC Monitoring.
k_ra8_rmac_off_mpfc0	PTP Filter Cfg 0..15.
k_ra8_rmac_off_mlvc	Link Verification Cfg.
k_ra8_rmac_off_meeec	Energy Efficient Ethernet.
k_ra8_rmac_off_mlbc	Loopback Configuration.
k_ra8_rmac_off_mxgmiic	XGMII Configuration.
k_ra8_rmac_off_mpch	XGMII PCH Configuration.
k_ra8_rmac_off_manm	Auto-Negotiation Message.
k_ra8_rmac_off_meis	Error IRQ Status.
k_ra8_rmac_off_meie	Error IRQ Enable.
k_ra8_rmac_off_meid	Error IRQ Disable.
k_ra8_rmac_off_mmis0	Monitor IRQ Status 0.
k_ra8_rmac_off_mmie0	Monitor IRQ Enable 0.
k_ra8_rmac_off_mmid0	Monitor IRQ Disable 0.
k_ra8_rmac_off_mmis1	Monitor IRQ Status 1.
k_ra8_rmac_off_mmie1	Monitor IRQ Enable 1.
k_ra8_rmac_off_mmid1	Monitor IRQ Disable 1.
k_ra8_rmac_off_mmis2	Monitor IRQ Status 2.
k_ra8_rmac_off_mmie2	Monitor IRQ Enable 2.
k_ra8_rmac_off_mmid2	Monitor IRQ Disable 2.
k_ra8_rmac_off_mmpftct	Manual pause TX cnt.
k_ra8_rmac_off_mapftct	Auto pause TX cnt.
k_ra8_rmac_off_mpfrct	Pause RX cnt.
k_ra8_rmac_off_mfcict	False carrier indication.
k_ra8_rmac_off_meeect	EEE counter.
k_ra8_rmac_off_mmpcftct0	Manual PFC TX cnt 0.
k_ra8_rmac_off_mmpcftct1	Manual PFC TX cnt 1.
k_ra8_rmac_off_mapcftct0	Auto PFC TX cnt 0.
k_ra8_rmac_off_mapcftct1	Auto PFC TX cnt 1.
k_ra8_rmac_off_mpcfrct0	PFC RX cnt 0..7.
k_ra8_rmac_off_mrovfc	RX overflow cnt.
k_ra8_rmac_off_mrhcrcec	RX header CRC err cnt.
k_ra8_rmac_off_mrgfce	RX good E-frame cnt.
k_ra8_rmac_off_mrgfcp	RX good P-frame cnt.
k_ra8_rmac_off_mtgfce	TX good E-frame cnt.
k_ra8_rmac_off_mtgfcp	TX good P-frame cnt.

Definition at line 161 of file ra8_rmac_regs.h.

ra8_rmac_pause_mode_t

enum ra8_rmac_pause_mode_t : uint8_t

Selects PFM bit in MTPFC2 – pause vs PFC frame.

Enumerator
k_ra8_rmac_pause_mode_802_3x	Classic IEEE 802.3x pause.
k_ra8_rmac_pause_mode_pfc	IEEE 802.1Qbb PFC frame.

Definition at line 354 of file ra8_rmac_regs.h.

ra8_rmac_pfc_group_t

enum ra8_rmac_pfc_group_t : uint8_t

PFC priority group index (MTPFC3t, t = 0..1).

Enumerator
k_ra8_rmac_pfc_group_0	Priority group 0.
k_ra8_rmac_pfc_group_1	Priority group 1.
k_ra8_rmac_pfc_group_count	RA8 rmac pfc group count.

Definition at line 363 of file ra8_rmac_regs.h.

ra8_rmac_pfc_rx_idx_t

enum ra8_rmac_pfc_rx_idx_t : uint8_t

PFC RX counter index (MPCFRCTt, t = 0..7).

Enumerator
k_ra8_rmac_pfc_rx_count	8 PFC priority RX counters.

Definition at line 381 of file ra8_rmac_regs.h.

ra8_rmac_pis_t

enum ra8_rmac_pis_t : uint8_t

Physical interface selector for MPIC.PIS[2:0].

HUM Ch 33.4.1.2 "MPIC : PHY Interfaces Configuration Register" p 1707: MPIC.PIS[2:0] has only TWO defined encodings – 000b = MII and 010b = GMII. All other values are Reserved.

MPIC.PIS describes the internal xMII interface between the RMAC and the ESWM media mux. For an external RGMII link the ESWM (MIICRn.MIISEL = 01b, HUM Table 29.11) converts RGMII <-> internal GMII/MII, so the RMAC still sees MII or GMII. Per Table 29.11 the RMAC.MPIC.PIS value is purely a function of link speed:

• 10 / 100 Mbps -> MII (000b)
• 1 Gbps -> GMII (010b) regardless of whether the external PHY interface is MII or RGMII.

Enumerator
k_ra8_rmac_pis_mii	MII (000b) – internal xMII for 10/100 Mbps.
k_ra8_rmac_pis_gmii	GMII (010b) – internal xMII for 1 Gbps.

Definition at line 304 of file ra8_rmac_regs.h.

ra8_rmac_port_t

enum ra8_rmac_port_t : uint8_t

RMAC port index (m = 0, 1).

Used as the first argument to every ra8_rmac_* call. Maps directly to the per-port base addresses defined in ra8_ether_regs.h.

Enumerator
k_ra8_rmac_port_0	RMAC port 0 (base 0x403C_B000).
k_ra8_rmac_port_1	RMAC port 1 (base 0x403C_D000).
k_ra8_rmac_port_count	Number of RMAC ports.

Definition at line 66 of file ra8_rmac_regs.h.

ra8_rmac_ptp_filter_idx_t

enum ra8_rmac_ptp_filter_idx_t : uint8_t

PTP filter table index for MPFCt (t = 0..15).

Enumerator
k_ra8_rmac_ptp_filter_count	16 filter entries total.

Definition at line 373 of file ra8_rmac_regs.h.

ra8_rmac_rsv_words_t

enum ra8_rmac_rsv_words_t : uint8_t

Reserved-word array sizes (in 32-bit words) used inside the RMAC per-port register block.

Names each reserved gap so the struct definition does not depend on raw integer literals. Cross-checked against HUM Table 33.4.

Enumerator
k_ra8_rmac_rsv_words_mtim_to_mrgc	+0x0064..0x007C gap.
k_ra8_rmac_rsv_words_mrpfm_to_mpfc	+0x00B0..0x00FC gap.
k_ra8_rmac_rsv_words_manm_to_meis	+0x01A0..0x01FC gap.
k_ra8_rmac_rsv_words_mmid2_to_mmpftct	+0x023C..0x02FC gap.
k_ra8_rmac_rsv_words_mrhcrcec_to_mrgfce	+0x0368..0x0404 gap.
k_ra8_rmac_rsv_words_mrxbcpl_to_mtgfce	+0x045C..0x0504 gap.

Definition at line 542 of file ra8_rmac_regs.h.

ra8_rmac_shift_t

enum ra8_rmac_shift_t : uint8_t

Bit shifts used across the RMAC register surface.

Enumerator
k_ra8_rmac_shift_byte0	First byte position.
k_ra8_rmac_shift_byte1	Second byte position.
k_ra8_rmac_shift_byte2	Third byte position.
k_ra8_rmac_shift_byte3	Fourth byte position.
k_ra8_rmac_shift_high16	MRMAC0.MAU low half.
k_ra8_rmac_shift_high24	MRMAC0.MAU high half.
k_ra8_rmac_shift_mpsm_pda	MPSM.PDA[7:3].
k_ra8_rmac_shift_mpsm_pra	MPSM.PRA[12:8].
k_ra8_rmac_shift_mpsm_pop	MPSM.POP[14:13].
k_ra8_rmac_shift_mpsm_prd	MPSM.PRD[31:16].
k_ra8_rmac_shift_mpic_lsc	MPIC.LSC[5:3].
k_ra8_rmac_shift_mpic_pis	MPIC.PIS[2:0].
k_ra8_rmac_shift_mpic_psmcs	MPIC.PSMCS[22:16].
k_ra8_rmac_shift_mtpfc_pt	MTPFC.PT[15:0].
k_ra8_rmac_shift_mtpfc_pfrt	MTPFC.PFRT[23:16].
k_ra8_rmac_shift_mrfsce_max	MRFSCE.EMXS[15:0].
k_ra8_rmac_shift_mrfsce_min	MRFSCE.EMNS[31:16].
k_ra8_rmac_shift_mrgc_pfcrc	MRGC.PFCRC[23:16].
k_ra8_rmac_shift_mpfc_val	MPFCt.PFBV[15:8].
k_ra8_rmac_shift_mrafc_perfect	MRAFC perfect-match filter half (MCENP etc.).

Definition at line 102 of file ra8_rmac_regs.h.

ra8_rmac_size_t

enum ra8_rmac_size_t : uint16_t

RMAC register window total size (FSP R_RMAC0_Type).

Enumerator
k_ra8_rmac_window_bytes	Total MMIO window (FSP size).

Definition at line 555 of file ra8_rmac_regs.h.

Function Documentation

ra8_rmac()

volatile r_rmac_regs_t * ra8_rmac ( ra8_rmac_port_t port )

inlinestatic

Compile-time check that the RMAC register window matches FSP.

FSP's R_RMAC0_Type is documented at "Size = 1328 (0x530)". If a future register addition perturbs the layout, this assertion fires before any test runs.

Compile-time offset insurance against silent layout drift.

Each named register's offset is asserted against the matching k_ra8_rmac_off_* constant (which is the source of truth from HUM Ch 33.3 Table 33.4). If a future edit perturbs a reserved gap or field width, the build fails before any silent frame corruption can hit the wire.

Get pointer to a per-port RMAC register block.

Parameters

[in]

port

Port identifier (k_ra8_rmac_port_0 or k_ra8_rmac_port_1).

Returns

Pointer to the requested RMAC register window. Out-of-range port values fall back to port 0 so the caller still sees deterministic behaviour rather than a null-pointer dereference.

Precondition

Power to the Ethernet subsystem is on (k_ra8_mstp_eswm enabled).

port is one of ra8_rmac_port_t.

Postcondition

Returned pointer is non-null and aligned to 4 bytes.

Note

Not thread-safe; per-port serialisation is the caller's job.

Since

0.1.0

Definition at line 779 of file ra8_rmac_regs.h.

References k_ra8_rmac0_base_addr, k_ra8_rmac1_base_addr, and k_ra8_rmac_port_1.

Referenced by ra8_rmac_clear_status(), ra8_rmac_deinit(), ra8_rmac_dispatch(), ra8_rmac_enter_stop(), ra8_rmac_exit_stop(), ra8_rmac_get_status(), ra8_rmac_init(), ra8_rmac_mdio_c22_read(), ra8_rmac_mdio_c22_write(), ra8_rmac_mdio_c45_read(), ra8_rmac_mdio_c45_write(), ra8_rmac_read_stats(), ra8_rmac_set_frame_size(), ra8_rmac_set_link(), ra8_rmac_set_loopback(), ra8_rmac_set_lpi(), ra8_rmac_set_mac_address(), ra8_rmac_set_magic_packet(), ra8_rmac_set_pause_frame(), ra8_rmac_set_pfc_group(), ra8_rmac_set_ptp_filter(), ra8_rmac_set_rx_filter(), and ra8_rmac_set_vlan_framing().