ra8_rmac_regs.h

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#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stddef.h>
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_ether_regs.h"

typedef enum : uint8_t {
  k_ra8_rmac_port_0     = 0U, 
  k_ra8_rmac_port_1     = 1U, 
  k_ra8_rmac_port_count = 2U, 
} ra8_rmac_port_t;

typedef enum : uint8_t {
  k_ra8_rmac_mac_byte_count = 6U, 
} ra8_rmac_mac_len_t;

typedef enum : uint8_t {
  k_ra8_rmac_mac_byte_0 = 0U, 
  k_ra8_rmac_mac_byte_1 = 1U, 
  k_ra8_rmac_mac_byte_2 = 2U, 
  k_ra8_rmac_mac_byte_3 = 3U, 
  k_ra8_rmac_mac_byte_4 = 4U, 
  k_ra8_rmac_mac_byte_5 = 5U, 
} ra8_rmac_mac_byte_idx_t;

typedef enum : uint8_t {
  k_ra8_rmac_shift_byte0         = 0U,  
  k_ra8_rmac_shift_byte1         = 8U,  
  k_ra8_rmac_shift_byte2         = 16U, 
  k_ra8_rmac_shift_byte3         = 24U, 
  k_ra8_rmac_shift_high16        = 0U,  
  k_ra8_rmac_shift_high24        = 8U,  
  k_ra8_rmac_shift_mpsm_pda      = 3U,  
  k_ra8_rmac_shift_mpsm_pra      = 8U,  
  k_ra8_rmac_shift_mpsm_pop      = 13U, 
  k_ra8_rmac_shift_mpsm_prd      = 16U, 
  k_ra8_rmac_shift_mpic_lsc      = 3U,  
  k_ra8_rmac_shift_mpic_pis      = 0U,  
  k_ra8_rmac_shift_mpic_psmcs    = 16U, 
  k_ra8_rmac_shift_mtpfc_pt      = 0U,  
  k_ra8_rmac_shift_mtpfc_pfrt    = 16U, 
  k_ra8_rmac_shift_mrfsce_max    = 0U,  
  k_ra8_rmac_shift_mrfsce_min    = 16U, 
  k_ra8_rmac_shift_mrgc_pfcrc    = 16U, 
  k_ra8_rmac_shift_mpfc_val      = 8U,  
  k_ra8_rmac_shift_mrafc_perfect = 16U, 
} ra8_rmac_shift_t;

typedef enum : uint32_t {
  k_ra8_rmac_mask_byte         = 0x000000FFUL, 
  k_ra8_rmac_mask_mrmac0_mau   = 0x0000FFFFUL, 
  k_ra8_rmac_mask_mpsm_phy_reg = 0x0000001FUL, 
  k_ra8_rmac_mask_mpsm_op      = 0x00000003UL, 
  k_ra8_rmac_mask_mpsm_data    = 0x0000FFFFUL, 
  k_ra8_rmac_mask_mpic_pis     = 0x00000007UL, 
  k_ra8_rmac_mask_mpic_lsc     = 0x00000007UL, 
  k_ra8_rmac_mask_mpic_psmcs   = 0x0000007FUL, 
  k_ra8_rmac_mask_mtpfc_pt     = 0x0000FFFFUL, 
  k_ra8_rmac_mask_mtpfc_pfrt   = 0x000000FFUL, 
  k_ra8_rmac_mask_mrfsc        = 0x0000FFFFUL, 
  k_ra8_rmac_mask_mrgc_pfcrc   = 0x000000FFUL, 
  k_ra8_rmac_mask_mpfc_val     = 0x000000FFUL, 
  k_ra8_rmac_mask_pfc_priority = 0x000000FFUL, 
  k_ra8_rmac_mask_meis_all     = 0x3FFF3FFFUL, 
  k_ra8_rmac_mask_mmis0_all    = 0x00001FFFUL, 
  k_ra8_rmac_mask_mmis1_all    = 0x0000000FUL, 
  k_ra8_rmac_mask_mmis2_all    = 0x00000007UL, 
  k_ra8_rmac_mask_meis_rx      = 0x00000001UL, 
  k_ra8_rmac_mask_all          = 0xFFFFFFFFUL, 
} ra8_rmac_mask_t;

typedef enum : uint16_t {
  k_ra8_rmac_off_mpsm      = 0x0000U, 
  k_ra8_rmac_off_mpic      = 0x0004U, 
  k_ra8_rmac_off_mpim      = 0x0008U, 
  k_ra8_rmac_off_mioc      = 0x0010U, 
  k_ra8_rmac_off_mtffc     = 0x0020U, 
  k_ra8_rmac_off_mtpfc     = 0x0024U, 
  k_ra8_rmac_off_mtpfc2    = 0x0028U, 
  k_ra8_rmac_off_mtpfc30   = 0x0030U, 
  k_ra8_rmac_off_mtpfc31   = 0x0034U, 
  k_ra8_rmac_off_mtatc0    = 0x0050U, 
  k_ra8_rmac_off_mtatc1    = 0x0054U, 
  k_ra8_rmac_off_mtim      = 0x0060U, 
  k_ra8_rmac_off_mrgc      = 0x0080U, 
  k_ra8_rmac_off_mrmac0    = 0x0084U, 
  k_ra8_rmac_off_mrmac1    = 0x0088U, 
  k_ra8_rmac_off_mrafc     = 0x008CU, 
  k_ra8_rmac_off_mrsce     = 0x0090U, 
  k_ra8_rmac_off_mrscp     = 0x0094U, 
  k_ra8_rmac_off_mrscc     = 0x0098U, 
  k_ra8_rmac_off_mrfsce    = 0x009CU, 
  k_ra8_rmac_off_mrfscp    = 0x00A0U, 
  k_ra8_rmac_off_mtrc      = 0x00A4U, 
  k_ra8_rmac_off_mrpfm     = 0x00ACU, 
  k_ra8_rmac_off_mpfc0     = 0x0100U, 
  k_ra8_rmac_off_mlvc      = 0x0180U, 
  k_ra8_rmac_off_meeec     = 0x0184U, 
  k_ra8_rmac_off_mlbc      = 0x0188U, 
  k_ra8_rmac_off_mxgmiic   = 0x0190U, 
  k_ra8_rmac_off_mpch      = 0x0194U, 
  k_ra8_rmac_off_manm      = 0x019CU, 
  k_ra8_rmac_off_meis      = 0x0200U, 
  k_ra8_rmac_off_meie      = 0x0204U, 
  k_ra8_rmac_off_meid      = 0x0208U, 
  k_ra8_rmac_off_mmis0     = 0x0210U, 
  k_ra8_rmac_off_mmie0     = 0x0214U, 
  k_ra8_rmac_off_mmid0     = 0x0218U, 
  k_ra8_rmac_off_mmis1     = 0x0220U, 
  k_ra8_rmac_off_mmie1     = 0x0224U, 
  k_ra8_rmac_off_mmid1     = 0x0228U, 
  k_ra8_rmac_off_mmis2     = 0x0230U, 
  k_ra8_rmac_off_mmie2     = 0x0234U, 
  k_ra8_rmac_off_mmid2     = 0x0238U, 
  k_ra8_rmac_off_mmpftct   = 0x0300U, 
  k_ra8_rmac_off_mapftct   = 0x0304U, 
  k_ra8_rmac_off_mpfrct    = 0x0308U, 
  k_ra8_rmac_off_mfcict    = 0x030CU, 
  k_ra8_rmac_off_meeect    = 0x0310U, 
  k_ra8_rmac_off_mmpcftct0 = 0x0320U, 
  k_ra8_rmac_off_mmpcftct1 = 0x0324U, 
  k_ra8_rmac_off_mapcftct0 = 0x0330U, 
  k_ra8_rmac_off_mapcftct1 = 0x0334U, 
  k_ra8_rmac_off_mpcfrct0  = 0x0340U, 
  k_ra8_rmac_off_mrovfc    = 0x0360U, 
  k_ra8_rmac_off_mrhcrcec  = 0x0364U, 
  k_ra8_rmac_off_mrgfce    = 0x0408U, 
  k_ra8_rmac_off_mrgfcp    = 0x040CU, 
  k_ra8_rmac_off_mtgfce    = 0x0508U, 
  k_ra8_rmac_off_mtgfcp    = 0x050CU, 
} ra8_rmac_offset_t;

typedef enum : uint32_t {
  /* Low-half (hash / class enable) raw bits -- bits [10:0]. */
  k_ra8_rmac_mrafc_hash_unicast      = 0x00000001UL, 
  k_ra8_rmac_mrafc_hash_multicast    = 0x00000002UL, 
  k_ra8_rmac_mrafc_hash_broadcast    = 0x00000004UL, 
  k_ra8_rmac_mrafc_mst_storm         = 0x00000008UL, 
  k_ra8_rmac_mrafc_bst_storm         = 0x00000010UL, 
  k_ra8_rmac_mrafc_mc_accept         = 0x00000020UL, 
  k_ra8_rmac_mrafc_bc_accept         = 0x00000040UL, 
  k_ra8_rmac_mrafc_no_destmac_reject = 0x00000080UL, 
  k_ra8_rmac_mrafc_short_frame       = 0x00000100UL, 
  k_ra8_rmac_mrafc_no_srcmac_reject  = 0x00000200UL, 
  k_ra8_rmac_mrafc_multicast_src     = 0x00000400UL, 
  /* High-half (perfect-match enable) raw bits -- bits [26:16]. */
  k_ra8_rmac_mrafc_perfect_unicast   = 0x00010000UL, 
  k_ra8_rmac_mrafc_perfect_multicast = 0x00020000UL, 
  k_ra8_rmac_mrafc_perfect_broadcast = 0x00040000UL, 
  /*
   * FSP-canonical paired class enables. These are what drivers /
   * board-init code should normally set in ``ra8_rmac_config_t::rx_filter``.
   * Each constant ORs the low-half (hash) bit with its high-half
   * (perfect-match) twin so the MAC's two-stage filter actually accepts
   * the frame class on silicon. Reference: FSP r_rmac.c
   * rmac_configure_reception_filter.
   */
  k_ra8_rmac_mrafc_unicast_match =
    (k_ra8_rmac_mrafc_hash_unicast | k_ra8_rmac_mrafc_perfect_unicast), 
  k_ra8_rmac_mrafc_multicast_hash =
    (k_ra8_rmac_mrafc_hash_multicast | k_ra8_rmac_mrafc_perfect_multicast), 
  k_ra8_rmac_mrafc_broadcast =
    (k_ra8_rmac_mrafc_hash_broadcast | k_ra8_rmac_mrafc_perfect_broadcast), 
  k_ra8_rmac_mrafc_promiscuous =
    (k_ra8_rmac_mrafc_unicast_match | k_ra8_rmac_mrafc_multicast_hash | k_ra8_rmac_mrafc_broadcast |
     k_ra8_rmac_mrafc_mc_accept | k_ra8_rmac_mrafc_bc_accept), 
} ra8_rmac_mrafc_t;

typedef enum : uint8_t {
  k_ra8_rmac_pis_mii  = 0U, 
  k_ra8_rmac_pis_gmii = 2U, 
} ra8_rmac_pis_t;

typedef enum : uint8_t {
  k_ra8_rmac_lsc_10mbit   = 0U, 
  k_ra8_rmac_lsc_100mbit  = 1U, 
  k_ra8_rmac_lsc_1000mbit = 2U, 
  k_ra8_rmac_lsc_2500mbit = 3U, 
  k_ra8_rmac_lsc_10gbit   = 4U, 
  k_ra8_rmac_lsc_count    = 5U, 
} ra8_rmac_lsc_t;

typedef enum : uint8_t {
  k_ra8_rmac_duplex_half = 0U, 
  k_ra8_rmac_duplex_full = 1U, 
} ra8_rmac_duplex_t;

typedef enum : uint8_t {
  k_ra8_rmac_mdio_op_c22_write    = 1U, 
  k_ra8_rmac_mdio_op_c22_read     = 2U, 
  k_ra8_rmac_mdio_op_c45_address  = 0U, 
  k_ra8_rmac_mdio_op_c45_write    = 1U, 
  k_ra8_rmac_mdio_op_c45_read_inc = 2U, 
  k_ra8_rmac_mdio_op_c45_read     = 3U, 
} ra8_rmac_mdio_op_t;

typedef enum : uint8_t {
  k_ra8_rmac_pause_mode_802_3x = 0U, 
  k_ra8_rmac_pause_mode_pfc    = 1U, 
} ra8_rmac_pause_mode_t;

typedef enum : uint8_t {
  k_ra8_rmac_pfc_group_0     = 0U, 
  k_ra8_rmac_pfc_group_1     = 1U, 
  k_ra8_rmac_pfc_group_count = 2U, 
} ra8_rmac_pfc_group_t;

typedef enum : uint8_t {
  k_ra8_rmac_ptp_filter_count = 16U, 
} ra8_rmac_ptp_filter_idx_t;

typedef enum : uint8_t {
  k_ra8_rmac_pfc_rx_count = 8U, 
} ra8_rmac_pfc_rx_idx_t;

typedef enum : uint32_t {
  k_ra8_rmac_meis_tsls   = (1UL << 0),  
  k_ra8_rmac_meis_ties   = (1UL << 1),  
  k_ra8_rmac_meis_pres   = (1UL << 2),  
  k_ra8_rmac_meis_pfrros = (1UL << 3),  
  k_ra8_rmac_meis_fcds   = (1UL << 4),  
  k_ra8_rmac_meis_tces   = (1UL << 5),  
  k_ra8_rmac_meis_tbcis  = (1UL << 6),  
  k_ra8_rmac_meis_bfes   = (1UL << 7),  
  k_ra8_rmac_meis_fces   = (1UL << 8),  
  k_ra8_rmac_meis_reoes  = (1UL << 9),  
  k_ra8_rmac_meis_rpoes  = (1UL << 10), 
  k_ra8_rmac_meis_rpcres = (1UL << 11), 
  k_ra8_rmac_meis_ctles0 = (1UL << 12), 
  k_ra8_rmac_meis_ctles1 = (1UL << 13), 
  k_ra8_rmac_meis_pdes   = (1UL << 20), 
  k_ra8_rmac_meis_pnaes  = (1UL << 21), 
  k_ra8_rmac_meis_fcmces = (1UL << 22), 
  k_ra8_rmac_meis_ffmes  = (1UL << 23), 
  k_ra8_rmac_meis_cfces  = (1UL << 24), 
  k_ra8_rmac_meis_frces  = (1UL << 25), 
  k_ra8_rmac_meis_rpooms = (1UL << 26), 
  k_ra8_rmac_meis_ffs    = (1UL << 27), 
  k_ra8_rmac_meis_fues   = (1UL << 28), 
  k_ra8_rmac_meis_foes   = (1UL << 29), 
} ra8_rmac_meis_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mmis0_plscs  = (1UL << 0),  
  k_ra8_rmac_mmis0_pids   = (1UL << 1),  
  k_ra8_rmac_mmis0_lvss   = (1UL << 2),  
  k_ra8_rmac_mmis0_lvfs   = (1UL << 3),  
  k_ra8_rmac_mmis0_vfrs   = (1UL << 4),  
  k_ra8_rmac_mmis0_andets = (1UL << 6),  
  k_ra8_rmac_mmis0_xlfds  = (1UL << 8),  
  k_ra8_rmac_mmis0_xlfes  = (1UL << 9),  
  k_ra8_rmac_mmis0_xlfsds = (1UL << 10), 
  k_ra8_rmac_mmis0_xrfsds = (1UL << 11), 
  k_ra8_rmac_mmis0_xlisds = (1UL << 12), 
} ra8_rmac_mmis0_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mmis1_pracs  = (1UL << 0), 
  k_ra8_rmac_mmis1_pwacs  = (1UL << 1), 
  k_ra8_rmac_mmis1_paacs  = (1UL << 2), 
  k_ra8_rmac_mmis1_ppracs = (1UL << 3), 
} ra8_rmac_mmis1_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mpsm_psme = (1UL << 0), 
} ra8_rmac_mpsm_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mmis2_mpdis  = (1UL << 0), 
  k_ra8_rmac_mmis2_lpiais = (1UL << 1), 
  k_ra8_rmac_mmis2_lpidis = (1UL << 2), 
} ra8_rmac_mmis2_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mtffc_dpad = (1UL << 0), 
  k_ra8_rmac_mtffc_fcm  = (1UL << 1), 
} ra8_rmac_mtffc_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mrgc_rcpt  = (1UL << 0), 
  k_ra8_rmac_mrgc_pfrc  = (1UL << 1), 
  k_ra8_rmac_mrgc_pfrtz = (1UL << 2), 
  k_ra8_rmac_mrgc_mpde  = (1UL << 3), 
  k_ra8_rmac_mrgc_rfcfe = (1UL << 4), 
} ra8_rmac_mrgc_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mlbc_lbme = (1UL << 0), 
} ra8_rmac_mlbc_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_meeec_lpitr = (1UL << 0), 
} ra8_rmac_meeec_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mpim_pls  = (1UL << 0), 
  k_ra8_rmac_mpim_lpia = (1UL << 1), 
} ra8_rmac_mpim_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mlvc_pase = (1UL << 8),  
  k_ra8_rmac_mlvc_plv  = (1UL << 16), 
} ra8_rmac_mlvc_bit_t;

typedef enum : uint32_t {
  k_ra8_rmac_mxgmiic_lfs_txrfs  = (1UL << 0), 
  k_ra8_rmac_mxgmiic_lfs_txidle = (1UL << 1), 
} ra8_rmac_mxgmiic_bit_t;

typedef enum : uint8_t {
  k_ra8_rmac_rsv_words_mtim_to_mrgc       = 7U,  
  k_ra8_rmac_rsv_words_mrpfm_to_mpfc      = 20U, 
  k_ra8_rmac_rsv_words_manm_to_meis       = 24U, 
  k_ra8_rmac_rsv_words_mmid2_to_mmpftct   = 49U, 
  k_ra8_rmac_rsv_words_mrhcrcec_to_mrgfce = 40U, 
  k_ra8_rmac_rsv_words_mrxbcpl_to_mtgfce  = 43U, 
} ra8_rmac_rsv_words_t;

typedef enum : uint16_t {
  k_ra8_rmac_window_bytes = 0x530U, 
} ra8_rmac_size_t;

typedef struct {
  volatile uint32_t MPSM;                               
  volatile uint32_t MPIC;                               
  volatile uint32_t MPIM;                               
  volatile uint32_t reserved0c;                         
  volatile uint32_t MIOC;                               
  volatile uint32_t reserved14[3];                      
  volatile uint32_t MTFFC;                              
  volatile uint32_t MTPFC;                              
  volatile uint32_t MTPFC2;                             
  volatile uint32_t reserved2c;                         
  volatile uint32_t MTPFC3[k_ra8_rmac_pfc_group_count]; 
  volatile uint32_t reserved38[6];                      
  volatile uint32_t MTATC[2];                           
  volatile uint32_t reserved58[2];                      
  volatile uint32_t MTIM;                               
  volatile uint32_t
    reserved64[k_ra8_rmac_rsv_words_mtim_to_mrgc]; 
  volatile uint32_t MRGC;                          
  volatile uint32_t MRMAC0;                        
  volatile uint32_t MRMAC1;                        
  volatile uint32_t MRAFC;                         
  volatile uint32_t MRSCE;                         
  volatile uint32_t MRSCP;                         
  volatile uint32_t MRSCC;                         
  volatile uint32_t MRFSCE;                        
  volatile uint32_t MRFSCP;                        
  volatile uint32_t MTRC;                          
  volatile uint32_t reserveda8;                    
  volatile uint32_t MRPFM;                         
  volatile uint32_t
    reservedb0[k_ra8_rmac_rsv_words_mrpfm_to_mpfc];    
  volatile uint32_t MPFC[k_ra8_rmac_ptp_filter_count]; 
  volatile uint32_t reserved140[16];                   
  volatile uint32_t MLVC;                              
  volatile uint32_t MEEEC;                             
  volatile uint32_t MLBC;                              
  volatile uint32_t reserved18c;                       
  volatile uint32_t MXGMIIC;                           
  volatile uint32_t MPCH;                              
  volatile uint32_t reserved198;                       
  volatile uint32_t MANM;                              
  volatile uint32_t
    reserved1a0[k_ra8_rmac_rsv_words_manm_to_meis]; 
  volatile uint32_t MEIS;                           
  volatile uint32_t MEIE;                           
  volatile uint32_t MEID;                           
  volatile uint32_t reserved20c;                    
  volatile uint32_t MMIS0;                          
  volatile uint32_t MMIE0;                          
  volatile uint32_t MMID0;                          
  volatile uint32_t reserved21c;                    
  volatile uint32_t MMIS1;                          
  volatile uint32_t MMIE1;                          
  volatile uint32_t MMID1;                          
  volatile uint32_t reserved22c;                    
  volatile uint32_t MMIS2;                          
  volatile uint32_t MMIE2;                          
  volatile uint32_t MMID2;                          
  volatile uint32_t
    reserved23c[k_ra8_rmac_rsv_words_mmid2_to_mmpftct];   
  volatile uint32_t MMPFTCT;                              
  volatile uint32_t MAPFTCT;                              
  volatile uint32_t MPFRCT;                               
  volatile uint32_t MFCICT;                               
  volatile uint32_t MEEECT;                               
  volatile uint32_t reserved314[3];                       
  volatile uint32_t MMPCFTCT[k_ra8_rmac_pfc_group_count]; 
  volatile uint32_t reserved328[2];                       
  volatile uint32_t MAPCFTCT[k_ra8_rmac_pfc_group_count]; 
  volatile uint32_t reserved338[2];                       
  volatile uint32_t MPCFRCT[k_ra8_rmac_pfc_rx_count];     
  volatile uint32_t MROVFC;                               
  volatile uint32_t MRHCRCEC;                             
  volatile uint32_t
    reserved368[k_ra8_rmac_rsv_words_mrhcrcec_to_mrgfce]; 
  volatile uint32_t MRGFCE;                               
  volatile uint32_t MRGFCP;                               
  volatile uint32_t MRBFC;                                
  volatile uint32_t MRMFC;                                
  volatile uint32_t MRUFC;                                
  volatile uint32_t MRPEFC;                               
  volatile uint32_t MRNEFC;                               
  volatile uint32_t MRFMEFC;                              
  volatile uint32_t MRFFMEFC;                             
  volatile uint32_t MRCFCEFC;                             
  volatile uint32_t MRFCEFC;                              
  volatile uint32_t MRRCFEFC;                             
  volatile uint32_t MRFC;                                 
  volatile uint32_t MRGUEFC;                              
  volatile uint32_t MRBUEFC;                              
  volatile uint32_t MRGOEFC;                              
  volatile uint32_t MRBOEFC;                              
  volatile uint32_t MRXBCEU;                              
  volatile uint32_t MRXBCEL;                              
  volatile uint32_t MRXBCPU;                              
  volatile uint32_t MRXBCPL;                              
  volatile uint32_t
    reserved45c[k_ra8_rmac_rsv_words_mrxbcpl_to_mtgfce]; 
  volatile uint32_t MTGFCE;                              
  volatile uint32_t MTGFCP;                              
  volatile uint32_t MTBFC;                               
  volatile uint32_t MTMFC;                               
  volatile uint32_t MTUFC;                               
  volatile uint32_t MTEFC;                               
  volatile uint32_t MTXBCEU;                             
  volatile uint32_t MTXBCEL;                             
  volatile uint32_t MTXBCPU;                             
  volatile uint32_t MTXBCPL;                             
} r_rmac_regs_t;

static_assert(sizeof(r_rmac_regs_t) == (size_t)k_ra8_rmac_window_bytes,
              "r_rmac_regs_t must match FSP R_RMAC0_Type size 0x530");

static_assert(offsetof(r_rmac_regs_t, MPSM) == (size_t)k_ra8_rmac_off_mpsm, "MPSM offset");
static_assert(offsetof(r_rmac_regs_t, MPIC) == (size_t)k_ra8_rmac_off_mpic, "MPIC offset");
static_assert(offsetof(r_rmac_regs_t, MPIM) == (size_t)k_ra8_rmac_off_mpim, "MPIM offset");
static_assert(offsetof(r_rmac_regs_t, MIOC) == (size_t)k_ra8_rmac_off_mioc, "MIOC offset");
static_assert(offsetof(r_rmac_regs_t, MTFFC) == (size_t)k_ra8_rmac_off_mtffc, "MTFFC offset");
static_assert(offsetof(r_rmac_regs_t, MTPFC) == (size_t)k_ra8_rmac_off_mtpfc, "MTPFC offset");
static_assert(offsetof(r_rmac_regs_t, MTPFC2) == (size_t)k_ra8_rmac_off_mtpfc2, "MTPFC2 offset");
static_assert(offsetof(r_rmac_regs_t, MTPFC3) == (size_t)k_ra8_rmac_off_mtpfc30, "MTPFC3 offset");
static_assert(offsetof(r_rmac_regs_t, MTATC) == (size_t)k_ra8_rmac_off_mtatc0, "MTATC offset");
static_assert(offsetof(r_rmac_regs_t, MTIM) == (size_t)k_ra8_rmac_off_mtim, "MTIM offset");
static_assert(offsetof(r_rmac_regs_t, MRGC) == (size_t)k_ra8_rmac_off_mrgc, "MRGC offset");
static_assert(offsetof(r_rmac_regs_t, MRMAC0) == (size_t)k_ra8_rmac_off_mrmac0, "MRMAC0 offset");
static_assert(offsetof(r_rmac_regs_t, MRMAC1) == (size_t)k_ra8_rmac_off_mrmac1, "MRMAC1 offset");
static_assert(offsetof(r_rmac_regs_t, MRAFC) == (size_t)k_ra8_rmac_off_mrafc, "MRAFC offset");
static_assert(offsetof(r_rmac_regs_t, MRSCE) == (size_t)k_ra8_rmac_off_mrsce, "MRSCE offset");
static_assert(offsetof(r_rmac_regs_t, MRSCP) == (size_t)k_ra8_rmac_off_mrscp, "MRSCP offset");
static_assert(offsetof(r_rmac_regs_t, MRSCC) == (size_t)k_ra8_rmac_off_mrscc, "MRSCC offset");
static_assert(offsetof(r_rmac_regs_t, MRFSCE) == (size_t)k_ra8_rmac_off_mrfsce, "MRFSCE offset");
static_assert(offsetof(r_rmac_regs_t, MRFSCP) == (size_t)k_ra8_rmac_off_mrfscp, "MRFSCP offset");
static_assert(offsetof(r_rmac_regs_t, MTRC) == (size_t)k_ra8_rmac_off_mtrc, "MTRC offset");
static_assert(offsetof(r_rmac_regs_t, MRPFM) == (size_t)k_ra8_rmac_off_mrpfm, "MRPFM offset");
static_assert(offsetof(r_rmac_regs_t, MPFC) == (size_t)k_ra8_rmac_off_mpfc0, "MPFC offset");
static_assert(offsetof(r_rmac_regs_t, MLVC) == (size_t)k_ra8_rmac_off_mlvc, "MLVC offset");
static_assert(offsetof(r_rmac_regs_t, MEEEC) == (size_t)k_ra8_rmac_off_meeec, "MEEEC offset");
static_assert(offsetof(r_rmac_regs_t, MLBC) == (size_t)k_ra8_rmac_off_mlbc, "MLBC offset");
static_assert(offsetof(r_rmac_regs_t, MXGMIIC) == (size_t)k_ra8_rmac_off_mxgmiic, "MXGMIIC offset");
static_assert(offsetof(r_rmac_regs_t, MPCH) == (size_t)k_ra8_rmac_off_mpch, "MPCH offset");
static_assert(offsetof(r_rmac_regs_t, MANM) == (size_t)k_ra8_rmac_off_manm, "MANM offset");
static_assert(offsetof(r_rmac_regs_t, MEIS) == (size_t)k_ra8_rmac_off_meis, "MEIS offset");
static_assert(offsetof(r_rmac_regs_t, MEIE) == (size_t)k_ra8_rmac_off_meie, "MEIE offset");
static_assert(offsetof(r_rmac_regs_t, MEID) == (size_t)k_ra8_rmac_off_meid, "MEID offset");
static_assert(offsetof(r_rmac_regs_t, MMIS0) == (size_t)k_ra8_rmac_off_mmis0, "MMIS0 offset");
static_assert(offsetof(r_rmac_regs_t, MMIE0) == (size_t)k_ra8_rmac_off_mmie0, "MMIE0 offset");
static_assert(offsetof(r_rmac_regs_t, MMID0) == (size_t)k_ra8_rmac_off_mmid0, "MMID0 offset");
static_assert(offsetof(r_rmac_regs_t, MMIS1) == (size_t)k_ra8_rmac_off_mmis1, "MMIS1 offset");
static_assert(offsetof(r_rmac_regs_t, MMIE1) == (size_t)k_ra8_rmac_off_mmie1, "MMIE1 offset");
static_assert(offsetof(r_rmac_regs_t, MMID1) == (size_t)k_ra8_rmac_off_mmid1, "MMID1 offset");
static_assert(offsetof(r_rmac_regs_t, MMIS2) == (size_t)k_ra8_rmac_off_mmis2, "MMIS2 offset");
static_assert(offsetof(r_rmac_regs_t, MMIE2) == (size_t)k_ra8_rmac_off_mmie2, "MMIE2 offset");
static_assert(offsetof(r_rmac_regs_t, MMID2) == (size_t)k_ra8_rmac_off_mmid2, "MMID2 offset");
static_assert(offsetof(r_rmac_regs_t, MMPFTCT) == (size_t)k_ra8_rmac_off_mmpftct, "MMPFTCT offset");
static_assert(offsetof(r_rmac_regs_t, MAPFTCT) == (size_t)k_ra8_rmac_off_mapftct, "MAPFTCT offset");
static_assert(offsetof(r_rmac_regs_t, MPFRCT) == (size_t)k_ra8_rmac_off_mpfrct, "MPFRCT offset");
static_assert(offsetof(r_rmac_regs_t, MFCICT) == (size_t)k_ra8_rmac_off_mfcict, "MFCICT offset");
static_assert(offsetof(r_rmac_regs_t, MEEECT) == (size_t)k_ra8_rmac_off_meeect, "MEEECT offset");
static_assert(offsetof(r_rmac_regs_t, MMPCFTCT) == (size_t)k_ra8_rmac_off_mmpcftct0,
              "MMPCFTCT offset");
static_assert(offsetof(r_rmac_regs_t, MAPCFTCT) == (size_t)k_ra8_rmac_off_mapcftct0,
              "MAPCFTCT offset");
static_assert(offsetof(r_rmac_regs_t, MPCFRCT) == (size_t)k_ra8_rmac_off_mpcfrct0,
              "MPCFRCT offset");
static_assert(offsetof(r_rmac_regs_t, MROVFC) == (size_t)k_ra8_rmac_off_mrovfc, "MROVFC offset");
static_assert(offsetof(r_rmac_regs_t, MRHCRCEC) == (size_t)k_ra8_rmac_off_mrhcrcec,
              "MRHCRCEC offset");
static_assert(offsetof(r_rmac_regs_t, MRGFCE) == (size_t)k_ra8_rmac_off_mrgfce, "MRGFCE offset");
static_assert(offsetof(r_rmac_regs_t, MRGFCP) == (size_t)k_ra8_rmac_off_mrgfcp, "MRGFCP offset");
static_assert(offsetof(r_rmac_regs_t, MTGFCE) == (size_t)k_ra8_rmac_off_mtgfce, "MTGFCE offset");
static_assert(offsetof(r_rmac_regs_t, MTGFCP) == (size_t)k_ra8_rmac_off_mtgfcp, "MTGFCP offset");

RA8_HW_REGISTER_ACCESS
static inline volatile r_rmac_regs_t* ra8_rmac(ra8_rmac_port_t port)
{
  uintptr_t base = k_ra8_rmac0_base_addr;
  if (port == k_ra8_rmac_port_1) {
    base = k_ra8_rmac1_base_addr;
  }
  return (volatile r_rmac_regs_t*)base;
}
 
#ifdef __cplusplus
}
#endif