ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_mipi_csi.h File Reference

MIPI CSI-2 receiver HAL driver – public API. More...

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Detailed Description

MIPI CSI-2 receiver HAL driver – public API.

Tag
[Ring 3 / HAL] {World: NS}

Full HUM Ch 66 ("MIPI CSI Interface" p 3935-3972) HAL surface for the RA8D2 MIPI CSI-2 receiver block. Every documented register and every documented IRQ source is exposed.

Functional groups

  • Lifecycle – init / deinit / reset.
  • Reception control – start / stop receive (MCT3.RXEN).
  • Data-type filter – DTEL / DTEH (per-DT enable).
  • ECC / scrambling – MCT0.ECCV13, MCT0.LFSREN.
  • Frame-error mode – MCT0.ZLMD / EDMD / RVMD.
  • EPD tuning – EPCT (long/short spacers + Option-2).
  • LRTE tuning – EMCT.VLSIEN / EOTPEN.
  • Module status – MCG (RO IP info), MIST (IRQ summary).
  • Receive status – RXST / RXSC / RXIE.
  • Per-data-lane IRQ – DLST(N) / DLSC(N) / DLIE(N).
  • Per-VC IRQ – VCST(M) / VCSC(M) / VCIE(M).
  • Power management – PMST / PMSC / PMIE.
  • Short-packet FIFO – GSCT / GSST / GSSC / GSIE / GSHT / GSIU.
  • ISR dispatch – one dispatcher per HUM IRQ source (RX, DL, VC, PM, GST).
  • Power transition – enter_stop / exit_stop (MSTP gate).

The driver pairs with the parallel ra8_mipi_phy driver (HUM Ch 64) which configures the D-PHY itself. ra8_mipi_phy is owned by a different agent and is NOT invoked from here – the caller is expected to bring the PHY up before calling ra8_mipi_csi_init and tear it down after ra8_mipi_csi_deinit.

State Machine
Header layout
This is a thin umbrella header. The public API is split across the sub-headers below to stay within the per-file line budget; including ra8_mipi_csi.h pulls in the entire surface unchanged.

Definition in file ra8_mipi_csi.h.