ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_pdm_regs.h File Reference

Pulse Density Modulation Interface (PDM-IF) register layout. More...

#include <stddef.h>
#include <stdint.h>
Include dependency graph for ra8_pdm_regs.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  r_pdm_ch_regs_t
 Per-channel PDM-IF register bank (256 bytes, HUM Ch 49.2). More...
struct  r_pdm_regs_t
 Full PDM-IF register block: common bank + 3 channel banks. More...

Enumerations

enum  ra8_pdm_addr_t : uintptr_t { k_ra8_pdm_base_addr = 0x40256000UL }
 Base address of the PDM-IF register block. More...
enum  ra8_pdm_fifo_t : uint8_t { k_ra8_pdm_fifo_depth = 32U }
 Receive-FIFO geometry constants (HUM Ch 49.3.4). More...
enum  ra8_pdm_array_count_t : uint8_t {
  k_ra8_pdm_cfch_count = 11U ,
  k_ra8_pdm_lfch1_count = 20U ,
  k_ra8_pdm_common_rsvd1_words = 21U ,
  k_ra8_pdm_common_rsvd2_words = 31U
}
 Element counts for the variable-length register arrays. More...
enum  ra8_pdm_ch_off_t : uint32_t {
  k_ra8_pdm_off_pdmdsr = 0x20U ,
  k_ra8_pdm_off_pdsfcr = 0x24U ,
  k_ra8_pdm_off_pdcfchr = 0x38U ,
  k_ra8_pdm_off_pdlfch010r = 0x64U ,
  k_ra8_pdm_off_pddrcr = 0xE0U ,
  k_ra8_pdm_off_pddrr = 0xE8U ,
  k_ra8_pdm_off_pddsr = 0xECU ,
  k_ra8_pdm_ch_bank_bytes = 0x100U
}
 Byte offsets of live registers within one channel bank (HUM Ch 49.2). More...
enum  ra8_pdm_common_off_t : uint32_t {
  k_ra8_pdm_off_pdcsr = 0x10U ,
  k_ra8_pdm_off_pdvr = 0x80U ,
  k_ra8_pdm_off_ch = 0x100U ,
  k_ra8_pdm_block_bytes = 0x400U
}
 Byte offsets of live common-bank registers plus the block size. More...
enum  ra8_pdm_pdmdsr_bits_t : uint32_t {
  k_ra8_pdm_pdmdsr_inpsel = 0x1U ,
  k_ra8_pdm_pdmdsr_sfmd_pos = 4U ,
  k_ra8_pdm_pdmdsr_hfis_pos = 8U ,
  k_ra8_pdm_pdmdsr_cfis_pos = 12U ,
  k_ra8_pdm_pdmdsr_lfis_pos = 16U ,
  k_ra8_pdm_pdmdsr_sdma_pos = 24U ,
  k_ra8_pdm_pdmdsr_dbis_pos = 28U
}
 PDMDSRCHn (Mode Setting) field shifts (HUM Ch 49.2.19 p 3208). More...
enum  ra8_pdm_pdsfcr_bits_t : uint32_t {
  k_ra8_pdm_pdsfcr_ckdiv_pos = 0U ,
  k_ra8_pdm_pdsfcr_sincdec_pos = 16U ,
  k_ra8_pdm_pdsfcr_sincrng_pos = 24U
}
 PDSFCRCHn (Sinc Filter Control) field shifts (HUM Ch 49.2.20 p 3209). More...
enum  ra8_pdm_status_bits_t : uint32_t {
  k_ra8_pdm_pdsr_state = 0x1U ,
  k_ra8_pdm_pdsr_drf = 0x4U ,
  k_ra8_pdm_pdscr_clr_all = 0x08070002U ,
  k_ra8_pdm_pdstrtr_strt = 0x1U ,
  k_ra8_pdm_pdstptr_stp = 0x1U ,
  k_ra8_pdm_pdicr_idre = 0x4U ,
  k_ra8_pdm_pddrcr_datre = 0x1U
}
 Trigger / status / data-read bit masks (HUM Ch 49.2). More...
enum  ra8_pdm_data_bits_t : uint32_t {
  k_ra8_pdm_pddrr_dat_mask = 0x000FFFFFU ,
  k_ra8_pdm_pddrr_sign_bit = 0x00080000U ,
  k_ra8_pdm_pddrr_sign_ext = 0xFFF00000U ,
  k_ra8_pdm_pddsr_num_mask = 0x000000FFU
}
 PDDRRCHn / PDDSRCHn field masks (HUM Ch 49.2.36, 49.2.37). More...

Functions

static volatile r_pdm_regs_tra8_pdm (void)
 Get a pointer to the PDM-IF register block.
static volatile r_pdm_ch_regs_tra8_pdm_ch (uint8_t ch)
 Get a pointer to a PDM-IF channel register bank.

Detailed Description

Pulse Density Modulation Interface (PDM-IF) register layout.

Register map for the single RA8D2 PDM-IF block at 0x4025_6000. The peripheral has one common register bank (channel start/stop/status triggers, version) followed by three per-channel banks (CH[0..2]) at offset 0x100, 0x200, 0x300. Each channel carries its own digital filter chain (sinc + high-pass + compensation + half-band decimation) and a 32-deep receive FIFO drained through the data-read register.

The layout mirrors the RA8D2 Hardware User's Manual Ch 49 "Pulse Density Modulation Interface (PDM-IF)" (p 3190-3256) field-for-field; static_assert guards below pin the offsets so a stray padding change cannot silently shift a register.

Definition in file ra8_pdm_regs.h.

Enumeration Type Documentation

◆ ra8_pdm_addr_t

enum ra8_pdm_addr_t : uintptr_t

Base address of the PDM-IF register block.

Enumerator
k_ra8_pdm_base_addr 

PDM-IF Secure base (HUM Ch 49 p 3190).

Definition at line 36 of file ra8_pdm_regs.h.

◆ ra8_pdm_array_count_t

enum ra8_pdm_array_count_t : uint8_t

Element counts for the variable-length register arrays.

Length of each coefficient / reserved-word array in the PDM-IF layout. Named so the register-bank structs carry no bare array bound; every value is fixed by the HUM Ch 49 address map.

Enumerator
k_ra8_pdm_cfch_count 

PDCFCHR compensation-filter coeffs h(0..10).

k_ra8_pdm_lfch1_count 

PDLFCH1R low-pass-filter coeffs h1(0..19).

k_ra8_pdm_common_rsvd1_words 

Common bank +0x2C reserved-word run.

k_ra8_pdm_common_rsvd2_words 

Common bank +0x84 reserved-word run.

Definition at line 56 of file ra8_pdm_regs.h.

◆ ra8_pdm_ch_off_t

enum ra8_pdm_ch_off_t : uint32_t

Byte offsets of live registers within one channel bank (HUM Ch 49.2).

Feeds the layout static_assert guards below so no bare hex offset appears in the checks. k_ra8_pdm_ch_bank_bytes is the per-channel bank stride (which equals its size).

Enumerator
k_ra8_pdm_off_pdmdsr 

PDMDSR Mode Setting.

k_ra8_pdm_off_pdsfcr 

PDSFCR Sinc Filter Control.

k_ra8_pdm_off_pdcfchr 

PDCFCHR Compensation filter coeff h0.

k_ra8_pdm_off_pdlfch010r 

PDLFCH010R Low-pass filter coeff h0(10).

k_ra8_pdm_off_pddrcr 

PDDRCR Data Read Control.

k_ra8_pdm_off_pddrr 

PDDRR Data Read (20-bit PCM out).

k_ra8_pdm_off_pddsr 

PDDSR Data Status (FIFO fill count).

k_ra8_pdm_ch_bank_bytes 

Per-channel bank stride and size (256 B).

Definition at line 71 of file ra8_pdm_regs.h.

◆ ra8_pdm_common_off_t

enum ra8_pdm_common_off_t : uint32_t

Byte offsets of live common-bank registers plus the block size.

Feeds the layout static_assert guards for r_pdm_regs_t. k_ra8_pdm_off_ch is where the three per-channel banks begin and k_ra8_pdm_block_bytes is the whole PDM-IF block size.

Enumerator
k_ra8_pdm_off_pdcsr 

PDCSR Channel Status.

k_ra8_pdm_off_pdvr 

PDVR Version.

k_ra8_pdm_off_ch 

CH[0] per-channel banks start offset.

k_ra8_pdm_block_bytes 

Full PDM-IF block size (1024 bytes).

Definition at line 90 of file ra8_pdm_regs.h.

◆ ra8_pdm_data_bits_t

enum ra8_pdm_data_bits_t : uint32_t

PDDRRCHn / PDDSRCHn field masks (HUM Ch 49.2.36, 49.2.37).

Enumerator
k_ra8_pdm_pddrr_dat_mask 

PDDRR[19:0] 20-bit PCM.

k_ra8_pdm_pddrr_sign_bit 

PDDRR[19] sign bit.

k_ra8_pdm_pddrr_sign_ext 

High bits set on negatives.

k_ra8_pdm_pddsr_num_mask 

PDDSR[7:0] FIFO fill count.

Definition at line 227 of file ra8_pdm_regs.h.

◆ ra8_pdm_fifo_t

enum ra8_pdm_fifo_t : uint8_t

Receive-FIFO geometry constants (HUM Ch 49.3.4).

Enumerator
k_ra8_pdm_fifo_depth 

PDDRR FIFO depth (samples).

Definition at line 44 of file ra8_pdm_regs.h.

◆ ra8_pdm_pdmdsr_bits_t

enum ra8_pdm_pdmdsr_bits_t : uint32_t

PDMDSRCHn (Mode Setting) field shifts (HUM Ch 49.2.19 p 3208).

Enumerator
k_ra8_pdm_pdmdsr_inpsel 

[0] Input data edge select.

k_ra8_pdm_pdmdsr_sfmd_pos 

[6:4] Sinc filter mode shift.

k_ra8_pdm_pdmdsr_hfis_pos 

[9:8] High-pass input shift.

k_ra8_pdm_pdmdsr_cfis_pos 

[13:12] Compensation input shift.

k_ra8_pdm_pdmdsr_lfis_pos 

[17:16] Low-pass input shift.

k_ra8_pdm_pdmdsr_sdma_pos 

[25:24] Sound-detect avg mode.

k_ra8_pdm_pdmdsr_dbis_pos 

[31:28] Data buffer input shift.

Definition at line 189 of file ra8_pdm_regs.h.

◆ ra8_pdm_pdsfcr_bits_t

enum ra8_pdm_pdsfcr_bits_t : uint32_t

PDSFCRCHn (Sinc Filter Control) field shifts (HUM Ch 49.2.20 p 3209).

Enumerator
k_ra8_pdm_pdsfcr_ckdiv_pos 

[3:0] PDM_CLKn dividend ratio.

k_ra8_pdm_pdsfcr_sincdec_pos 

[23:16] Sinc decimation ratio.

k_ra8_pdm_pdsfcr_sincrng_pos 

[28:24] Sinc output valid range.

Definition at line 203 of file ra8_pdm_regs.h.

◆ ra8_pdm_status_bits_t

enum ra8_pdm_status_bits_t : uint32_t

Trigger / status / data-read bit masks (HUM Ch 49.2).

Enumerator
k_ra8_pdm_pdsr_state 

PDSR[0] channel running.

k_ra8_pdm_pdsr_drf 

PDSR[2] data reception flag.

k_ra8_pdm_pdscr_clr_all 

PDSCR clear-all write pattern.

k_ra8_pdm_pdstrtr_strt 

PDSTRTR[0] start trigger.

k_ra8_pdm_pdstptr_stp 

PDSTPTR[0] stop trigger.

k_ra8_pdm_pdicr_idre 

PDICR[2] data IRQ enable.

k_ra8_pdm_pddrcr_datre 

PDDRCR[0] data read enable.

Definition at line 213 of file ra8_pdm_regs.h.

Function Documentation

◆ ra8_pdm()

volatile r_pdm_regs_t * ra8_pdm ( void )
inlinestatic

Get a pointer to the PDM-IF register block.

Returns
Volatile pointer to the common PDM-IF register bank.

Definition at line 238 of file ra8_pdm_regs.h.

References k_ra8_pdm_base_addr.

Referenced by ra8_pdm_ch(), ra8_pdm_deinit(), ra8_pdm_init(), ra8_pdm_start(), and ra8_pdm_stop().

◆ ra8_pdm_ch()

volatile r_pdm_ch_regs_t * ra8_pdm_ch ( uint8_t ch)
inlinestatic

Get a pointer to a PDM-IF channel register bank.

Parameters
[in]chChannel index (0..2). Caller validates the range.
Returns
Volatile pointer to CH[ch].

Definition at line 248 of file ra8_pdm_regs.h.

References r_pdm_regs_t::CH, and ra8_pdm().

Referenced by internal_pdm_data_isr(), ra8_pdm_configure(), ra8_pdm_read(), ra8_pdm_read_enable(), ra8_pdm_stop(), ra8_pdm_stream_disable(), and ra8_pdm_stream_enable().