ra8_mipi_dsi_types.h File Reference

MIPI DSI-2 host driver – public types (enums / structs / typedefs). More...

#include <stdint.h>
#include "ra8_err.h"
#include "ra8_mipi_dsi_regs.h"

Include dependency graph for ra8_mipi_dsi_types.h:

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Go to the source code of this file.

Data Structures
struct	ra8_mipi_dsi_timing_t
	LP / HS guard-band timing values. More...
struct	ra8_mipi_dsi_timeouts_t
	Bus timeout counters (HSTXTOSETR / LRXHTOSETR / TATOSETR / PRESPTO* registers). More...
struct	ra8_mipi_dsi_video_cfg_t
	Video-mode timing + format + sync configuration. More...
struct	ra8_mipi_dsi_command_t
	Generic DSI packet descriptor for ra8_mipi_dsi_send_command. More...
struct	ra8_mipi_dsi_rx_result_t
	Decoded view of a single RXRSS slot register. More...
struct	ra8_mipi_dsi_link_status_t
	Decoded view of LINKSR. More...
struct	ra8_mipi_dsi_ack_error_t
	Decoded view of AKEPLATIR / AKEPACMSR. More...
struct	ra8_mipi_dsi_config_t
	Static configuration passed to ra8_mipi_dsi_init. More...

Typedefs
typedef void(*	ra8_mipi_dsi_event_fn_t) (void *ctx, ra8_mipi_dsi_event_t event, uint32_t status_mask)
	MIPI DSI ISR-context callback signature.

Enumerations
enum	ra8_mipi_dsi_lane_count_t : uint8_t {   k_ra8_mipi_dsi_lanes_1 = 1U ,   k_ra8_mipi_dsi_lanes_2 = 2U }
	Number of D-PHY data lanes the DSI link drives. More...
enum	ra8_mipi_dsi_clock_mode_t : uint8_t {   k_ra8_mipi_dsi_clock_non_continuous = 0U ,   k_ra8_mipi_dsi_clock_continuous = 1U }
	Continuous vs non-continuous HS clock (HSCLKSETR.HSCLMD). More...
enum	ra8_mipi_dsi_vc_t : uint8_t {   k_ra8_mipi_dsi_vc0 = 0U ,   k_ra8_mipi_dsi_vc1 = 1U ,   k_ra8_mipi_dsi_vc2 = 2U ,   k_ra8_mipi_dsi_vc3 = 3U }
	DSI virtual channel identifier (DT[7:6] in the packet header). More...
enum	ra8_mipi_dsi_dt_t : uint8_t {   k_ra8_mipi_dsi_dt_v_sync_start = 0x01U ,   k_ra8_mipi_dsi_dt_v_sync_end = 0x11U ,   k_ra8_mipi_dsi_dt_h_sync_start = 0x21U ,   k_ra8_mipi_dsi_dt_h_sync_end = 0x31U ,   k_ra8_mipi_dsi_dt_none = 0x00U ,   k_ra8_mipi_dsi_dt_color_mode_off = 0x02U ,   k_ra8_mipi_dsi_dt_color_mode_on = 0x12U ,   k_ra8_mipi_dsi_dt_shutdown_peripheral = 0x22U ,   k_ra8_mipi_dsi_dt_turn_on_peripheral = 0x32U ,   k_ra8_mipi_dsi_dt_compression_mode = 0x07U ,   k_ra8_mipi_dsi_dt_end_of_transmission = 0x08U ,   k_ra8_mipi_dsi_dt_dcs_short_write_0 = 0x05U ,   k_ra8_mipi_dsi_dt_dcs_short_write_1 = 0x15U ,   k_ra8_mipi_dsi_dt_gen_short_write_0 = 0x03U ,   k_ra8_mipi_dsi_dt_gen_short_write_1 = 0x13U ,   k_ra8_mipi_dsi_dt_gen_short_write_2 = 0x23U ,   k_ra8_mipi_dsi_dt_gen_read_0 = 0x04U ,   k_ra8_mipi_dsi_dt_gen_read_1 = 0x14U ,   k_ra8_mipi_dsi_dt_gen_read_2 = 0x24U ,   k_ra8_mipi_dsi_dt_dcs_read = 0x06U ,   k_ra8_mipi_dsi_dt_execute_queue = 0x16U ,   k_ra8_mipi_dsi_dt_set_max_return_pkt = 0x37U ,   k_ra8_mipi_dsi_dt_null_packet = 0x09U ,   k_ra8_mipi_dsi_dt_blanking_packet = 0x19U ,   k_ra8_mipi_dsi_dt_gen_long_write = 0x29U ,   k_ra8_mipi_dsi_dt_dcs_long_write = 0x39U ,   k_ra8_mipi_dsi_dt_pixel_rgb565 = 0x0EU ,   k_ra8_mipi_dsi_dt_pixel_rgb666 = 0x1EU ,   k_ra8_mipi_dsi_dt_pixel_rgb666_loose = 0x2EU ,   k_ra8_mipi_dsi_dt_pixel_rgb888 = 0x3EU }
	Frequently used DSI Data Types (cmd id) for short and long packets. More...
enum	ra8_mipi_dsi_lane_sel_t : uint8_t {   k_ra8_mipi_dsi_lane_none = 0U ,   k_ra8_mipi_dsi_lane_clock = 1U << 0 ,   k_ra8_mipi_dsi_lane_data = 1U << 1 ,   k_ra8_mipi_dsi_lane_all = (uint8_t)((1U << 0) | (1U << 1)) }
	Lane selector for ULPS enter / exit transitions. More...
enum	ra8_mipi_dsi_event_t : uint8_t {   k_ra8_mipi_dsi_event_seq0 = 0U ,   k_ra8_mipi_dsi_event_seq1 = 1U ,   k_ra8_mipi_dsi_event_video = 2U ,   k_ra8_mipi_dsi_event_receive = 3U ,   k_ra8_mipi_dsi_event_fatal = 4U ,   k_ra8_mipi_dsi_event_phy = 5U }
	Event class delivered to the user callback. More...

Detailed Description

MIPI DSI-2 host driver – public types (enums / structs / typedefs).

Tag

[Ring 3 / HAL] {World: S}

Type-definition split of the MIPI DSI host public API (HUM Ch 65, p 3839-3934). Carries the lane-count / clock-mode / virtual-channel / data-type enumerations, the configuration + status + command + receive structs, and the ISR-callback function-pointer typedef. Pulled out of ra8_mipi_dsi.h so the umbrella stays a thin include shim; consumers keep including ra8_mipi_dsi.h unchanged.

Copyright

Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since

0.1.0

Definition in file ra8_mipi_dsi_types.h.

Typedef Documentation

ra8_mipi_dsi_event_fn_t

typedef void(* ra8_mipi_dsi_event_fn_t) (void *ctx, ra8_mipi_dsi_event_t event, uint32_t status_mask)

MIPI DSI ISR-context callback signature.

status_mask carries the snapshot of the ISR register at the moment the dispatch routine ran. The driver clears the underlying sub-status registers (SQCH0SCR, SQCH1SCR, VMSCR, RXSCR, FERRSCR, PLSCR) before invoking the user callback so the application sees a coherent view.

Definition at line 306 of file ra8_mipi_dsi_types.h.

Enumeration Type Documentation

ra8_mipi_dsi_clock_mode_t

enum ra8_mipi_dsi_clock_mode_t : uint8_t

Continuous vs non-continuous HS clock (HSCLKSETR.HSCLMD).

Enumerator
k_ra8_mipi_dsi_clock_non_continuous	HS clock idles in LP.
k_ra8_mipi_dsi_clock_continuous	HS clock runs forever.

Definition at line 47 of file ra8_mipi_dsi_types.h.

ra8_mipi_dsi_dt_t

enum ra8_mipi_dsi_dt_t : uint8_t

Frequently used DSI Data Types (cmd id) for short and long packets.

Drawn from the MIPI DSI 1.1 specification table 7. Both short- and long-packet entries are listed so the same enum can drive ra8_mipi_dsi_send_short_packet, _send_long_packet, and the video-mode pixel-stream selector.

Enumerator
k_ra8_mipi_dsi_dt_v_sync_start	Sync event: VSYNC start.
k_ra8_mipi_dsi_dt_v_sync_end	Sync event: VSYNC end.
k_ra8_mipi_dsi_dt_h_sync_start	Sync event: HSYNC start.
k_ra8_mipi_dsi_dt_h_sync_end	Sync event: HSYNC end.
k_ra8_mipi_dsi_dt_none	Reserved DT: "no packet".
k_ra8_mipi_dsi_dt_color_mode_off	CM Off command.
k_ra8_mipi_dsi_dt_color_mode_on	CM On command.
k_ra8_mipi_dsi_dt_shutdown_peripheral	Shut down peripheral.
k_ra8_mipi_dsi_dt_turn_on_peripheral	Turn on peripheral.
k_ra8_mipi_dsi_dt_compression_mode	Compression mode command.
k_ra8_mipi_dsi_dt_end_of_transmission	End of Transmission packet.
k_ra8_mipi_dsi_dt_dcs_short_write_0	DCS short write, 0 args.
k_ra8_mipi_dsi_dt_dcs_short_write_1	DCS short write, 1 arg.
k_ra8_mipi_dsi_dt_gen_short_write_0	Generic short, 0 args.
k_ra8_mipi_dsi_dt_gen_short_write_1	Generic short, 1 arg.
k_ra8_mipi_dsi_dt_gen_short_write_2	Generic short, 2 args.
k_ra8_mipi_dsi_dt_gen_read_0	Generic read, 0 args.
k_ra8_mipi_dsi_dt_gen_read_1	Generic read, 1 arg.
k_ra8_mipi_dsi_dt_gen_read_2	Generic read, 2 args.
k_ra8_mipi_dsi_dt_dcs_read	DCS read, 0 args.
k_ra8_mipi_dsi_dt_execute_queue	Execute queue.
k_ra8_mipi_dsi_dt_set_max_return_pkt	Set max return packet size.
k_ra8_mipi_dsi_dt_null_packet	Null packet (long).
k_ra8_mipi_dsi_dt_blanking_packet	Blanking packet (long).
k_ra8_mipi_dsi_dt_gen_long_write	Generic long write.
k_ra8_mipi_dsi_dt_dcs_long_write	DCS long write.
k_ra8_mipi_dsi_dt_pixel_rgb565	16-bit RGB packed pixel.
k_ra8_mipi_dsi_dt_pixel_rgb666	18-bit RGB packed pixel.
k_ra8_mipi_dsi_dt_pixel_rgb666_loose	18-bit RGB loosely packed.
k_ra8_mipi_dsi_dt_pixel_rgb888	24-bit RGB packed pixel.

Definition at line 78 of file ra8_mipi_dsi_types.h.

ra8_mipi_dsi_event_t

enum ra8_mipi_dsi_event_t : uint8_t

Event class delivered to the user callback.

Mirrors the FSP mipi_dsi_event_t so application code that already targets FSP can be ported with a 1:1 enum substitution.

Enumerator
k_ra8_mipi_dsi_event_seq0	Sequence channel 0 (LP) finished.
k_ra8_mipi_dsi_event_seq1	Sequence channel 1 (HS) finished.
k_ra8_mipi_dsi_event_video	Video-mode status changed.
k_ra8_mipi_dsi_event_receive	Packet / response received.
k_ra8_mipi_dsi_event_fatal	Fatal-error class IRQ.
k_ra8_mipi_dsi_event_phy	PPI (PHY) lane event.

Definition at line 138 of file ra8_mipi_dsi_types.h.

ra8_mipi_dsi_lane_count_t

enum ra8_mipi_dsi_lane_count_t : uint8_t

Number of D-PHY data lanes the DSI link drives.

HUM Ch 65.1 "Overview" p 3839 confirms the host supports 1- and 2-lane configurations only; the package brings out two physical data lanes plus one clock lane.

Enumerator
k_ra8_mipi_dsi_lanes_1	1 data lane + 1 clock lane.
k_ra8_mipi_dsi_lanes_2	2 data lanes + 1 clock lane.

Definition at line 38 of file ra8_mipi_dsi_types.h.

ra8_mipi_dsi_lane_sel_t

enum ra8_mipi_dsi_lane_sel_t : uint8_t

Lane selector for ULPS enter / exit transitions.

Bits can be OR'd: for example lane = k_ra8_mipi_dsi_lane_clock | k_ra8_mipi_dsi_lane_data puts the entire link into ULPS.

Enumerator
k_ra8_mipi_dsi_lane_none	No lanes selected.
k_ra8_mipi_dsi_lane_clock	Clock lane.
k_ra8_mipi_dsi_lane_data	All data lanes (1 or 2).
k_ra8_mipi_dsi_lane_all	Composite mask: clock + all data lanes.

Definition at line 122 of file ra8_mipi_dsi_types.h.

ra8_mipi_dsi_vc_t

enum ra8_mipi_dsi_vc_t : uint8_t

DSI virtual channel identifier (DT[7:6] in the packet header).

Only VC0 is wired up by the EK-RA8D2 panel; the other three are reserved for multi-display use cases. HUM Ch 65 lists VC0..VC3 in the descriptor word A bit layout.

Enumerator
k_ra8_mipi_dsi_vc0	Virtual channel 0 (default panel).
k_ra8_mipi_dsi_vc1	Virtual channel 1.
k_ra8_mipi_dsi_vc2	Virtual channel 2.
k_ra8_mipi_dsi_vc3	Virtual channel 3.

Definition at line 61 of file ra8_mipi_dsi_types.h.