ra8_npu_regs.h

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#pragma once
 
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_device.h"
 
#ifndef RA8_HAS_NPU
#error "ra8_npu_regs.h included on a device without an NPU (RA8P1-only)."
#endif
 
#ifdef __cplusplus
extern "C" {
#endif

typedef enum : uintptr_t {
  k_ra8_npu_base_addr = 0x40140000U, 
} ra8_npu_addr_t;

typedef enum : uint32_t {
  k_ra8_npu_window_bytes  = 0x1000U, 
  k_ra8_npu_off_id        = 0x0000U, 
  k_ra8_npu_off_status    = 0x0004U, 
  k_ra8_npu_off_cmd       = 0x0008U, 
  k_ra8_npu_off_reset     = 0x000CU, 
  k_ra8_npu_off_qbase_lo  = 0x0010U, 
  k_ra8_npu_off_qbase_hi  = 0x0014U, 
  k_ra8_npu_off_qread     = 0x0018U, 
  k_ra8_npu_off_qconfig   = 0x001CU, 
  k_ra8_npu_off_qsize     = 0x0020U, 
  k_ra8_npu_off_prot      = 0x0024U, 
  k_ra8_npu_off_config    = 0x0028U, 
  k_ra8_npu_off_regioncfg = 0x003CU, 
  k_ra8_npu_off_basep0_lo = 0x0080U, 
} ra8_npu_layout_t;

typedef enum : uint8_t {
  k_ra8_npu_region_0     = 0U, 
  k_ra8_npu_region_1     = 1U, 
  k_ra8_npu_region_2     = 2U, 
  k_ra8_npu_region_3     = 3U, 
  k_ra8_npu_region_4     = 4U, 
  k_ra8_npu_region_5     = 5U, 
  k_ra8_npu_region_6     = 6U, 
  k_ra8_npu_region_7     = 7U, 
  k_ra8_npu_region_count = 8U, 
} ra8_npu_region_idx_t;

typedef enum : uint32_t {
  k_ra8_npu_reg_hi_offset      = 0x0004U, 
  k_ra8_npu_basep_stride_bytes = 0x0008U, 
} ra8_npu_geom_t;

typedef enum : uint8_t {
  k_ra8_npu_cmd_run_bit       = 0U, 
  k_ra8_npu_cmd_clear_irq_bit = 1U, 
  k_ra8_npu_cmd_clock_q_bit   = 2U, 
  k_ra8_npu_cmd_power_q_bit   = 3U, 
} ra8_npu_cmd_bit_t;

typedef enum : uint8_t {
  k_ra8_npu_status_state_bit      = 0U, 
  k_ra8_npu_status_irq_raised_bit = 1U, 
  k_ra8_npu_status_bus_error_bit  = 2U, 
  k_ra8_npu_status_reset_bit      = 3U, 
  k_ra8_npu_status_cmd_parse_bit  = 4U, 
  k_ra8_npu_status_cmd_end_bit    = 5U, 
  k_ra8_npu_status_pmu_irq_bit    = 6U, 
  k_ra8_npu_status_wd_fault_bit   = 7U, 
  k_ra8_npu_status_ecc_fault_bit  = 8U, 
} ra8_npu_status_bit_t;

typedef enum : uint8_t {
  k_ra8_npu_reset_pending_cpl_bit = 0U, 
  k_ra8_npu_reset_pending_csl_bit = 1U, 
} ra8_npu_reset_bit_t;

typedef enum : uint16_t {
  k_ra8_npu_event_irq = 0x067U, 
} ra8_npu_event_t;

RA8_HW_REGISTER_ACCESS
static inline volatile uint32_t* ra8_npu_reg(uint32_t byte_off)
{
  return (volatile uint32_t*)(k_ra8_npu_base_addr + (uintptr_t)byte_off);
}
 
#ifdef __cplusplus
}
#endif