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1.16.1
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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Compile-time device selection for the RA8 multi-chip build (RA8D2 / RA8P1). More...
#include <stdint.h>Go to the source code of this file.
Macros | |
| #define | RA8_DEVICE_RA8D2 (1) |
| RA8 DEVICE RA8 D2. | |
Enumerations | |
| enum | ra8_device_id_t : uint16_t { k_ra8_device_ra8d2 = 0x8D2U , k_ra8_device_ra8p1 = 0x8F1U , k_ra8_device_current = k_ra8_device_ra8d2 } |
| Stable numeric identity of each supported RA8 device. More... | |
| enum | ra8_device_feature_t : uint8_t { k_ra8_feat_npu = 0U , k_ra8_feat_npuclk = 0U } |
| Runtime-readable (0/1) mirror of the RA8_HAS_* presence flags. More... | |
| enum | ra8_device_mem_base_t : uintptr_t { k_ra8_mem_mram_base = 0x02000000U , k_ra8_mem_itcm_base = 0x00000000U , k_ra8_mem_dtcm_base = 0x20000000U , k_ra8_mem_sram_base = 0x22000000U , k_ra8_mem_sdram_base = 0x68000000U , k_ra8_mem_ospi_cs0_base = 0x80000000U , k_ra8_mem_ospi_cs1_base = 0x90000000U } |
| Base addresses of the on-chip / external memory regions. More... | |
| enum | ra8_device_mem_size_t : uint32_t { k_ra8_mem_mram_size = 0x00100000U , k_ra8_mem_sram_size = 0x001A0000U , k_ra8_mem_itcm_size = 0x00010000U , k_ra8_mem_dtcm_size = 0x00010000U } |
| Sizes (bytes) of the on-chip memory regions for the current device. More... | |
Compile-time device selection for the RA8 multi-chip build (RA8D2 / RA8P1).
This project's HAL was written for the Renesas RA8D2 (R7KA8D2KFLCAC). The RA8P1 (R7KA8P1KFLCAC) is the same RA8 family part in the same pin-compatible 289-pin BGA: primary sources (the two chips' FSP CMSIS device headers, their Zephyr device trees, and the RA8P1 datasheet R01DS0439EJ0130 / Hardware User's Manual R01UH1064EJ0130) show that the peripheral register map, the memory map, the interrupt/event numbering, and the module-stop bit assignments are IDENTICAL between the two parts. The RA8P1 reads as "RA8D2 + an Arm Ethos-U55 NPU", with a handful of small deltas captured by the feature flags below.
Because so little differs, the whole port hangs off ONE preprocessor switch added to the compile command by the toolchain file:
-DRA8_DEVICE_RA8P1 (cmake/toolchain-ra8p1.cmake)
When neither RA8_DEVICE_RA8D2 nor RA8_DEVICE_RA8P1 is defined this header defaults to RA8_DEVICE_RA8D2, so every existing RA8D2 build (and the host unit tests, which pass no device define) is byte-for-behaviour unchanged.
Peripheral register bases stay in libs/ra8_hal/inc/ra8d2_*_regs.h. Every one of the 155 bases the RA8D2 defines is byte-identical on the RA8P1, so those headers need NO device-conditional edits. Only genuinely NEW peripherals get a new header (see ra8_npu_regs.h for the Ethos-U55, RA8P1-only). If a future device ever DID shift a base, the fix is local: wrap that one enum value in #if defined(RA8_DEVICE_RA8P1) in its own register header – the base-address enum is deliberately the seam.
Definition in file ra8_device.h.
| #define RA8_DEVICE_RA8D2 (1) |
RA8 DEVICE RA8 D2.
Definition at line 76 of file ra8_device.h.
| enum ra8_device_feature_t : uint8_t |
Runtime-readable (0/1) mirror of the RA8_HAS_* presence flags.
The RA8_HAS_* macros drive #if guards; this typed-enum mirror gives the same facts a named value that ordinary C code and clang-tidy can consume without a bare 0/1 literal. Values are resolved from the active device selection at compile time.
| Enumerator | |
|---|---|
| k_ra8_feat_npu | Ethos-U55 NPU: absent on RA8D2. |
| k_ra8_feat_npuclk | NPUCLK clock domain: absent on RA8D2. (anon). |
Definition at line 174 of file ra8_device.h.
| enum ra8_device_id_t : uint16_t |
Stable numeric identity of each supported RA8 device.
The value is the two hex nibbles of the marketing part name so it reads clearly in a debugger (0x8D2 for the RA8D2, 0x8P1 is not valid hex so the RA8P1 uses 0x8F1). Includes k_ra8_device_current for runtime code that must branch on the build target.
| Enumerator | |
|---|---|
| k_ra8_device_ra8d2 | Renesas RA8D2, R7KA8D2KFLCAC (HUM R01UH1065EJ). |
| k_ra8_device_ra8p1 | Renesas RA8P1, R7KA8P1KFLCAC (HUM R01UH1064EJ). |
| k_ra8_device_current | Device selected by this build. |
Definition at line 99 of file ra8_device.h.
| enum ra8_device_mem_base_t : uintptr_t |
Base addresses of the on-chip / external memory regions.
Verified byte-identical between RA8D2 and RA8P1 from the two chips' Zephyr device trees and FSP linker descriptions, so these are defined once for both parts. They are the runtime mirror of the MEMORY { } block in every app's linker_script.ld; keep the two in lock-step. External-bus regions (SDRAM, OSPI XIP) are board-dependent – the addresses here are the CPU-side windows, populated only when the corresponding controller and device are fitted.
Definition at line 206 of file ra8_device.h.
| enum ra8_device_mem_size_t : uint32_t |
Sizes (bytes) of the on-chip memory regions for the current device.
MRAM and system SRAM are identical on both parts (1 MB and 1664 KB). The TCM sizes are the conservative per-core split the linker scripts use today (64 KB ITCM + 64 KB DTCM); the RA8P1 exposes a larger M85 TCM budget (256 KB total) but the exact ITCM/DTCM split is not yet confirmed against the RA8P1 HUM, so the safe shared floor is used until it is (tracked as a follow-up).
Definition at line 232 of file ra8_device.h.
1.16.1