ADC16H (16-bit SAR) register layout for the Renesas RA8D2 / RA8P1. More...

#include <stdint.h>
#include "ra8_attributes.h"

Include dependency graph for ra8_adc_b_regs.h:

This graph shows which files directly or indirectly include this file:

Enumerations
enum	ra8_adc_b_addr_t : uintptr_t { k_ra8_adc_b_base_addr = 0x40338000UL }
	Memory-mapped base address of the ADC_B register window. More...
enum	ra8_adc_b_limits_t : uint8_t { k_ra8_adc_b_unit_count = 2U , k_ra8_adc_b_max_channels = 24U , k_ra8_adc_b_result_regs = 23U , k_ra8_adc_b_scan_groups = 9U , k_ra8_adc_b_cmp_tables = 8U , k_ra8_adc_b_adchcr_stride = 0x10U , k_ra8_adc_b_addr_stride = 0x4U , k_ra8_adc_b_adstr_stride = 0x4U , k_ra8_adc_b_cmptbr_stride = 0x4U , k_ra8_adc_b_adsgdcr_stride = 0x4U , k_ra8_adc_b_adexdr_stride = 0x4U , k_ra8_adc_b_ext_data_regs = 23U }
	Channel counts, register strides, and array sizes. More...
enum	ra8_adc_b_off_t : uint16_t { k_ra8_adc_b_off_adclkenr = 0x0000U , k_ra8_adc_b_off_adclksr = 0x0004U , k_ra8_adc_b_off_adclkcr = 0x0008U , k_ra8_adc_b_off_adsycr = 0x000CU , k_ra8_adc_b_off_aderintcr = 0x0020U , k_ra8_adc_b_off_admdr = 0x0040U , k_ra8_adc_b_off_adsger = 0x0048U , k_ra8_adc_b_off_adintcr = 0x005CU , k_ra8_adc_b_off_adsgdcr0 = 0x0200U , k_ra8_adc_b_off_adcmpenr = 0x0400U , k_ra8_adc_b_off_adcmpintcr = 0x0404U , k_ra8_adc_b_off_adcmpmdr0 = 0x0448U , k_ra8_adc_b_off_adcmpmdr1 = 0x044CU , k_ra8_adc_b_off_adcmptbr0 = 0x0458U , k_ra8_adc_b_off_adchcr0 = 0x0600U , k_ra8_adc_b_off_addopcrb0 = 0x0608U , k_ra8_adc_b_off_addopcrc0 = 0x060CU , k_ra8_adc_b_off_adtrgenr = 0x0C08U , k_ra8_adc_b_off_adsystr = 0x0C10U , k_ra8_adc_b_off_adstr0 = 0x0C20U , k_ra8_adc_b_off_adstopr = 0x0C60U , k_ra8_adc_b_off_adsr = 0x0C80U , k_ra8_adc_b_off_addr0 = 0x2000U , k_ra8_adc_b_off_adexdr0 = 0x2180U }
	Register offsets inside the ADC_B block (subset modelled). More...
enum	ra8_adclkenr_bit_t : uint8_t { k_ra8_adclkenr_bit_clken = 0U }
	ADCLKENR bit positions. More...
enum	ra8_adclkenr_mask_t : uint32_t { k_ra8_adclkenr_mask_clken = 0x00000001UL }
	ADCLKENR bit masks. More...
enum	ra8_adclksr_mask_t : uint32_t { k_ra8_adclksr_mask_clksr = 0x00000001UL }
	ADCLKSR bit masks (RO clock-running flag). More...
enum	ra8_admdr_bit_t : uint8_t { k_ra8_admdr_bit_admd0 = 0U , k_ra8_admdr_bit_admd1 = 8U }
	ADMDR bit positions (per-unit mode). More...
enum	ra8_admdr_mask_t : uint32_t { k_ra8_admdr_mask_admd0 = 0x0000000FUL , k_ra8_admdr_mask_admd1 = 0x00000F00UL }
	ADMDR bit masks. More...
enum	ra8_admdr_mode_t : uint8_t { k_ra8_admdr_mode_disabled = 0x0U , k_ra8_admdr_mode_one_cycle = 0x1U , k_ra8_admdr_mode_continuous = 0x2U }
	ADMDR per-unit mode codes (subset of HUM Ch 53 ADMD0/1 table). More...
enum	ra8_adchcr_bit_t : uint8_t { k_ra8_adchcr_bit_sgsel = 0U , k_ra8_adchcr_bit_cnvcs = 8U , k_ra8_adchcr_bit_ainmd = 15U , k_ra8_adchcr_bit_sstsel = 16U }
	ADCHCRn bit positions (per virtual-channel config). More...
enum	ra8_adchcr_mask_t : uint32_t { k_ra8_adchcr_mask_sgsel = 0x0000001FUL , k_ra8_adchcr_mask_cnvcs = 0x00007F00UL , k_ra8_adchcr_mask_ainmd = 0x00008000UL , k_ra8_adchcr_mask_sstsel = 0x000F0000UL }
	ADCHCRn bit masks. More...
enum	ra8_adchcr_ainmd_t : uint8_t { k_ra8_adchcr_ainmd_single_ended = 0U , k_ra8_adchcr_ainmd_differential = 1U }
	ADCHCRn.AINMD analog-input-mode codes (HUM Ch 53.2.3.1 p 3336). More...
enum	ra8_adc_b_ext_chan_t : uint8_t { k_ra8_adc_b_chan_selfdiag_adc0 = 0x60U , k_ra8_adc_b_chan_selfdiag_adc1 = 0x61U , k_ra8_adc_b_chan_temperature = 0x64U , k_ra8_adc_b_chan_int_ref_volt = 0x65U , k_ra8_adc_b_chan_vbatt_div6 = 0x66U , k_ra8_adc_b_chan_dac0 = 0x68U , k_ra8_adc_b_chan_dac1 = 0x69U }
	CNVCS[6:0] codes for the internal / extended-analog channels. More...
enum	ra8_adc_b_ext_chan_base_t : uint8_t { k_ra8_adc_b_ext_chan_base = 0x60U }
	CNVCS base of the extended-analog block (ADEXDR index origin). More...
enum	ra8_adsgdcr_bit_t : uint8_t { k_ra8_adsgdcr_bit_diagval = 0U }
	ADSGDCRn bit positions (HUM Ch 53.2.4.1 p 3340). More...
enum	ra8_adsgdcr_mask_t : uint32_t { k_ra8_adsgdcr_mask_diagval = 0x00000007UL }
	ADSGDCRn bit masks (HUM Ch 53.2.4.1 p 3340). More...
enum	ra8_adsgdcr_diag_t : uint8_t { k_ra8_adsgdcr_diag_off = 0x0U , k_ra8_adsgdcr_diag_mode1 = 0x4U , k_ra8_adsgdcr_diag_mode2 = 0x5U , k_ra8_adsgdcr_diag_mode3 = 0x6U }
	ADSGDCRn.DIAGVAL[2:0] self-diagnosis mode codes. More...
enum	ra8_addopcrc_bit_t : uint8_t { k_ra8_addopcrc_bit_adprc = 16U , k_ra8_addopcrc_bit_signsel = 20U }
	ADDOPCRCn bit positions (HUM Ch 53.2.3.4 p 3339). More...
enum	ra8_addopcrc_mask_t : uint32_t { k_ra8_addopcrc_mask_adprc = 0x00030000UL , k_ra8_addopcrc_mask_signsel = 0x00100000UL }
	ADDOPCRCn bit masks (HUM Ch 53.2.3.4 p 3339). More...
enum	ra8_addopcrc_adprc_t : uint8_t { k_ra8_addopcrc_adprc_16bit = 0x0U , k_ra8_addopcrc_adprc_14bit = 0x1U , k_ra8_addopcrc_adprc_12bit = 0x2U , k_ra8_addopcrc_adprc_10bit = 0x3U }
	ADDOPCRCn.ADPRC[1:0] data-format codes (HUM Ch 53.2.3.4 p 3339). More...
enum	ra8_addopcrc_signsel_t : uint8_t { k_ra8_addopcrc_signsel_signed = 0U , k_ra8_addopcrc_signsel_unsigned = 1U }
	ADDOPCRCn.SIGNSEL data-sign codes (HUM Ch 53.2.3.4 p 3340). More...
enum	ra8_adexdr_bit_t : uint8_t { k_ra8_adexdr_bit_diagsr = 24U , k_ra8_adexdr_bit_err = 31U }
	ADEXDRn bit positions (HUM Ch 53.2.13.2 p 3391). More...
enum	ra8_adexdr_mask_t : uint32_t { k_ra8_adexdr_mask_data = 0x0000FFFFUL , k_ra8_adexdr_mask_diagsr = 0x07000000UL , k_ra8_adexdr_mask_err = 0x80000000UL }
	ADEXDRn field masks (HUM Ch 53.2.13.2 p 3391). More...
enum	ra8_adsger_mask_t : uint32_t { k_ra8_adsger_mask_sgren = 0x000001FFUL }
	ADSGER scan-group-enable mask (SGREn[8:0]). More...
enum	ra8_adsystr_mask_t : uint32_t { k_ra8_adsystr_mask_adsystn = 0x000001FFUL }
	ADSYSTR synchronous SW start mask (ADSYSTn[8:0]). More...
enum	ra8_adstr_mask_t : uint32_t { k_ra8_adstr_mask_adst = 0x00000001UL }
	ADSTR[n] per-group SW start mask (ADST[0]). More...
enum	ra8_adsr_bit_t : uint8_t { k_ra8_adsr_bit_adact0 = 0U , k_ra8_adsr_bit_adact1 = 1U , k_ra8_adsr_bit_calact0 = 16U , k_ra8_adsr_bit_calact1 = 17U }
	ADSR bit positions (busy / calibration flags, RO). More...
enum	ra8_adsr_mask_t : uint32_t { k_ra8_adsr_mask_adact0 = 0x00000001UL , k_ra8_adsr_mask_adact1 = 0x00000002UL , k_ra8_adsr_mask_adact = 0x00000003UL , k_ra8_adsr_mask_calact0 = 0x00010000UL , k_ra8_adsr_mask_calact1 = 0x00020000UL }
	ADSR bit masks. More...
enum	ra8_adstopr_mask_t : uint32_t { k_ra8_adstopr_mask_adstop0 = 0x00000001UL , k_ra8_adstopr_mask_adstop1 = 0x00000100UL }
	ADSTOPR force-stop bit masks. More...
enum	ra8_addr_mask_t : uint32_t { k_ra8_addr_mask_data = 0x0000FFFFUL , k_ra8_addr_mask_err = 0x80000000UL }
	ADDR[n] result-register field masks. More...
enum	ra8_adtrgenr_mask_t : uint32_t { k_ra8_adtrgenr_mask_sttrgen = 0x000001FFUL }
	ADTRGENR per-group hardware-trigger enable mask (STTRGENn[8:0]). More...
enum	ra8_adcmpenr_mask_t : uint32_t { k_ra8_adcmpenr_mask_cmpen = 0x000000FFUL }
	ADCMPENR compare-table enable mask (CMPENn[7:0]). More...
enum	ra8_adcmptbr_bit_t : uint8_t { k_ra8_adcmptbr_bit_low = 0U , k_ra8_adcmptbr_bit_high = 16U }
	ADCMPTBRn (low,high) packed-pair bit positions. More...
enum	ra8_adcmptbr_mask_t : uint32_t { k_ra8_adcmptbr_mask_low = 0x0000FFFFUL , k_ra8_adcmptbr_mask_high = 0xFFFF0000UL }
	ADCMPTBRn field masks (low + high 16-bit thresholds). More...
enum	ra8_adcmpmd_t : uint8_t { k_ra8_adcmpmd_disabled = 0x0U , k_ra8_adcmpmd_inside = 0x1U , k_ra8_adcmpmd_outside = 0x2U , k_ra8_adcmpmd_greater_eq = 0x3U }
	CMPMDn 2-bit window-mode codes (per HUM Ch 53). More...
enum	ra8_adcmpmd_layout_t : uint8_t { k_ra8_adcmpmd_field_width = 2U , k_ra8_adcmpmd_field_step = 8U , k_ra8_adcmpmd_per_reg = 4U }
	CMPMDn field layout inside ADCMPMDR0 / ADCMPMDR1. More...
enum	ra8_addopcrb_bit_t : uint8_t { k_ra8_addopcrb_bit_avemd = 0U , k_ra8_addopcrb_bit_adc = 8U , k_ra8_addopcrb_bit_cmptblem = 16U }
	ADDOPCRB[ch] bit positions (per-channel oversampling + cmp enable). More...
enum	ra8_addopcrb_mask_t : uint32_t { k_ra8_addopcrb_mask_avemd = 0x00000003UL , k_ra8_addopcrb_mask_adc = 0x00000F00UL , k_ra8_addopcrb_mask_cmptblem = 0x00FF0000UL }
	ADDOPCRB[ch] field masks. More...
enum	ra8_addopcrb_avemd_t : uint8_t { k_ra8_avemd_off = 0x0U , k_ra8_avemd_add = 0x1U , k_ra8_avemd_average = 0x2U }
	ADDOPCRB.AVEMD encoding (per HUM Ch 53). More...
enum	ra8_addopcrb_adc_t : uint8_t { k_ra8_adc_avg_1x = 0x0U , k_ra8_adc_avg_2x = 0x1U , k_ra8_adc_avg_4x = 0x2U , k_ra8_adc_avg_8x = 0x3U , k_ra8_adc_avg_16x = 0x4U , k_ra8_adc_avg_64x = 0x6U }
	ADDOPCRB.ADC averaging-times encoding. More...
enum	ra8_adc_b_adexdr_sentinel_t : uint8_t { k_ra8_adc_b_adexdr_no_index = 0xFFU }
	Sentinel returned by ra8_adc_b_adexdr_index_for_chan for a CNVCS code that has no extended-data (ADEXDR) result slot. More...

Functions
static volatile uint32_t *	ra8_adc_b_adclkenr (void)
	Pointer to the 32-bit ADCLKENR register.
static volatile uint32_t *	ra8_adc_b_adclksr (void)
	Pointer to the 32-bit ADCLKSR register.
static volatile uint32_t *	ra8_adc_b_adclkcr (void)
	Pointer to the 32-bit ADCLKCR register.
static volatile uint32_t *	ra8_adc_b_admdr (void)
	Pointer to the 32-bit ADMDR register.
static volatile uint32_t *	ra8_adc_b_adsger (void)
	Pointer to the 32-bit ADSGER register (scan-group enable).
static volatile uint32_t *	ra8_adc_b_adintcr (void)
	Pointer to the 32-bit ADINTCR register (per-group scan-end IE).
static volatile uint32_t *	ra8_adc_b_adsystr (void)
	Pointer to the 32-bit ADSYSTR register (synchronous SW start).
static volatile uint32_t *	ra8_adc_b_adstopr (void)
	Pointer to the 32-bit ADSTOPR register (force-stop).
static volatile uint32_t *	ra8_adc_b_adsr (void)
	Pointer to the 32-bit ADSR register (status).
static volatile uint32_t *	ra8_adc_b_adchcr (uint8_t ch)
	Pointer to the per-virtual-channel ADCHCR register.
static volatile uint32_t *	ra8_adc_b_adstr (uint8_t group)
	Pointer to the per-scan-group ADSTR[n] register.
static volatile uint32_t *	ra8_adc_b_adtrgenr (void)
	Pointer to the 32-bit ADTRGENR register (per-group HW trigger enable).
static volatile uint32_t *	ra8_adc_b_adcmpenr (void)
	Pointer to the 32-bit ADCMPENR register (compare-table enable).
static volatile uint32_t *	ra8_adc_b_adcmpintcr (void)
	Pointer to the 32-bit ADCMPINTCR register (compare-match IE).
static volatile uint32_t *	ra8_adc_b_adcmpmdr (uint8_t which)
	Pointer to ADCMPMDR0 / ADCMPMDR1 (compare-table mode select).
static volatile uint32_t *	ra8_adc_b_adcmptbr (uint8_t table)
	Pointer to a per-table ADCMPTBR[n] register (low/high pair).
static volatile uint32_t *	ra8_adc_b_addopcrb (uint8_t ch)
	Pointer to the per-virtual-channel ADDOPCRB[n] register.
static volatile uint32_t *	ra8_adc_b_addr (uint8_t ch)
	Pointer to the per-virtual-channel ADDR[n] result register.
static volatile uint32_t *	ra8_adc_b_adsgdcr (uint8_t group)
	Pointer to the per-scan-group ADSGDCR[n] register (self-diagnosis).
static volatile uint32_t *	ra8_adc_b_addopcrc (uint8_t ch)
	Pointer to the per-virtual-channel ADDOPCRC[n] register.
static volatile uint32_t *	ra8_adc_b_adexdr (uint8_t n)
	Pointer to the ADEXDR[n] extended-analog result register.
static uint8_t	ra8_adc_b_adexdr_index_for_chan (uint8_t cnvcs)
	Map a CNVCS extended-channel code to its ADEXDR index.

Detailed Description

ADC16H (16-bit SAR) register layout for the Renesas RA8D2 / RA8P1.

Tag: [Ring 3 / HAL] {World: NS}

The RA8 ADC_B block is the ADC16H: a 16-bit SAR converter with two independent units (ADC0/ADC1) sharing one 0x2224-byte register window at 0x40338000. Conversion precision (10/12/14/16-bit) is a per-channel ADDOPCRCn.ADPRC data-format selection, not a unit-wide mode. The register window is byte-identical on the RA8D2 and RA8P1; the 16-bit range is the headline RA8P1 capability. The layout was re-derived against FSP R_ADC_B0_Type in ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7KA8D2KF_core0.h lines 20460-24938. The pre-RA8 ADCSR / ADANSA / ADCER / ADDRn layout does not exist on this part; the previous version of this header carried an invented bit map (CVEN, RESSEL, ADTRGMD, ADSCANMD, ADBUSY) that does not match silicon. All such fields have been removed.

Register subset modelled by this header (the ones the driver actually touches):

Offset	Name	Width	Purpose
0x0000	ADCLKENR	32	ADCLK enable (CLKEN[0])
0x0004	ADCLKSR	32	ADCLK status (CLKSR[0], RO)
0x0008	ADCLKCR	32	ADCLK source / divider
0x000C	ADSYCR	32	Synchronous-op control
0x0020	ADERINTCR	32	Conversion-error IE
0x0040	ADMDR	32	Per-unit mode (ADMD0[3:0],ADMD1[11:8])
0x0048	ADSGER	32	Scan-group enable (SGREn[8:0])
0x005C	ADINTCR	32	Per-group scan-end IE
0x0400	ADCMPENR	32	Compare-match enable (CMPENn[7:0])
0x0404	ADCMPINTCR	32	Compare-match IE (CMPIEn[3:0])
0x0448	ADCMPMDR0	32	CMPMD0..3 mode select (2b each)
0x044C	ADCMPMDR1	32	CMPMD4..7 mode select (2b each)
0x0458	ADCMPTBR[8]	32	(low,high) compare table, stride 4
0x0600	ADCHCR[24]	32	Per-channel config (stride 0x10)
0x0608	ADDOPCRB[24]	32	Per-channel AVEMD/CMPTBLEm (stride 0x10)
0x0C08	ADTRGENR	32	Trigger enable (STTRGENn[8:0])
0x0C10	ADSYSTR	32	Synchronous SW start (ADSYSTn[8:0])
0x0C20	ADSTR[9]	32	Per-group SW start (ADST[0])
0x0C60	ADSTOPR	32	Force stop (ADSTOP0[0],ADSTOP1[8])
0x0C80	ADSR	32	Status (ADACT0[0], ADACT1[1], RO)
0x2000	ADDR[23]	32	Conversion result (DATA[15:0],ERR[31])

The full FSP struct exposes ~200 registers (FIFO, calibration, compare, user gain/offset tables, sample-and-hold, etc.). They land here as new consumers ask for them.

On the host unit-test build the FW build maps these MMIO offsets onto an anonymous ra8_fake_mmap window so the same accessors work in tests as on silicon.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_adc_b_regs.h.

Enumeration Type Documentation

◆ ra8_adc_b_addr_t

enum ra8_adc_b_addr_t : uintptr_t

Memory-mapped base address of the ADC_B register window.

Enumerator
k_ra8_adc_b_base_addr	FSP R_ADC_B0_BASE.

Definition at line 78 of file ra8_adc_b_regs.h.

◆ ra8_adc_b_adexdr_sentinel_t

enum ra8_adc_b_adexdr_sentinel_t : uint8_t

Sentinel returned by ra8_adc_b_adexdr_index_for_chan for a CNVCS code that has no extended-data (ADEXDR) result slot.

Enumerator
k_ra8_adc_b_adexdr_no_index	CNVCS below the extended-channel base maps to no ADEXDR slot.

Definition at line 859 of file ra8_adc_b_regs.h.

◆ ra8_adc_b_ext_chan_base_t

enum ra8_adc_b_ext_chan_base_t : uint8_t

CNVCS base of the extended-analog block (ADEXDR index origin).

Enumerator
k_ra8_adc_b_ext_chan_base	ADEXDR index n = CNVCS - this.

Definition at line 280 of file ra8_adc_b_regs.h.

◆ ra8_adc_b_ext_chan_t

enum ra8_adc_b_ext_chan_t : uint8_t

CNVCS[6:0] codes for the internal / extended-analog channels.

HUM Ch 53.2.3.1 "ADCHCRn" Table p 3335: in addition to the external pins (AN000..AN022 == CNVCS 0x00..0x16) the converter can sample a set of on-chip "extended analog" sources. Their conversion results are read back from the matching ADEXDRn register (n = CNVCS - 0x60), NOT from the ordinary ADDR[n] result register (HUM Ch 53.2.13.2 p 3391).

See also: ra8_adc_b_adexdr_index_for_chan

Enumerator
k_ra8_adc_b_chan_selfdiag_adc0	Self-diagnosis A/D unit 0.
k_ra8_adc_b_chan_selfdiag_adc1	Self-diagnosis A/D unit 1.
k_ra8_adc_b_chan_temperature	On-chip temperature sensor.
k_ra8_adc_b_chan_int_ref_volt	Internal reference voltage.
k_ra8_adc_b_chan_vbatt_div6	VBATT 1/6 voltage monitor.
k_ra8_adc_b_chan_dac0	D/A converter channel 0.
k_ra8_adc_b_chan_dac1	D/A converter channel 1.

Definition at line 266 of file ra8_adc_b_regs.h.

◆ ra8_adc_b_limits_t

enum ra8_adc_b_limits_t : uint8_t

Channel counts, register strides, and array sizes.

The widest value is 0x10 (ADCHCR stride) so a uint8_t backing suffices. Loop variables driven by these limits should also be uint8_t to satisfy clang-tidy's bugprone-too-small-loop-variable.

Enumerator
k_ra8_adc_b_unit_count	Two independent ADC units (ADC0/ADC1).
k_ra8_adc_b_max_channels	ADCHCR0..23 virtual-channel config slots.
k_ra8_adc_b_result_regs	ADDR[0..22] result slots.
k_ra8_adc_b_scan_groups	ADSGER / ADTRGENR / ADSYSTR width [8:0].
k_ra8_adc_b_cmp_tables	ADCMPTBR0..7 / CMPMD0..7 / CMPENn[7:0].
k_ra8_adc_b_adchcr_stride	ADCHCRn occupies 16 bytes per slot.
k_ra8_adc_b_addr_stride	ADDR[n] is 4 bytes per slot.
k_ra8_adc_b_adstr_stride	ADSTR[n] is 4 bytes per slot.
k_ra8_adc_b_cmptbr_stride	ADCMPTBRn is 4 bytes per slot.
k_ra8_adc_b_adsgdcr_stride	ADSGDCRn is 4 bytes per slot.
k_ra8_adc_b_adexdr_stride	ADEXDRn is 4 bytes per slot.
k_ra8_adc_b_ext_data_regs	ADEXDR[0..22] extended-analog result slots.

Definition at line 91 of file ra8_adc_b_regs.h.

◆ ra8_adc_b_off_t

enum ra8_adc_b_off_t : uint16_t

Register offsets inside the ADC_B block (subset modelled).

Offsets follow FSP R_ADC_B0_Type. The full struct is 0x2224 bytes; only the registers exercised by the driver are listed.

Enumerator
k_ra8_adc_b_off_adclkenr	ADCLK Enable.
k_ra8_adc_b_off_adclksr	ADCLK Status (RO).
k_ra8_adc_b_off_adclkcr	ADCLK Control.
k_ra8_adc_b_off_adsycr	Synchronous Operation Control.
k_ra8_adc_b_off_aderintcr	Conversion Error IE.
k_ra8_adc_b_off_admdr	Per-unit Mode Selection.
k_ra8_adc_b_off_adsger	Scan-Group Enable.
k_ra8_adc_b_off_adintcr	Per-group Scan-End IE.
k_ra8_adc_b_off_adsgdcr0	ADSGDCR[0] scan-group self-diag.
k_ra8_adc_b_off_adcmpenr	Compare-Match Enable (CMPENn[7:0]).
k_ra8_adc_b_off_adcmpintcr	Compare-Match Interrupt Enable.
k_ra8_adc_b_off_adcmpmdr0	Compare-Match Mode CMPMD0..3.
k_ra8_adc_b_off_adcmpmdr1	Compare-Match Mode CMPMD4..7.
k_ra8_adc_b_off_adcmptbr0	ADCMPTBR[0] (low/high pair).
k_ra8_adc_b_off_adchcr0	ADCHCR[0] – per-channel config.
k_ra8_adc_b_off_addopcrb0	ADDOPCRB[0] – AVEMD/ADC/CMPTBLEm.
k_ra8_adc_b_off_addopcrc0	ADDOPCRC[0] – ADPRC/SIGNSEL.
k_ra8_adc_b_off_adtrgenr	Trigger Enable per group.
k_ra8_adc_b_off_adsystr	Synchronous SW Start.
k_ra8_adc_b_off_adstr0	ADSTR[0] per-group SW start.
k_ra8_adc_b_off_adstopr	Force Stop.
k_ra8_adc_b_off_adsr	Conversion Status (RO).
k_ra8_adc_b_off_addr0	ADDR[0] – conversion results.
k_ra8_adc_b_off_adexdr0	ADEXDR[0] – extended-analog result.

Definition at line 114 of file ra8_adc_b_regs.h.

◆ ra8_adchcr_ainmd_t

enum ra8_adchcr_ainmd_t : uint8_t

ADCHCRn.AINMD analog-input-mode codes (HUM Ch 53.2.3.1 p 3336).

Selects single-ended vs differential conversion for the virtual channel. The self-diagnosis channel (CNVCS = 0x60 / 0x61) MUST use differential input (HUM Ch 53.2.3.1 p 3336 Note 1, p 3335).

Enumerator
k_ra8_adchcr_ainmd_single_ended	Single-ended input.
k_ra8_adchcr_ainmd_differential	Differential input.

Definition at line 247 of file ra8_adc_b_regs.h.

◆ ra8_adchcr_bit_t

enum ra8_adchcr_bit_t : uint8_t

ADCHCRn bit positions (per virtual-channel config).

Each ADCHCRn (one per virtual channel 0..23) selects:

SGSEL[4:0] scan-group membership
CNVCS[14:8] physical analog channel number
AINMD[15] differential vs single-ended
SSTSEL[19:16] sampling-state-table selection

These four fields fully describe the channel; resolution is controlled at the unit level via ADMDR, not per channel.

Enumerator
k_ra8_adchcr_bit_sgsel	Scan group selection.
k_ra8_adchcr_bit_cnvcs	Physical channel selection.
k_ra8_adchcr_bit_ainmd	Analog input mode (single/diff).
k_ra8_adchcr_bit_sstsel	Sampling-state table selection.

Definition at line 220 of file ra8_adc_b_regs.h.

◆ ra8_adchcr_mask_t

enum ra8_adchcr_mask_t : uint32_t

ADCHCRn bit masks.

Enumerator
k_ra8_adchcr_mask_sgsel	[4:0]
k_ra8_adchcr_mask_cnvcs	[14:8]
k_ra8_adchcr_mask_ainmd	[15]
k_ra8_adchcr_mask_sstsel	[19:16]

Definition at line 231 of file ra8_adc_b_regs.h.

◆ ra8_adclkenr_bit_t

enum ra8_adclkenr_bit_t : uint8_t

ADCLKENR bit positions.

Enumerator
k_ra8_adclkenr_bit_clken	ADCLK enable.

Definition at line 145 of file ra8_adc_b_regs.h.

◆ ra8_adclkenr_mask_t

enum ra8_adclkenr_mask_t : uint32_t

ADCLKENR bit masks.

Enumerator
k_ra8_adclkenr_mask_clken	RA8 adclkenr mask clken.

Definition at line 153 of file ra8_adc_b_regs.h.

◆ ra8_adclksr_mask_t

enum ra8_adclksr_mask_t : uint32_t

ADCLKSR bit masks (RO clock-running flag).

Enumerator
k_ra8_adclksr_mask_clksr	RA8 adclksr mask clksr.

Definition at line 161 of file ra8_adc_b_regs.h.

◆ ra8_adcmpenr_mask_t

enum ra8_adcmpenr_mask_t : uint32_t

ADCMPENR compare-table enable mask (CMPENn[7:0]).

Enumerator
k_ra8_adcmpenr_mask_cmpen	RA8 adcmpenr mask cmpen.

Definition at line 460 of file ra8_adc_b_regs.h.

◆ ra8_adcmpmd_layout_t

enum ra8_adcmpmd_layout_t : uint8_t

CMPMDn field layout inside ADCMPMDR0 / ADCMPMDR1.

Each register packs four 2-bit CMPMD fields at byte boundaries. Bit position for table N is (N % 4) * 8.

Enumerator
k_ra8_adcmpmd_field_width	Each CMPMDn occupies 2 bits.
k_ra8_adcmpmd_field_step	Stride between CMPMDn fields.
k_ra8_adcmpmd_per_reg	Four CMPMDn per ADCMPMDR.

Definition at line 501 of file ra8_adc_b_regs.h.

◆ ra8_adcmpmd_t

enum ra8_adcmpmd_t : uint8_t

CMPMDn 2-bit window-mode codes (per HUM Ch 53).

Enumerator
k_ra8_adcmpmd_disabled	Compare match disabled.
k_ra8_adcmpmd_inside	Match when low <= data <= high.
k_ra8_adcmpmd_outside	Match when data < low OR data > high.
k_ra8_adcmpmd_greater_eq	Match when data >= high (single-sided).

Definition at line 486 of file ra8_adc_b_regs.h.

◆ ra8_adcmptbr_bit_t

enum ra8_adcmptbr_bit_t : uint8_t

ADCMPTBRn (low,high) packed-pair bit positions.

Enumerator
k_ra8_adcmptbr_bit_low	Low-side window level [15:0].
k_ra8_adcmptbr_bit_high	High-side window level [31:16].

Definition at line 468 of file ra8_adc_b_regs.h.

◆ ra8_adcmptbr_mask_t

enum ra8_adcmptbr_mask_t : uint32_t

ADCMPTBRn field masks (low + high 16-bit thresholds).

Enumerator
k_ra8_adcmptbr_mask_low	RA8 adcmptbr mask low.
k_ra8_adcmptbr_mask_high	RA8 adcmptbr mask high.

Definition at line 477 of file ra8_adc_b_regs.h.

◆ ra8_addopcrb_adc_t

enum ra8_addopcrb_adc_t : uint8_t

ADDOPCRB.ADC averaging-times encoding.

Enumerator
k_ra8_adc_avg_1x	RA8 ADC avg 1x.
k_ra8_adc_avg_2x	RA8 ADC avg 2x.
k_ra8_adc_avg_4x	RA8 ADC avg 4x.
k_ra8_adc_avg_8x	RA8 ADC avg 8x.
k_ra8_adc_avg_16x	RA8 ADC avg 16x.
k_ra8_adc_avg_64x	RA8 ADC avg 64x.

Definition at line 546 of file ra8_adc_b_regs.h.

◆ ra8_addopcrb_avemd_t

enum ra8_addopcrb_avemd_t : uint8_t

ADDOPCRB.AVEMD encoding (per HUM Ch 53).

Enumerator
k_ra8_avemd_off	Disabled (single-sample).
k_ra8_avemd_add	Sum N samples.
k_ra8_avemd_average	Sum then divide by N.

Definition at line 536 of file ra8_adc_b_regs.h.

◆ ra8_addopcrb_bit_t

enum ra8_addopcrb_bit_t : uint8_t

ADDOPCRB[ch] bit positions (per-channel oversampling + cmp enable).

AVEMD[1:0] addition / averaging mode (off / add / avg / mix)
ADC[11:8] averaging-times selection (1x / 2x / 4x / 8x / 16x...)
CMPTBLEm[23:16] per-channel compare-table enable mask

Enumerator
k_ra8_addopcrb_bit_avemd	RA8 addopcrb bit avemd.
k_ra8_addopcrb_bit_adc	RA8 addopcrb bit ADC.
k_ra8_addopcrb_bit_cmptblem	RA8 addopcrb bit cmptblem.

Definition at line 516 of file ra8_adc_b_regs.h.

◆ ra8_addopcrb_mask_t

enum ra8_addopcrb_mask_t : uint32_t

ADDOPCRB[ch] field masks.

Enumerator
k_ra8_addopcrb_mask_avemd	[1:0]
k_ra8_addopcrb_mask_adc	[11:8]
k_ra8_addopcrb_mask_cmptblem	[23:16]

Definition at line 526 of file ra8_adc_b_regs.h.

◆ ra8_addopcrc_adprc_t

enum ra8_addopcrc_adprc_t : uint8_t

ADDOPCRCn.ADPRC[1:0] data-format codes (HUM Ch 53.2.3.4 p 3339).

Self-diagnosis REQUIRES the 16-bit data format (HUM Ch 53.3.11.3 p 3414 "Notes on data format during self-diagnosis").

Enumerator
k_ra8_addopcrc_adprc_16bit	16-bit data.
k_ra8_addopcrc_adprc_14bit	14-bit data.
k_ra8_addopcrc_adprc_12bit	12-bit data.
k_ra8_addopcrc_adprc_10bit	10-bit data.

Definition at line 343 of file ra8_adc_b_regs.h.

◆ ra8_addopcrc_bit_t

enum ra8_addopcrc_bit_t : uint8_t

ADDOPCRCn bit positions (HUM Ch 53.2.3.4 p 3339).

Enumerator
k_ra8_addopcrc_bit_adprc	Data-format select [17:16].
k_ra8_addopcrc_bit_signsel	Signed/unsigned select [20].

Definition at line 321 of file ra8_adc_b_regs.h.

◆ ra8_addopcrc_mask_t

enum ra8_addopcrc_mask_t : uint32_t

ADDOPCRCn bit masks (HUM Ch 53.2.3.4 p 3339).

Enumerator
k_ra8_addopcrc_mask_adprc	ADPRC[1:0].
k_ra8_addopcrc_mask_signsel	SIGNSEL.

Definition at line 330 of file ra8_adc_b_regs.h.

◆ ra8_addopcrc_signsel_t

enum ra8_addopcrc_signsel_t : uint8_t

ADDOPCRCn.SIGNSEL data-sign codes (HUM Ch 53.2.3.4 p 3340).

Self-diagnosis REQUIRES the signed data format (SIGNSEL = 0) so the mode-2 / mode-3 expected values (0x8000 / 0x7FFF) read back correctly (HUM Ch 53.2.3.4 p 3340, Table 53.19 p 3412).

Enumerator
k_ra8_addopcrc_signsel_signed	Signed data format.
k_ra8_addopcrc_signsel_unsigned	Unsigned data format.

Definition at line 359 of file ra8_adc_b_regs.h.

◆ ra8_addr_mask_t

enum ra8_addr_mask_t : uint32_t

ADDR[n] result-register field masks.

Enumerator
k_ra8_addr_mask_data	[15:0] conversion data.
k_ra8_addr_mask_err	[31] conversion error flag.

Definition at line 443 of file ra8_adc_b_regs.h.

◆ ra8_adexdr_bit_t

enum ra8_adexdr_bit_t : uint8_t

ADEXDRn bit positions (HUM Ch 53.2.13.2 p 3391).

Enumerator
k_ra8_adexdr_bit_diagsr	Self-diagnosis status [26:24].
k_ra8_adexdr_bit_err	A/D conversion error status.

Definition at line 368 of file ra8_adc_b_regs.h.

◆ ra8_adexdr_mask_t

enum ra8_adexdr_mask_t : uint32_t

ADEXDRn field masks (HUM Ch 53.2.13.2 p 3391).

Enumerator
k_ra8_adexdr_mask_data	DATA[15:0] conversion result.
k_ra8_adexdr_mask_diagsr	DIAGSR[2:0] diagnosis status.
k_ra8_adexdr_mask_err	ERR conversion-error flag.

Definition at line 377 of file ra8_adc_b_regs.h.

◆ ra8_admdr_bit_t

enum ra8_admdr_bit_t : uint8_t

ADMDR bit positions (per-unit mode).

ADMDR holds two 4-bit per-unit "mode" fields: ADMD0[3:0] for ADC0 and ADMD1[11:8] for ADC1. The encoding is silicon-defined by the HUM and selects between single-shot, continuous, group scan, and synchronous modes.

Enumerator
k_ra8_admdr_bit_admd0	ADC0 mode select [3:0].
k_ra8_admdr_bit_admd1	ADC1 mode select [11:8].

Definition at line 175 of file ra8_adc_b_regs.h.

◆ ra8_admdr_mask_t

enum ra8_admdr_mask_t : uint32_t

ADMDR bit masks.

Enumerator
k_ra8_admdr_mask_admd0	ADMD0 [3:0].
k_ra8_admdr_mask_admd1	ADMD1 [11:8].

Definition at line 184 of file ra8_adc_b_regs.h.

◆ ra8_admdr_mode_t

enum ra8_admdr_mode_t : uint8_t

ADMDR per-unit mode codes (subset of HUM Ch 53 ADMD0/1 table).

The HUM enumerates 16 codes; this driver uses single-shot (0x0) for the default polling read-channel path and one-cycle scan (0x1) when the caller requests scan mode. The remaining codes (continuous, multi-trigger, group-scan, etc.) land here as future consumers need them.

Enumerator
k_ra8_admdr_mode_disabled	Unit disabled / single-shot SW.
k_ra8_admdr_mode_one_cycle	Single-shot scan, one cycle.
k_ra8_admdr_mode_continuous	Continuous-scan repeating.

Definition at line 200 of file ra8_adc_b_regs.h.

◆ ra8_adsgdcr_bit_t

enum ra8_adsgdcr_bit_t : uint8_t

ADSGDCRn bit positions (HUM Ch 53.2.4.1 p 3340).

Enumerator
k_ra8_adsgdcr_bit_diagval	Self-diagnosis mode select [2:0].

Definition at line 288 of file ra8_adc_b_regs.h.

◆ ra8_adsgdcr_diag_t

enum ra8_adsgdcr_diag_t : uint8_t

ADSGDCRn.DIAGVAL[2:0] self-diagnosis mode codes.

HUM Ch 53.2.4.1 p 3340: 000b disables diagnosis on the scan group (prohibited if a virtual channel selects the self-diagnosis channel), 100b/101b/110b request self-diagnosis modes 1/2/3. The expected conversion results are tabulated in HUM Table 53.19 p 3412.

Enumerator
k_ra8_adsgdcr_diag_off	No self-diagnosis channel.
k_ra8_adsgdcr_diag_mode1	Mode 1: zero differential (0x0000).
k_ra8_adsgdcr_diag_mode2	Mode 2: negative FS (0x8000).
k_ra8_adsgdcr_diag_mode3	Mode 3: positive FS (0x7FFF).

Definition at line 310 of file ra8_adc_b_regs.h.

◆ ra8_adsgdcr_mask_t

enum ra8_adsgdcr_mask_t : uint32_t

ADSGDCRn bit masks (HUM Ch 53.2.4.1 p 3340).

Enumerator
k_ra8_adsgdcr_mask_diagval	DIAGVAL[2:0].

Definition at line 296 of file ra8_adc_b_regs.h.

◆ ra8_adsger_mask_t

enum ra8_adsger_mask_t : uint32_t

ADSGER scan-group-enable mask (SGREn[8:0]).

Enumerator
k_ra8_adsger_mask_sgren	RA8 adsger mask sgren.

Definition at line 387 of file ra8_adc_b_regs.h.

◆ ra8_adsr_bit_t

enum ra8_adsr_bit_t : uint8_t

ADSR bit positions (busy / calibration flags, RO).

Enumerator
k_ra8_adsr_bit_adact0	ADC0 conversion in progress.
k_ra8_adsr_bit_adact1	ADC1 conversion in progress.
k_ra8_adsr_bit_calact0	ADC0 calibration in progress.
k_ra8_adsr_bit_calact1	ADC1 calibration in progress.

Definition at line 411 of file ra8_adc_b_regs.h.

◆ ra8_adsr_mask_t

enum ra8_adsr_mask_t : uint32_t

ADSR bit masks.

Enumerator
k_ra8_adsr_mask_adact0	RA8 adsr mask adact0.
k_ra8_adsr_mask_adact1	RA8 adsr mask adact1.
k_ra8_adsr_mask_adact	Either unit busy.
k_ra8_adsr_mask_calact0	RA8 adsr mask calact0.
k_ra8_adsr_mask_calact1	RA8 adsr mask calact1.

Definition at line 422 of file ra8_adc_b_regs.h.

◆ ra8_adstopr_mask_t

enum ra8_adstopr_mask_t : uint32_t

ADSTOPR force-stop bit masks.

Enumerator
k_ra8_adstopr_mask_adstop0	[0]
k_ra8_adstopr_mask_adstop1	[8]

Definition at line 434 of file ra8_adc_b_regs.h.

◆ ra8_adstr_mask_t

enum ra8_adstr_mask_t : uint32_t

ADSTR[n] per-group SW start mask (ADST[0]).

Enumerator
k_ra8_adstr_mask_adst	RA8 adstr mask adst.

Definition at line 403 of file ra8_adc_b_regs.h.

◆ ra8_adsystr_mask_t

enum ra8_adsystr_mask_t : uint32_t

ADSYSTR synchronous SW start mask (ADSYSTn[8:0]).

Enumerator
k_ra8_adsystr_mask_adsystn	RA8 adsystr mask adsystn.

Definition at line 395 of file ra8_adc_b_regs.h.

◆ ra8_adtrgenr_mask_t

enum ra8_adtrgenr_mask_t : uint32_t

ADTRGENR per-group hardware-trigger enable mask (STTRGENn[8:0]).

Enumerator
k_ra8_adtrgenr_mask_sttrgen	RA8 adtrgenr mask sttrgen.

Definition at line 452 of file ra8_adc_b_regs.h.

Function Documentation

◆ ra8_adc_b_adchcr()

volatile uint32_t * ra8_adc_b_adchcr ( uint8_t ch )

inlinestatic

Pointer to the per-virtual-channel ADCHCR register.

Parameters

[in] ch Virtual channel index (0..23).

Returns: Volatile pointer, or nullptr if ch is out of range.

Definition at line 658 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adchcr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_max_channels, and k_ra8_adc_b_off_adchcr0.

Referenced by internal_program_channel(), internal_program_ext_channel(), internal_program_group_channels(), internal_zero_channel_table(), and ra8_adc_read_channel().

◆ ra8_adc_b_adclkcr()

volatile uint32_t * ra8_adc_b_adclkcr ( void )

inlinestatic

Pointer to the 32-bit ADCLKCR register.

Returns: Volatile pointer to ADCLKCR (RW).

Definition at line 582 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adclkcr.

Referenced by internal_clock_bring_up().

◆ ra8_adc_b_adclkenr()

volatile uint32_t * ra8_adc_b_adclkenr ( void )

inlinestatic

Pointer to the 32-bit ADCLKENR register.

Returns: Volatile pointer to ADCLKENR (RW).

Definition at line 560 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adclkenr.

Referenced by internal_clock_bring_up(), and ra8_adc_deinit().

◆ ra8_adc_b_adclksr()

volatile uint32_t * ra8_adc_b_adclksr ( void )

inlinestatic

Pointer to the 32-bit ADCLKSR register.

Returns: Volatile pointer to ADCLKSR (RO clock-running status).

Definition at line 571 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adclksr.

Referenced by internal_wait_clksr().

◆ ra8_adc_b_adcmpenr()

volatile uint32_t * ra8_adc_b_adcmpenr ( void )

inlinestatic

Pointer to the 32-bit ADCMPENR register (compare-table enable).

Returns: Volatile pointer to ADCMPENR (RW).

Definition at line 701 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adcmpenr.

Referenced by ra8_adc_deinit(), and ra8_adc_set_compare_window().

◆ ra8_adc_b_adcmpintcr()

volatile uint32_t * ra8_adc_b_adcmpintcr ( void )

inlinestatic

Pointer to the 32-bit ADCMPINTCR register (compare-match IE).

Returns: Volatile pointer to ADCMPINTCR (RW).

Definition at line 712 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adcmpintcr.

Referenced by ra8_adc_deinit().

◆ ra8_adc_b_adcmpmdr()

volatile uint32_t * ra8_adc_b_adcmpmdr ( uint8_t which )

inlinestatic

Pointer to ADCMPMDR0 / ADCMPMDR1 (compare-table mode select).

Parameters

[in] which 0 -> ADCMPMDR0 (CMPMD0..3), 1 -> ADCMPMDR1 (CMPMD4..7).

Returns: Volatile pointer, or nullptr if which is out of range.

Definition at line 725 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, k_ra8_adc_b_off_adcmpmdr0, and k_ra8_adc_b_off_adcmpmdr1.

Referenced by ra8_adc_set_compare_window().

◆ ra8_adc_b_adcmptbr()

volatile uint32_t * ra8_adc_b_adcmptbr ( uint8_t table )

inlinestatic

Pointer to a per-table ADCMPTBR[n] register (low/high pair).

Parameters

[in] table Table index (0..7).

Returns: Volatile pointer or nullptr if table is out of range.

Definition at line 745 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, k_ra8_adc_b_cmp_tables, k_ra8_adc_b_cmptbr_stride, and k_ra8_adc_b_off_adcmptbr0.

Referenced by ra8_adc_set_compare_window().

◆ ra8_adc_b_addopcrb()

volatile uint32_t * ra8_adc_b_addopcrb ( uint8_t ch )

inlinestatic

Pointer to the per-virtual-channel ADDOPCRB[n] register.

ADDOPCRB shares the 16-byte ADCHCR slot stride; channel ch maps to addopcrb0 + ch*16 (the per-channel data-operation control B register holds AVEMD averaging mode, ADC averaging-times, and CMPTBLEm).

Parameters

[in] ch Virtual channel index (0..23).

Returns: Volatile pointer or nullptr if ch is out of range.

Definition at line 767 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adchcr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_max_channels, and k_ra8_adc_b_off_addopcrb0.

Referenced by ra8_adc_set_compare_window(), and ra8_adc_set_oversampling().

◆ ra8_adc_b_addopcrc()

volatile uint32_t * ra8_adc_b_addopcrc ( uint8_t ch )

inlinestatic

Pointer to the per-virtual-channel ADDOPCRC[n] register.

ADDOPCRC shares the 16-byte ADCHCR slot stride; channel ch maps to addopcrc0 + ch*16 (this register holds ADPRC data-format and SIGNSEL sign-format, HUM Ch 53.2.3.4 p 3339).

Parameters

[in] ch Virtual channel index (0..23).

Returns: Volatile pointer, or nullptr if ch is out of range.

Definition at line 825 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adchcr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_max_channels, and k_ra8_adc_b_off_addopcrc0.

Referenced by internal_set_data_format(), and internal_write_adprc().

◆ ra8_adc_b_addr()

volatile uint32_t * ra8_adc_b_addr ( uint8_t ch )

inlinestatic

Pointer to the per-virtual-channel ADDR[n] result register.

Parameters

[in] ch Virtual channel index (0..22).

Returns: Volatile pointer to the 32-bit result slot, or nullptr if ch is out of range. ADDR[23] does not exist on this silicon – the FSP struct only declares 23 result slots.

Definition at line 786 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_addr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_off_addr0, and k_ra8_adc_b_result_regs.

Referenced by ra8_adc_dispatch_cnv_end(), ra8_adc_read_channel(), and ra8_adc_read_group_results().

◆ ra8_adc_b_adexdr()

volatile uint32_t * ra8_adc_b_adexdr ( uint8_t n )

inlinestatic

Pointer to the ADEXDR[n] extended-analog result register.

Parameters

[in] n Extended-analog data-register index (0..22). Only a subset (0,1,4,5,6,8,9,16..18,20..22) is populated by silicon (HUM Ch 53.2.13.2 p 3391); the others read 0.

Returns: Volatile pointer, or nullptr if n is out of range.

Definition at line 844 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adexdr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_ext_data_regs, and k_ra8_adc_b_off_adexdr0.

Referenced by ra8_adc_read_internal_channel(), and ra8_adc_self_diagnose().

◆ ra8_adc_b_adexdr_index_for_chan()

uint8_t ra8_adc_b_adexdr_index_for_chan ( uint8_t cnvcs )

inlinestatic

Map a CNVCS extended-channel code to its ADEXDR index.

The ADEXDR result-register index equals CNVCS - 0x60 (HUM Ch 53.2.13.2 p 3391): e.g. temperature sensor CNVCS = 0x64 -> ADEXDR4.

Parameters

[in] cnvcs CNVCS[6:0] code (must be >= k_ra8_adc_b_ext_chan_base).

Returns: ADEXDR index, or k_ra8_adc_b_adexdr_no_index if cnvcs is below the extended-channel base (which ra8_adc_b_adexdr then rejects).

Return values

k_ra8_adc_b_adexdr_no_index	`cnvcs` is below the extended-channel base and has no ADEXDR result slot.
other	The zero-based ADEXDR index (cnvcs - k_ra8_adc_b_ext_chan_base) for a valid extended-channel code.

Precondition: cnvcs holds a 7-bit CNVCS code (bits [6:0] meaningful).; k_ra8_adc_b_ext_chan_base is the first extended-channel CNVCS value.

Postcondition: The result is k_ra8_adc_b_adexdr_no_index exactly when cnvcs is below the extended-channel base.; No hardware or module state is read or modified (pure computation).

Note: Thread-safe: pure function over its argument with no shared state.

Since: 0.1.0

Definition at line 889 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adexdr_no_index, and k_ra8_adc_b_ext_chan_base.

Referenced by ra8_adc_read_internal_channel().

◆ ra8_adc_b_adintcr()

volatile uint32_t * ra8_adc_b_adintcr ( void )

inlinestatic

Pointer to the 32-bit ADINTCR register (per-group scan-end IE).

Returns: Volatile pointer to ADINTCR (RW).

Definition at line 613 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adintcr.

Referenced by ra8_adc_deinit(), ra8_adc_get_status(), ra8_adc_init(), and ra8_adc_init_configured().

◆ ra8_adc_b_admdr()

volatile uint32_t * ra8_adc_b_admdr ( void )

inlinestatic

Pointer to the 32-bit ADMDR register.

Returns: Volatile pointer to ADMDR (RW per-unit mode).

Definition at line 593 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_admdr.

Referenced by ra8_adc_deinit(), ra8_adc_enter_stop(), ra8_adc_init(), ra8_adc_init_configured(), and ra8_adc_set_continuous_scan().

◆ ra8_adc_b_adsgdcr()

volatile uint32_t * ra8_adc_b_adsgdcr ( uint8_t group )

inlinestatic

Pointer to the per-scan-group ADSGDCR[n] register (self-diagnosis).

Parameters

[in] group Scan-group index (0..8).

Returns: Volatile pointer to ADSGDCR[group], or nullptr if group is out of range (HUM Ch 53.2.4.1 p 3340).

Definition at line 803 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adsgdcr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_off_adsgdcr0, and k_ra8_adc_b_scan_groups.

Referenced by internal_selfdiag_run().

◆ ra8_adc_b_adsger()

volatile uint32_t * ra8_adc_b_adsger ( void )

inlinestatic

Pointer to the 32-bit ADSGER register (scan-group enable).

Returns: Volatile pointer to ADSGER (RW).

Definition at line 603 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adsger.

Referenced by internal_apply_group_enable(), internal_selfdiag_run(), ra8_adc_deinit(), ra8_adc_init(), ra8_adc_init_configured(), and ra8_adc_read_internal_channel().

◆ ra8_adc_b_adsr()

volatile uint32_t * ra8_adc_b_adsr ( void )

inlinestatic

Pointer to the 32-bit ADSR register (status).

Returns: Volatile pointer to ADSR (RO).

Definition at line 646 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adsr.

Referenced by internal_start_and_wait(), ra8_adc_clear_status(), ra8_adc_get_status(), and ra8_adc_read_channel().

◆ ra8_adc_b_adstopr()

volatile uint32_t * ra8_adc_b_adstopr ( void )

inlinestatic

Pointer to the 32-bit ADSTOPR register (force-stop).

Returns: Volatile pointer to ADSTOPR (WO).

Definition at line 635 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adstopr.

Referenced by ra8_adc_clear_status(), ra8_adc_deinit(), and ra8_adc_stop_group().

◆ ra8_adc_b_adstr()

volatile uint32_t * ra8_adc_b_adstr ( uint8_t group )

inlinestatic

Pointer to the per-scan-group ADSTR[n] register.

Parameters

[in] group Scan-group index (0..8).

Returns: Volatile pointer to ADSTR[group], or nullptr if group is out of range.

Definition at line 676 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_adstr_stride, k_ra8_adc_b_base_addr, k_ra8_adc_b_off_adstr0, and k_ra8_adc_b_scan_groups.

Referenced by internal_start_and_wait(), ra8_adc_read_channel(), ra8_adc_start_group(), and ra8_adc_stop_group().

◆ ra8_adc_b_adsystr()

volatile uint32_t * ra8_adc_b_adsystr ( void )

inlinestatic

Pointer to the 32-bit ADSYSTR register (synchronous SW start).

Returns: Volatile pointer to ADSYSTR (WO).

Definition at line 624 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adsystr.

◆ ra8_adc_b_adtrgenr()

volatile uint32_t * ra8_adc_b_adtrgenr ( void )

inlinestatic

Pointer to the 32-bit ADTRGENR register (per-group HW trigger enable).

Returns: Volatile pointer to ADTRGENR (RW).

Definition at line 690 of file ra8_adc_b_regs.h.

References k_ra8_adc_b_base_addr, and k_ra8_adc_b_off_adtrgenr.

Referenced by internal_apply_group_enable(), and ra8_adc_deinit().

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ ra8_adc_b_addr_t

◆ ra8_adc_b_adexdr_sentinel_t

◆ ra8_adc_b_ext_chan_base_t

◆ ra8_adc_b_ext_chan_t

◆ ra8_adc_b_limits_t

◆ ra8_adc_b_off_t

◆ ra8_adchcr_ainmd_t

◆ ra8_adchcr_bit_t

◆ ra8_adchcr_mask_t

◆ ra8_adclkenr_bit_t

◆ ra8_adclkenr_mask_t

◆ ra8_adclksr_mask_t

◆ ra8_adcmpenr_mask_t

◆ ra8_adcmpmd_layout_t

◆ ra8_adcmpmd_t

◆ ra8_adcmptbr_bit_t

◆ ra8_adcmptbr_mask_t

◆ ra8_addopcrb_adc_t

◆ ra8_addopcrb_avemd_t

◆ ra8_addopcrb_bit_t

◆ ra8_addopcrb_mask_t

◆ ra8_addopcrc_adprc_t

◆ ra8_addopcrc_bit_t

◆ ra8_addopcrc_mask_t

◆ ra8_addopcrc_signsel_t

◆ ra8_addr_mask_t

◆ ra8_adexdr_bit_t

◆ ra8_adexdr_mask_t

◆ ra8_admdr_bit_t

◆ ra8_admdr_mask_t

◆ ra8_admdr_mode_t

◆ ra8_adsgdcr_bit_t

◆ ra8_adsgdcr_diag_t

◆ ra8_adsgdcr_mask_t

◆ ra8_adsger_mask_t

◆ ra8_adsr_bit_t

◆ ra8_adsr_mask_t

◆ ra8_adstopr_mask_t

◆ ra8_adstr_mask_t

◆ ra8_adsystr_mask_t

◆ ra8_adtrgenr_mask_t

Function Documentation

◆ ra8_adc_b_adchcr()

◆ ra8_adc_b_adclkcr()

◆ ra8_adc_b_adclkenr()

◆ ra8_adc_b_adclksr()

◆ ra8_adc_b_adcmpenr()

◆ ra8_adc_b_adcmpintcr()

◆ ra8_adc_b_adcmpmdr()

◆ ra8_adc_b_adcmptbr()

◆ ra8_adc_b_addopcrb()

◆ ra8_adc_b_addopcrc()

◆ ra8_adc_b_addr()

◆ ra8_adc_b_adexdr()

◆ ra8_adc_b_adexdr_index_for_chan()

◆ ra8_adc_b_adintcr()

◆ ra8_adc_b_admdr()

◆ ra8_adc_b_adsgdcr()

◆ ra8_adc_b_adsger()

◆ ra8_adc_b_adsr()

◆ ra8_adc_b_adstopr()

◆ ra8_adc_b_adstr()

◆ ra8_adc_b_adsystr()

◆ ra8_adc_b_adtrgenr()