57typedef enum : uintptr_t {
66typedef enum : uint16_t {
80typedef enum : uint8_t {
106typedef enum : uint32_t {
136typedef enum : uint8_t {
153typedef enum : uint16_t {
171typedef enum : uint32_t {
210 const uintptr_t base =
Annotation-attribute framework macros for ra8-firmware.
#define RA8_HW_REGISTER_ACCESS
Mark an MMIO accessor function (returns volatile register pointer).
ra8_cnecc_limits_t
Instance count and per-instance stride.
@ k_ra8_cnecc_ead_max
Largest valid ECEAD[9:0].
@ k_ra8_cnecc_instance_count
ECCMB0 + ECCMB1.
@ k_ra8_cnecc_stride
Bytes between instances.
static volatile r_cnecc_regs_t * ra8_cnecc(uint8_t instance)
Get pointer to CNECC instance instance.
ra8_cnecc_tmc_bit_t
EC710TMC bit positions (16-bit register).
@ k_ra8_cnecc_bit_etma0
ETMA[1:0] write-trigger lo.
@ k_ra8_cnecc_bit_ecdcs
ECDCS decoder input source (R/W).
@ k_ra8_cnecc_bit_etma1
ETMA[1:0] write-trigger hi.
@ k_ra8_cnecc_bit_ectmce
ECTMCE test-mode enable (R/W).
ra8_cnecc_addr_t
Memory-mapped base addresses for the two CNECC instances.
@ k_ra8_cnecc1_base_addr
ECCMB1 (CAN1 MRAM).
@ k_ra8_cnecc0_base_addr
ECCMB0 (CAN0 MRAM).
ra8_cnecc_ctl_bit_t
EC710CTL bit positions.
@ k_ra8_cnecc_bit_ec1ecp
1-bit-error correction permission (R/W).
@ k_ra8_cnecc_bit_ecovff
Address-capture overflow flag (R).
@ k_ra8_cnecc_bit_ecemf
Present-cycle ECC error flag (R).
@ k_ra8_cnecc_bit_emca0
EMCA[1:0] write-trigger lo (R/W).
@ k_ra8_cnecc_bit_ecer1c
Write-1 to clear ECER1F (R/W).
@ k_ra8_cnecc_bit_ecdedf0
2-bit error address captured flag (R).
@ k_ra8_cnecc_bit_ec1edic
1-bit error IRQ enable (R/W).
@ k_ra8_cnecc_bit_ecervf
Error judgment enable (R/W, EMCA-gated).
@ k_ra8_cnecc_bit_ecer2c
Write-1 to clear ECER2F (R/W).
@ k_ra8_cnecc_bit_ecsedf0
1-bit error address captured flag (R).
@ k_ra8_cnecc_bit_ec2edic
2-bit error IRQ enable (R/W).
@ k_ra8_cnecc_bit_emca1
EMCA[1:0] write-trigger hi (R/W).
@ k_ra8_cnecc_bit_ecer1f
1-bit error latched (R).
@ k_ra8_cnecc_bit_ecer2f
2-bit error latched (R).
ra8_cnecc_ead_mask_t
EC710EAD0 field mask (10-bit RAM offset).
@ k_ra8_cnecc_mask_ecead
ECEAD[9:0].
@ k_ra8_cnecc_mask_ead_reserved
Bits [31:10] always 0.
ra8_cnecc_tmc_mask_t
EC710TMC bit masks (16-bit register).
@ k_ra8_cnecc_mask_etma
ETMA[1:0] @ [15:14].
@ k_ra8_cnecc_mask_ectmce
ECTMCE test-mode enable.
@ k_ra8_cnecc_mask_test_subst
Figure 42.2 "Use ECEDB".
@ k_ra8_cnecc_mask_ecdcs
ECDCS decoder input select.
@ k_ra8_cnecc_mask_test_enable
Figure 42.2 "Enable test".
@ k_ra8_cnecc_mask_etma_unlock
ETMA = 10b -> unlock ECTMCE.
@ k_ra8_cnecc_mask_test_disable
Figure 42.2 "Disable test".
ra8_cnecc_ctl_mask_t
EC710CTL bit masks (32-bit register).
@ k_ra8_cnecc_mask_ecovff
ECOVFF overflow.
@ k_ra8_cnecc_mask_ecemf
ECEMF.
@ k_ra8_cnecc_mask_ecer1f
ECER1F.
@ k_ra8_cnecc_mask_status_all
ECER1F|ECER2F|ECOVFF|ECSEDF0|ECDEDF0.
@ k_ra8_cnecc_mask_ec1ecp
EC1ECP.
@ k_ra8_cnecc_mask_ecer1c
ECER1C (write-1-clear).
@ k_ra8_cnecc_mask_ctl_writable
Bits we may legally write (excludes RO + reserved).
@ k_ra8_cnecc_mask_ecer2c
ECER2C (write-1-clear).
@ k_ra8_cnecc_mask_emca_unlock
EMCA = 01b -> unlock ECERVF.
@ k_ra8_cnecc_mask_clear_all
ECER1C | ECER2C bundle.
@ k_ra8_cnecc_mask_ec2edic
EC2EDIC.
@ k_ra8_cnecc_mask_emca
EMCA[1:0] @ [15:14].
@ k_ra8_cnecc_mask_ecsedf0
1-bit address captured.
@ k_ra8_cnecc_mask_ecervf
ECERVF.
@ k_ra8_cnecc_mask_ecer2f
ECER2F.
@ k_ra8_cnecc_mask_ec1edic
EC1EDIC.
@ k_ra8_cnecc_mask_ecdedf0
2-bit address captured.
@ k_ra8_cnecc_mask_irq_all
EC1EDIC | EC2EDIC.
Per-instance CNECC register window (size = 0x14 bytes).
volatile uint32_t EC710TED
+0x0C Test substitute data.
volatile uint32_t EC710EAD0
+0x10 Captured error address (read-only).
volatile uint32_t _r1
+0x08 Reserved.
volatile uint32_t EC710CTL
+0x00 ECC control / status / IRQ enables.
volatile uint16_t _r0
+0x06 Reserved.
volatile uint16_t EC710TMC
+0x04 Test-mode control.