ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
Loading...
Searching...
No Matches
ra8_doc_regs.h
Go to the documentation of this file.
1
37
38#pragma once
39
40#ifdef __cplusplus
41extern "C" {
42#endif
43
44#include <stdint.h>
45
50typedef enum : uintptr_t {
51 k_ra8_doc_base_addr = 0x40311000UL,
53
64
75
80typedef enum : uint8_t {
85
98typedef enum : uint8_t {
101
141
146typedef enum : uint8_t {
149
154typedef enum : uint8_t {
157
162typedef struct {
163 volatile uint8_t DOCR;
164 volatile uint8_t _r0;
165 volatile uint16_t _r1;
166 volatile uint8_t DOSR;
167 volatile uint8_t _r2;
168 volatile uint16_t _r3;
169 volatile uint8_t DOSCR;
170 volatile uint8_t _r4;
171 volatile uint16_t _r5;
172 volatile uint32_t DODIR;
173 volatile uint32_t DODSR0;
174 volatile uint32_t DODSR1;
176
181static inline volatile r_doc_regs_t* ra8_doc(void)
182{
183 return (volatile r_doc_regs_t*)k_ra8_doc_base_addr;
184}
185
186#ifdef __cplusplus
187}
188#endif
ra8_dosr_mask_t
DOSR status bit masks (HUM 57.2.2 p 3520).
@ k_ra8_doc_mask_dopcf
Data-operation circuit flag.
ra8_docr_oms_t
Operation-mode codes written to DOCR.OMS[1:0] (HUM 57.2.1 p 3519).
@ k_ra8_doc_mode_compare
Data compare: set DOPCF when DCSEL hits.
@ k_ra8_doc_mode_add
Add of DODIR into DODSR0.
@ k_ra8_doc_mode_reserved
Reserved, must not be written.
@ k_ra8_doc_mode_subtract
Subtract of DODIR from DODSR0.
static volatile r_doc_regs_t * ra8_doc(void)
Get a pointer to the DOC register block.
ra8_doc_addr_t
Memory-mapped base address for the DOC block.
@ k_ra8_doc_base_addr
DOC_B peripheral base, HUM Ch 57.2 p 3519.
ra8_docr_bit_t
DOCR control-bit positions (HUM 57.2.1 p 3519).
@ k_ra8_doc_bit_dobw
Data operation bit-width select.
@ k_ra8_doc_bit_oms0
Operation mode select bit 0.
@ k_ra8_doc_bit_oms1
Operation mode select bit 1.
@ k_ra8_doc_bit_dcsel
Detection condition select bit 0.
ra8_docr_field_mask_t
Mask for the 3-bit DCSEL sub-field after right-shifting DOCR by k_ra8_doc_bit_dcsel (HUM 57....
@ k_ra8_doc_mask_dcsel_field
3-bit DCSEL value mask (bits 2:0).
ra8_docr_mask_t
DOCR bit masks (HUM 57.2.1 p 3519).
@ k_ra8_doc_mask_oms
OMS[1:0] field mask.
@ k_ra8_doc_mask_dobw
DOBW bit mask.
@ k_ra8_doc_mask_dcsel
DCSEL[2:0] field mask in DOCR (bits 6:4).
ra8_doscr_mask_t
DOSCR status-clear bit masks (HUM 57.2.3 p 3521).
@ k_ra8_doc_mask_dopcfcl
Write 1 to clear DOPCF.
ra8_docr_dcsel_t
Detection-condition select codes for DOCR.DCSEL[2:0] (HUM 57.2.1 p 3519).
@ k_ra8_doc_dcsel_match
Set DOPCF when DODSR0 == DODIR.
@ k_ra8_doc_dcsel_lower
Set DOPCF when DODSR0 > DODIR.
@ k_ra8_doc_dcsel_inside
Set DOPCF when DODSR0 < DODIR < DODSR1 (inside window).
@ k_ra8_doc_dcsel_upper
Set DOPCF when DODSR0 < DODIR.
@ k_ra8_doc_dcsel_mismatch
Set DOPCF when DODSR0 != DODIR.
@ k_ra8_doc_dcsel_outside
Set DOPCF when DODIR < DODSR0 or DODSR1 < DODIR (outside).
DOC_B register window (HUM Ch 57.2 p 3519-3522).
volatile uint32_t DODSR1
+0x14 Upper window threshold.
volatile uint8_t _r2
+0x05 padding.
volatile uint32_t DODIR
+0x0C Data input (access at DOBW width).
volatile uint8_t _r4
+0x09 padding.
volatile uint8_t DOSR
+0x04 Status flag (DOPCF).
volatile uint8_t DOSCR
+0x08 Status clear (DOPCFCL, write-only).
volatile uint32_t DODSR0
+0x10 Reference / running result.
volatile uint16_t _r1
+0x02 padding.
volatile uint8_t _r0
+0x01 padding.
volatile uint8_t DOCR
+0x00 Control (mode, width, DCSEL).
volatile uint16_t _r5
+0x0A padding.
volatile uint16_t _r3
+0x06 padding.