Error Code Definitions for ra8-firmware.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
ra8_err_t ra8_mipi_phy_get_status_decoded(ra8_mipi_phy_status_decoded_t *out)
Read DPHYSFR and decode it into a ra8_mipi_phy_status_decoded_t.
ra8_err_t ra8_mipi_phy_set_eotp(ra8_mipi_phy_eotp_t eotp)
Set the EoTP packet emission preference (DSI host only).
ra8_err_t ra8_mipi_phy_set_escape_divisor(uint8_t escdiv)
Update DPHYESCCR.ESCDIV at runtime.
ra8_err_t ra8_mipi_phy_set_pclka_freq(uint8_t mhz)
Update DPHYREFCR.RFREQ at runtime.
ra8_mipi_phy_dual_mode_t ra8_mipi_phy_get_dual_mode(void)
Read back the dual-mode arbitration policy last configured.
ra8_mipi_phy_state_t ra8_mipi_phy_get_state(void)
Read the cached lifecycle state.
bool ra8_mipi_phy_is_lane_enabled(ra8_mipi_phy_lane_id_t lane)
Query whether the given lane is currently enabled.
ra8_err_t ra8_mipi_phy_validate_pll_band(const ra8_mipi_phy_pll_t *pll, uint8_t mosc_mhz)
Validate a PLL coefficient block against HUM 64.2.2 p 3823-3824.
ra8_err_t ra8_mipi_phy_select_timing(ra8_mipi_phy_mode_t mode, uint8_t pclka_mhz, uint16_t rate_mbps, ra8_mipi_phy_timing_t *out_timing)
Look up an HUM Table 64.2 / 64.3 row and apply the timing.
ra8_err_t ra8_mipi_phy_compute_lane_rate_mbps(const ra8_mipi_phy_pll_t *pll, uint8_t mosc_mhz, uint32_t *out_mbps)
Compute (mosc, pll) -> approximate per-lane line rate.
ra8_err_t ra8_mipi_phy_set_dual_mode(ra8_mipi_phy_dual_mode_t mode)
Set the dual-mode arbitration policy.
ra8_err_t ra8_mipi_phy_set_pclka_freq_hz(uint32_t hz)
Update DPHYREFCR.RFREQ from a PCLKA frequency in Hz.
ra8_err_t ra8_mipi_phy_lookup_timing(ra8_mipi_phy_mode_t mode, uint8_t pclka_mhz, uint16_t rate_mbps, ra8_mipi_phy_timing_t *out_timing)
Look up an HUM Table 64.2 / 64.3 row WITHOUT writing the regs.
ra8_err_t ra8_mipi_phy_set_lane_count(ra8_mipi_phy_lane_count_t count)
Configure the active lane count.
ra8_mipi_phy_eotp_t ra8_mipi_phy_get_eotp(void)
Query the EoTP setting last configured.
bool ra8_mipi_phy_dual_mode_can_acquire(ra8_mipi_phy_mode_t requestor)
Test whether a (mode, policy) request is currently allowed.
ra8_err_t ra8_mipi_phy_set_lane_speed(const ra8_mipi_phy_pll_t *pll)
Reprogram the PLL coefficients (DPHYPLFCR) at runtime.
ra8_err_t ra8_mipi_phy_switch_mode(ra8_mipi_phy_mode_t mode)
Switch the PHY between DSI host and CSI device mode.
ra8_err_t ra8_mipi_phy_set_lane_enable(ra8_mipi_phy_lane_id_t lane, bool enable)
Enable or disable a single data lane.
ra8_mipi_phy_lane_count_t ra8_mipi_phy_get_lane_count(void)
Read back the lane count last configured.
ra8_err_t ra8_mipi_phy_set_clock_mode(ra8_mipi_phy_clk_mode_t mode)
Set the HS clock-lane mode (continuous vs non-continuous).
ra8_mipi_phy_clk_mode_t ra8_mipi_phy_get_clock_mode(void)
Query the HS clock-lane mode last configured.
ra8_mipi_phy_mode_t ra8_mipi_phy_get_active_mode(void)
Read the most recently configured operating mode.
ra8_err_t ra8_mipi_phy_compute_pll_freq(const ra8_mipi_phy_pll_t *pll, uint8_t mosc_mhz, uint32_t *out_mhz)
Compute approximate PLL output frequency for a coefficient block.
MIPI D-PHY register layout for the RA8D2.
MIPI D-PHY driver – shared enums, structs, and callback typedef.
ra8_mipi_phy_state_t
Lifecycle position of the D-PHY block.
ra8_mipi_phy_lane_count_t
Number of D-PHY data lanes activated for a transfer.
ra8_mipi_phy_mode_t
D-PHY host vs device mode select (DPHYMDC.MASTEREN).
ra8_mipi_phy_dual_mode_t
Arbitration policy when both DSI and CSI want the PHY.
ra8_mipi_phy_clk_mode_t
HS clock-lane operating mode.
ra8_mipi_phy_lane_id_t
Per-lane identifier passed to ra8_mipi_phy_set_lane_enable.
ra8_mipi_phy_eotp_t
End-of-Transmission Packet emission setting (DSI host only).
D-PHY PLL coefficients written into DPHYPLFCR.
Decoded DPHYSFR snapshot returned by ra8_mipi_phy_get_status_decoded.
D-PHY HS/LP transition timing values (DPHYTIM1..6).