Ethernet Agent (ETHA) per-port register layout for the RA8D2.
ra8_etha_port_t
ETHA port index (m = 0, 1).
ra8_etha_opc_t
ETHA EAMC.OPC[1:0] operating mode commands.
ra8_etha_ops_t
ETHA EAMS.OPS[1:0] operating-mode status flag values.
void(* ra8_etha_event_fn_t)(void *ctx, ra8_etha_port_t port, uint32_t eaeis0, uint32_t eaeis1, uint32_t eaeis2)
ETHA per-port event callback.
Per-port Ethernet MAC (RMAC) driver – HUM Ch 33.
Credit-based shaper parameters per traffic class.
uint32_t increment
CIV credit-add per byte (20 bits).
uint32_t upper_lim
CUL upper credit limit (31 bits).
Per-port ETHA configuration knobs.
uint32_t eaeie2_mask
Bits to OR into EAEIE2 on init.
uint32_t eaeie0_mask
Bits to OR into EAEIE0 on init.
uint32_t eaeie1_mask
Bits to OR into EAEIE1 on init.
ra8_etha_opc_t initial_mode
Mode to enter after init.
PHY auto-negotiation parameters for ra8_etha_open.
uint32_t timeout_ms
Auto-neg wait timeout (0 = internal cap).
uint16_t advertise
OR of ra8_rmac_phy_advert_t bits.
uint8_t phy_addr
MDIO address of the off-chip PHY (0..31).
Per-port runtime traffic counters maintained by ra8_etha.
uint32_t tx_ok
Frames transmitted successfully.
uint16_t reserved
Reserved for alignment / future use.
uint32_t rx_drop
Frames dropped due to ring overflow.
uint16_t ring_tx
Configured TX ring depth.
uint32_t tx_err
Frames that failed to transmit.
uint32_t rx_ok
Frames received successfully.
uint32_t rx_err
Frames received with PHY/MAC/FCS error.
uint16_t ring_rx
Configured RX ring depth.
uint16_t ring_buf
Configured per-descriptor buffer size.
Descriptor-ring configuration for ra8_etha_descriptor_ring_init.
uint16_t num_rx
Number of RX descriptors (1..4096).
uint16_t buffer_size
Per-descriptor buffer size in bytes.
uint16_t num_tx
Number of TX descriptors (1..4096).
Per-port MIB counter snapshot.
uint16_t frame_size_err
EAFSECN.FSEN[15:0].
uint16_t tag_filter_err
EATFECN.TFEN[15:0].
uint16_t switch_min_frame_err
EAUSMFSECN.USMFSEN[15:0].
uint16_t queue_security_err
EADQSECN.DQSEN[15:0].
uint16_t queue_overflow_err
EADQOECN.DQOEN[15:0].
Snapshot of an ETHA port's runtime state.
uint32_t tas_cycle
EATASCTM TAS cycle-time monitor.
uint32_t eaeis0
Raw EAEIS0 (ECC + frame errors).
uint32_t eaeis1
Raw EAEIS1 (CBS + TAS gate).
ra8_etha_ops_t ops
Current operating-mode flag.
uint32_t eaeis2
Raw EAEIS2 (queue overflow).
One TAS (802.1Qbv) RAM entry, exactly as HUM Table 32.6 defines it.
bool gate_open
TAS.GS – true opens this queue's gate.
uint32_t gate_time_ns
TAS.GT – entry duration in ns, 28 bits.
The gate-control list of one descriptor queue.
const ra8_etha_tas_entry_t * entries
Gate list, or nullptr when count is 0.
uint16_t count
Entries for this queue (EATASENCi).
802.1Q VLAN tag descriptor (used by::ra8_etha_set_vlan_tag).
uint8_t pcp
Priority code point (3 bits).
uint16_t vid
VLAN identifier (12 bits).
uint8_t dei
Drop eligible indicator (1 bit).