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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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One TAS (802.1Qbv) RAM entry, exactly as HUM Table 32.6 defines it. More...
#include <ra8_etha_types.h>
Data Fields | |
| uint32_t | gate_time_ns |
| TAS.GT – entry duration in ns, 28 bits. | |
| bool | gate_open |
| TAS.GS – true opens this queue's gate. | |
One TAS (802.1Qbv) RAM entry, exactly as HUM Table 32.6 defines it.
HUM Table 32.6 "TAS entry format" (p 1691) gives a TAS entry exactly two fields: a one-bit gate state GS and a 28-bit gate time GT in NANOSECONDS. There is no per-class gate vector inside an entry – the TAS RAM is partitioned per descriptor queue by ra8_etha_tas_queue_t, so an entry's single GS bit belongs to the queue whose block it sits in.
The previous shape of this struct modelled an entry as an eight-bit per-class gate vector plus a "cut-through" flag, which is the 802.1Qbv textbook layout but not this silicon's (#539).
Definition at line 173 of file ra8_etha_types.h.
| bool ra8_etha_tas_entry_t::gate_open |
TAS.GS – true opens this queue's gate.
Definition at line 175 of file ra8_etha_types.h.
Referenced by internal_tas_learn_entry(), ra8_etha_read_tas_entry(), and tsn_tas_entry_matches().
| uint32_t ra8_etha_tas_entry_t::gate_time_ns |
TAS.GT – entry duration in ns, 28 bits.
Definition at line 174 of file ra8_etha_types.h.
Referenced by internal_tas_learn_entry(), ra8_etha_read_tas_entry(), and tsn_tas_entry_matches().