33typedef enum : uintptr_t {
39typedef enum : uint8_t {
63typedef enum : uint32_t {
82typedef enum : uint8_t {
101typedef enum : uint32_t {
141typedef enum : uint32_t {
176typedef enum : uint32_t {
207typedef enum : uint32_t {
225typedef enum : uint8_t {
279 volatile uint32_t
_r3[79];
Annotation-attribute framework macros for ra8-firmware.
#define RA8_HW_REGISTER_ACCESS
Mark an MMIO accessor function (returns volatile register pointer).
ra8_sdhi_arg_shift_t
Bit-shift amounts for SD command-argument packing.
@ k_ra8_sdhi_rca_arg_shift
RCA occupies SD_ARG[31:16].
ra8_sdhi_option_bits_t
SD_OPTION bus-width selectors and timeout-field defaults.
@ k_ra8_sdhi_option_rsvd_bit14
bit 14 reserved, must write 1
@ k_ra8_sdhi_option_bus_1bit
1-bit safe default: WIDTH=1, WIDTH8=0 (0xC0E0).
@ k_ra8_sdhi_option_top_default
TOP[3:0]=0xE, CTOP=0 (bits 7..0).
@ k_ra8_sdhi_option_width_bit
WIDTH (bit 15): 1 -> narrow bus.
@ k_ra8_sdhi_option_width8_bit
WIDTH8 (bit 13): 1 -> 8-bit.
@ k_ra8_sdhi_option_bus_8bit
8-bit: WIDTH=0, WIDTH8=1 (0x60E0).
@ k_ra8_sdhi_option_width_mask
Combined WIDTH+WIDTH8 clear mask for read-modify-write.
@ k_ra8_sdhi_option_bus_4bit
4-bit: WIDTH=0, WIDTH8=0 (0x40E0).
ra8_sdhi_geometry_t
Block-transfer geometry constants.
@ k_ra8_sdhi_block_bytes
SD block size in bytes.
@ k_ra8_sdhi_words_per_block
512 / 4 = 128 word fills per block
@ k_ra8_sdhi_fifo_word_bytes
SD_BUF0 FIFO word width.
ra8_sdhi_acmd6_bits_t
ACMD6 (SET_BUS_WIDTH) argument + R1 status-bit masks.
@ k_ra8_sdhi_r1_app_cmd_mask
R1 bit 5 APP_CMD acknowledged.
@ k_ra8_sdhi_r1_error_mask
R1 error/violation bit-mask.
@ k_ra8_sdhi_r1_illegal_command
R1 bit 22 ILLEGAL_COMMAND.
@ k_ra8_sdhi_acmd6_arg_1bit
ACMD6 arg: 1-bit data bus.
@ k_ra8_sdhi_acmd6_arg_4bit
ACMD6 arg: 4-bit data bus.
static volatile r_sdhi_regs_t * ra8_sdhi(uint8_t instance)
Get pointer to SDHI instance N (0 or 1).
@ k_ra8_sdhi0_base_addr
RA8 sdhi0 base address.
@ k_ra8_sdhi1_base_addr
RA8 sdhi1 base address.
@ k_ra8_sdhi_stride
RA8 SDHI stride.
ra8_sdhi_cmd6_switch_bits_t
eMMC CMD6 (SWITCH) argument fields for the 8-bit bus-width switch.
@ k_ra8_sdhi_switch_access_write_byte
Access[25:24] = 0b11 Write Byte.
@ k_ra8_sdhi_cmd6_arg_8bit
Whole CMD6 SWITCH argument: BUS_WIDTH <- 8-bit (0x03B70200).
@ k_ra8_sdhi_switch_value_8bit
Value[15:8] = 2 -> 8-bit SDR.
@ k_ra8_sdhi_switch_index_bus_width
Index[23:16] = 183 BUS_WIDTH.
@ k_ra8_sdhi_instance_count
RA8 SDHI instance count.
ra8_sdhi_xfer_bits_t
SD_INFO2 / SD_STOP bit-masks used by the block-transfer path.
@ k_ra8_sdhi_info2_bre_mask
SD_INFO2.BRE bit 8.
@ k_ra8_sdhi_info2_bwe_mask
SD_INFO2.BWE bit 9.
@ k_ra8_sdhi_stop_seccnt_en
SD_STOP.SEC bit 8.
@ k_ra8_sdhi_info2_brem_bwem
SD_INFO2_MASK.
@ k_ra8_sdhi_dmaen_set
SD_DMAEN.DMAEN bit 1.
ra8_sdhi_cmd_id_t
SD command numbers used by the block-transfer API.
@ k_ra8_sdhi_cmd_emmc_switch
CMD6 SWITCH (eMMC EXT_CSD).
@ k_ra8_sdhi_cmd_write_multi_block
CMD25 WRITE_MULTIPLE_BLOCK.
@ k_ra8_sdhi_cmd_stop_transmission
CMD12 STOP_TRANSMISSION.
@ k_ra8_sdhi_cmd_read_multi_block
CMD18 READ_MULTIPLE_BLOCK.
@ k_ra8_sdhi_cmd_app_cmd
CMD55 APP_CMD prefix.
@ k_ra8_sdhi_cmd_write_single_block
CMD24 WRITE_SINGLE_BLOCK.
@ k_ra8_sdhi_cmd_set_bus_width
ACMD6 SET_BUS_WIDTH (SD).
@ k_ra8_sdhi_cmd_read_single_block
CMD17 READ_SINGLE_BLOCK.
volatile uint32_t SD_SECCNT
+0x14 Block Count.
volatile uint32_t SD_ARG
+0x08 Argument (32-bit).
volatile uint32_t SD_INFO1_MASK
+0x40 Interrupt Mask 1.
volatile uint32_t SD_ERR_STS1
+0x58 Error Status 1.
volatile uint32_t SOFT_RST
+0x1C0 Software Reset.
volatile uint32_t SD_RSP5
+0x2C Response 5.
volatile uint32_t SD_RSP1
+0x1C Response 1.
volatile uint32_t SD_ERR_STS2
+0x5C Error Status 2.
volatile uint32_t SD_INFO2_MASK
+0x44 Interrupt Mask 2.
volatile uint32_t SD_CMD
+0x00 Command Type Register.
volatile uint32_t SD_INFO1
+0x38 Interrupt Flag 1.
volatile uint32_t _r1
+0x54 Reserved.
volatile uint32_t _r0
Reserved.
volatile uint32_t SD_RSP32
+0x20 Response 32.
volatile uint32_t SD_STOP
+0x10 Stop.
volatile uint32_t SD_OPTION
+0x50 Access Control Option.
volatile uint32_t SD_INFO2
+0x3C Interrupt Flag 2.
volatile uint32_t SDIF_MODE
+0x1CC SD Interface Mode.
volatile uint32_t SD_RSP3
+0x24 Response 3.
volatile uint32_t SD_SIZE
+0x4C Transfer Data Length.
volatile uint32_t SDIO_INFO1
+0x6C SDIO Interrupt Flag.
volatile uint32_t SD_DMAEN
+0x1B0 DMA Mode Enable.
volatile uint32_t SD_BUF0
+0x60 Buffer Register.
volatile uint32_t _r5[2]
+0x1C4..+0x1C8 Reserved.
volatile uint32_t _r3[79]
+0x74..+0x1AC Reserved.
volatile uint32_t SDIO_MODE
+0x68 SDIO Mode Control.
volatile uint32_t EXT_SWAP
+0x1E0 Endian Swap Control.
volatile uint32_t _r6[4]
+0x1D0..+0x1DC Reserved.
volatile uint32_t SD_RSP10
+0x18 Response 10.
volatile uint32_t SD_RSP54
+0x28 Response 54.
volatile uint32_t SDIO_INFO1_MASK
+0x70 SDIO Interrupt Mask.
volatile uint32_t SD_RSP76
+0x30 Response 76.
volatile uint32_t SD_RSP7
+0x34 Response 7.
volatile uint32_t SD_ARG1
+0x0C Argument 1 (16-bit).
volatile uint32_t _r2
+0x64 Reserved.
volatile uint32_t SD_CLK_CTRL
+0x48 Clock Control.
volatile uint32_t _r4[3]
+0x1B4..+0x1BC Reserved.