ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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r_sdhi_regs_t Struct Reference

SDHI register window. More...

#include <ra8_sdhi_regs.h>

Data Fields

volatile uint32_t SD_CMD
 +0x00 Command Type Register.
volatile uint32_t _r0
 Reserved.
volatile uint32_t SD_ARG
 +0x08 Argument (32-bit).
volatile uint32_t SD_ARG1
 +0x0C Argument 1 (16-bit).
volatile uint32_t SD_STOP
 +0x10 Stop.
volatile uint32_t SD_SECCNT
 +0x14 Block Count.
volatile uint32_t SD_RSP10
 +0x18 Response 10.
volatile uint32_t SD_RSP1
 +0x1C Response 1.
volatile uint32_t SD_RSP32
 +0x20 Response 32.
volatile uint32_t SD_RSP3
 +0x24 Response 3.
volatile uint32_t SD_RSP54
 +0x28 Response 54.
volatile uint32_t SD_RSP5
 +0x2C Response 5.
volatile uint32_t SD_RSP76
 +0x30 Response 76.
volatile uint32_t SD_RSP7
 +0x34 Response 7.
volatile uint32_t SD_INFO1
 +0x38 Interrupt Flag 1.
volatile uint32_t SD_INFO2
 +0x3C Interrupt Flag 2.
volatile uint32_t SD_INFO1_MASK
 +0x40 Interrupt Mask 1.
volatile uint32_t SD_INFO2_MASK
 +0x44 Interrupt Mask 2.
volatile uint32_t SD_CLK_CTRL
 +0x48 Clock Control.
volatile uint32_t SD_SIZE
 +0x4C Transfer Data Length.
volatile uint32_t SD_OPTION
 +0x50 Access Control Option.
volatile uint32_t _r1
 +0x54 Reserved.
volatile uint32_t SD_ERR_STS1
 +0x58 Error Status 1.
volatile uint32_t SD_ERR_STS2
 +0x5C Error Status 2.
volatile uint32_t SD_BUF0
 +0x60 Buffer Register.
volatile uint32_t _r2
 +0x64 Reserved.
volatile uint32_t SDIO_MODE
 +0x68 SDIO Mode Control.
volatile uint32_t SDIO_INFO1
 +0x6C SDIO Interrupt Flag.
volatile uint32_t SDIO_INFO1_MASK
 +0x70 SDIO Interrupt Mask.
volatile uint32_t _r3 [79]
 +0x74..+0x1AC Reserved.
volatile uint32_t SD_DMAEN
 +0x1B0 DMA Mode Enable.
volatile uint32_t _r4 [3]
 +0x1B4..+0x1BC Reserved.
volatile uint32_t SOFT_RST
 +0x1C0 Software Reset.
volatile uint32_t _r5 [2]
 +0x1C4..+0x1C8 Reserved.
volatile uint32_t SDIF_MODE
 +0x1CC SD Interface Mode.
volatile uint32_t _r6 [4]
 +0x1D0..+0x1DC Reserved.
volatile uint32_t EXT_SWAP
 +0x1E0 Endian Swap Control.

Detailed Description

SDHI register window.

Layout cross-verified against FSP R_SDHI0_Type (BSP header R7FA6M3AH.h lines 14964-15442). All registers are 32-bit. The total structure size is 0x1E4 bytes – the trailing reserved blocks RESERVED3..RESERVED6 are necessary so SD_DMAEN, SOFT_RST, SDIF_MODE, and EXT_SWAP land at their architectural offsets (0x1B0, 0x1C0, 0x1CC, 0x1E0). Earlier scaffold revisions stopped at SDIO_MODE which silently rerouted SOFT_RST writes onto SDIO_INFO1 – caught by FSP cross-check.

The driver currently touches SD_CMD / SD_ARG / SD_INFO1 / SD_INFO2 / SD_CLK_CTRL / SD_OPTION / SOFT_RST / SDIO_MODE / SD_DMAEN / SDIF_MODE / EXT_SWAP. Response, transfer-length, and FIFO registers are documented here for future block-transfer work.

Definition at line 249 of file ra8_sdhi_regs.h.

Field Documentation

◆ _r0

volatile uint32_t r_sdhi_regs_t::_r0

Reserved.

Definition at line 251 of file ra8_sdhi_regs.h.

◆ _r1

volatile uint32_t r_sdhi_regs_t::_r1

+0x54 Reserved.

Definition at line 271 of file ra8_sdhi_regs.h.

◆ _r2

volatile uint32_t r_sdhi_regs_t::_r2

+0x64 Reserved.

Definition at line 275 of file ra8_sdhi_regs.h.

◆ _r3

volatile uint32_t r_sdhi_regs_t::_r3[79]

+0x74..+0x1AC Reserved.

Definition at line 279 of file ra8_sdhi_regs.h.

◆ _r4

volatile uint32_t r_sdhi_regs_t::_r4[3]

+0x1B4..+0x1BC Reserved.

Definition at line 281 of file ra8_sdhi_regs.h.

◆ _r5

volatile uint32_t r_sdhi_regs_t::_r5[2]

+0x1C4..+0x1C8 Reserved.

Definition at line 283 of file ra8_sdhi_regs.h.

◆ _r6

volatile uint32_t r_sdhi_regs_t::_r6[4]

+0x1D0..+0x1DC Reserved.

Definition at line 285 of file ra8_sdhi_regs.h.

◆ EXT_SWAP

volatile uint32_t r_sdhi_regs_t::EXT_SWAP

+0x1E0 Endian Swap Control.

Definition at line 286 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_init().

◆ SD_ARG

volatile uint32_t r_sdhi_regs_t::SD_ARG

+0x08 Argument (32-bit).

Definition at line 252 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_send(), and ra8_sdhi_send_command().

◆ SD_ARG1

volatile uint32_t r_sdhi_regs_t::SD_ARG1

+0x0C Argument 1 (16-bit).

Definition at line 253 of file ra8_sdhi_regs.h.

◆ SD_BUF0

volatile uint32_t r_sdhi_regs_t::SD_BUF0

+0x60 Buffer Register.

Definition at line 274 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_drain(), and internal_sdhi_fill().

◆ SD_CLK_CTRL

volatile uint32_t r_sdhi_regs_t::SD_CLK_CTRL

+0x48 Clock Control.

Definition at line 268 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_deinit(), ra8_sdhi_init(), and ra8_sdhi_set_clock().

◆ SD_CMD

volatile uint32_t r_sdhi_regs_t::SD_CMD

+0x00 Command Type Register.

Definition at line 250 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_send(), and ra8_sdhi_send_command().

◆ SD_DMAEN

volatile uint32_t r_sdhi_regs_t::SD_DMAEN

+0x1B0 DMA Mode Enable.

Definition at line 280 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_attach_dma(), and ra8_sdhi_init().

◆ SD_ERR_STS1

volatile uint32_t r_sdhi_regs_t::SD_ERR_STS1

+0x58 Error Status 1.

Definition at line 272 of file ra8_sdhi_regs.h.

◆ SD_ERR_STS2

volatile uint32_t r_sdhi_regs_t::SD_ERR_STS2

+0x5C Error Status 2.

Definition at line 273 of file ra8_sdhi_regs.h.

◆ SD_INFO1

volatile uint32_t r_sdhi_regs_t::SD_INFO1

+0x38 Interrupt Flag 1.

Definition at line 264 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_finish_xfer(), internal_sdhi_send(), ra8_sdhi_clear_status(), ra8_sdhi_deinit(), ra8_sdhi_dispatch(), ra8_sdhi_get_status(), ra8_sdhi_init(), and ra8_sdhi_send_command().

◆ SD_INFO1_MASK

volatile uint32_t r_sdhi_regs_t::SD_INFO1_MASK

+0x40 Interrupt Mask 1.

Definition at line 266 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_deinit(), and ra8_sdhi_init().

◆ SD_INFO2

volatile uint32_t r_sdhi_regs_t::SD_INFO2

+0x3C Interrupt Flag 2.

Definition at line 265 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_drain(), internal_sdhi_fill(), internal_sdhi_finish_xfer(), ra8_sdhi_deinit(), and ra8_sdhi_init().

◆ SD_INFO2_MASK

volatile uint32_t r_sdhi_regs_t::SD_INFO2_MASK

+0x44 Interrupt Mask 2.

Definition at line 267 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_attach_dma(), ra8_sdhi_deinit(), and ra8_sdhi_init().

◆ SD_OPTION

volatile uint32_t r_sdhi_regs_t::SD_OPTION

+0x50 Access Control Option.

Definition at line 270 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_init(), and ra8_sdhi_set_bus_width().

◆ SD_RSP1

volatile uint32_t r_sdhi_regs_t::SD_RSP1

+0x1C Response 1.

Definition at line 257 of file ra8_sdhi_regs.h.

◆ SD_RSP10

volatile uint32_t r_sdhi_regs_t::SD_RSP10

+0x18 Response 10.

Definition at line 256 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_send_command().

◆ SD_RSP3

volatile uint32_t r_sdhi_regs_t::SD_RSP3

+0x24 Response 3.

Definition at line 259 of file ra8_sdhi_regs.h.

◆ SD_RSP32

volatile uint32_t r_sdhi_regs_t::SD_RSP32

+0x20 Response 32.

Definition at line 258 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_send_command().

◆ SD_RSP5

volatile uint32_t r_sdhi_regs_t::SD_RSP5

+0x2C Response 5.

Definition at line 261 of file ra8_sdhi_regs.h.

◆ SD_RSP54

volatile uint32_t r_sdhi_regs_t::SD_RSP54

+0x28 Response 54.

Definition at line 260 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_send_command().

◆ SD_RSP7

volatile uint32_t r_sdhi_regs_t::SD_RSP7

+0x34 Response 7.

Definition at line 263 of file ra8_sdhi_regs.h.

◆ SD_RSP76

volatile uint32_t r_sdhi_regs_t::SD_RSP76

+0x30 Response 76.

Definition at line 262 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_send_command().

◆ SD_SECCNT

volatile uint32_t r_sdhi_regs_t::SD_SECCNT

+0x14 Block Count.

Definition at line 255 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_setup_xfer().

◆ SD_SIZE

volatile uint32_t r_sdhi_regs_t::SD_SIZE

+0x4C Transfer Data Length.

Definition at line 269 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_setup_xfer().

◆ SD_STOP

volatile uint32_t r_sdhi_regs_t::SD_STOP

+0x10 Stop.

Definition at line 254 of file ra8_sdhi_regs.h.

Referenced by internal_sdhi_setup_xfer().

◆ SDIF_MODE

volatile uint32_t r_sdhi_regs_t::SDIF_MODE

+0x1CC SD Interface Mode.

Definition at line 284 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_init().

◆ SDIO_INFO1

volatile uint32_t r_sdhi_regs_t::SDIO_INFO1

+0x6C SDIO Interrupt Flag.

Definition at line 277 of file ra8_sdhi_regs.h.

◆ SDIO_INFO1_MASK

volatile uint32_t r_sdhi_regs_t::SDIO_INFO1_MASK

+0x70 SDIO Interrupt Mask.

Definition at line 278 of file ra8_sdhi_regs.h.

◆ SDIO_MODE

volatile uint32_t r_sdhi_regs_t::SDIO_MODE

+0x68 SDIO Mode Control.

Definition at line 276 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_init().

◆ SOFT_RST

volatile uint32_t r_sdhi_regs_t::SOFT_RST

+0x1C0 Software Reset.

Definition at line 282 of file ra8_sdhi_regs.h.

Referenced by ra8_sdhi_deinit(), and ra8_sdhi_init().

The documentation for this struct was generated from the following file: