ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_ether_phy.h
Go to the documentation of this file.
1
20
21#pragma once
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#include <stdint.h>
28
29#include "ra8_err.h"
30
44
55
69
74typedef enum : uint8_t {
77
82typedef struct {
91 ra8_err_t (*read)(void* ctx, uint8_t phy_addr, uint8_t reg_addr, uint16_t* out_data);
100 ra8_err_t (*write)(void* ctx, uint8_t phy_addr, uint8_t reg_addr, uint16_t data);
102 void* ctx;
104
115
126
150[[nodiscard]] ra8_err_t ra8_ether_phy_open(const ra8_ether_phy_cfg_t* cfg);
151
165[[nodiscard]] ra8_err_t ra8_ether_phy_close(void);
166
185[[nodiscard]] ra8_err_t ra8_ether_phy_mdio_read(uint8_t reg_addr, uint16_t* out_data);
186
204[[nodiscard]] ra8_err_t ra8_ether_phy_mdio_write(uint8_t reg_addr, uint16_t data);
205
220
238
239#ifdef __cplusplus
240}
241#endif
-proof
Error Code Definitions for ra8-firmware.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
ra8_ether_phy_speed_t
Negotiated PHY link speed / duplex.
@ k_ra8_ether_phy_speed_10h
RA8 ether PHY speed 10h.
@ k_ra8_ether_phy_speed_no_link
RA8 ether PHY speed no link.
@ k_ra8_ether_phy_speed_100f
RA8 ether PHY speed 100f.
@ k_ra8_ether_phy_speed_1000f
RA8 ether PHY speed 1000f.
@ k_ra8_ether_phy_speed_10f
RA8 ether PHY speed 10f.
@ k_ra8_ether_phy_speed_100h
RA8 ether PHY speed 100h.
@ k_ra8_ether_phy_speed_1000h
RA8 ether PHY speed 1000h.
ra8_ether_phy_clause22_reg_t
Standard IEEE 802.3 Clause-22 PHY register addresses.
@ k_ra8_ether_phy_reg_id_low
PHY ID #1.
@ k_ra8_ether_phy_reg_an_expand
Auto-Neg Expansion.
@ k_ra8_ether_phy_reg_an_advert
Auto-Neg Advertisement.
@ k_ra8_ether_phy_reg_an_partner
Link Partner Ability.
@ k_ra8_ether_phy_reg_id_high
PHY ID #2.
@ k_ra8_ether_phy_reg_status
BMSR.
@ k_ra8_ether_phy_reg_control
BMCR.
ra8_err_t ra8_ether_phy_open(const ra8_ether_phy_cfg_t *cfg)
Open and reset a PHY.
ra8_err_t ra8_ether_phy_auto_negotiate_start(void)
Kick off auto-negotiation by re-arming BMCR.
ra8_ether_phy_mii_t
Media-independent interface type seen on the MAC side.
@ k_ra8_ether_phy_gmii
RA8 ether PHY gmii.
@ k_ra8_ether_phy_mii
RA8 ether PHY mii.
@ k_ra8_ether_phy_rmii
RA8 ether PHY rmii.
@ k_ra8_ether_phy_rgmii
RA8 ether PHY rgmii.
ra8_err_t ra8_ether_phy_link_status_get(ra8_ether_phy_link_t *out)
Poll the BMSR for auto-negotiation completion + link-up.
ra8_err_t ra8_ether_phy_close(void)
Close the driver.
ra8_err_t ra8_ether_phy_mdio_write(uint8_t reg_addr, uint16_t data)
Write a Clause-22 PHY register.
ra8_ether_phy_addr_limit_t
Five-bit MDIO PHY address (0..31).
@ k_ra8_ether_phy_addr_max
RA8 ether PHY address maximum.
ra8_err_t ra8_ether_phy_mdio_read(uint8_t reg_addr, uint16_t *out_data)
Read a Clause-22 PHY register.
Configuration descriptor for ra8_ether_phy_open.
ra8_ether_phy_io_t io
Pluggable MDIO bus.
ra8_ether_phy_mii_t mii_type
Interface type.
uint16_t reset_wait_us
Wait after reset.
uint8_t phy_address
5-bit MDIO PHY address.
Pluggable MDIO bus interface.
void * ctx
Opaque context pointer forwarded to read / write.
ra8_err_t(* read)(void *ctx, uint8_t phy_addr, uint8_t reg_addr, uint16_t *out_data)
Read a 16-bit Clause-22 register.