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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Double-precision FPU probe – codegen witness for the RA8P1 DP-FPU. More...
Go to the source code of this file.
Functions | |
| double | ra8_fpu_dp_madd (double a, double b, double c) |
| Evaluate the double-precision product-sum a * b + c. | |
Double-precision FPU probe – codegen witness for the RA8P1 DP-FPU.
The two supported RA8 parts differ in FPU width even though both are a Cortex-M85:
ra8_fpu_dp_madd() is a deliberately tiny double computation that both device builds compile. Disassembling its object (arm-none-eabi-objdump -d) is the witness: the RA8P1 build shows .f64 VFP opcodes; the RA8D2 build shows soft-float bl __aeabi_d* calls. It doubles as a runtime DP-FPU sanity check whose numeric result is validated by the host unit test.
Definition in file ra8_fpu_probe.h.
| double ra8_fpu_dp_madd | ( | double | a, |
| double | b, | ||
| double | c ) |
Evaluate the double-precision product-sum a * b + c.
A minimal IEEE-754 binary64 (double) computation used as a compile-target witness for the FPU width (see the file header). On a DP-FPU build the body lowers to hardware .f64 opcodes; on an SP-FPU build it lowers to soft-float calls. The math itself – multiply then add, or a fused multiply-add – is identical in both cases and is exercised for numeric correctness by the host unit test.
| [in] | a | First multiplicand, any finite double. |
| [in] | b | Second multiplicand, any finite double. |
| [in] | c | Addend, any finite double. |
| a*b+c | The IEEE-754 binary64 result (subject to a single rounding, or fewer if the compiler contracts to a fused multiply-add). |
Definition at line 19 of file ra8_fpu_probe.c.