ra8_mpu_regs.h File Reference

Memory Protection Unit register layout for the Renesas RA8D2. More...

#include <stddef.h>
#include <stdint.h>

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Data Structures
struct	r_mpu_regs_t
	Architectural Cortex-M85 MPU register block. More...

Enumerations
enum	ra8_mpu_addr_t : uintptr_t {   k_ra8_mpu_core_base_addr = 0xE000ED90UL ,   k_ra8_mpu_mmpu_base_addr = 0x40000000UL ,   k_ra8_mpu_spmon_base_addr = 0x40000D00UL }
enum	ra8_mpu_layout_t : uint32_t { k_ra8_mpu_regs_block_size = 0x38UL }
enum	ra8_mpu_ctrl_bits_t : uint32_t {   k_ra8_mpu_ctrl_enable = (1UL << 0U) ,   k_ra8_mpu_ctrl_hfnmiena = (1UL << 1U) ,   k_ra8_mpu_ctrl_privdefena = (1UL << 2U) }
enum	ra8_mpu_type_bits_t : uint32_t {   k_ra8_mpu_type_dregion_shift = 8UL ,   k_ra8_mpu_type_dregion_mask = 0x0000FF00UL }
enum	ra8_mpu_rbar_bits_t : uint32_t {   k_ra8_mpu_rbar_xn_mask = 0x00000001UL ,   k_ra8_mpu_rbar_ap_shift = 1UL ,   k_ra8_mpu_rbar_ap_mask = 0x00000006UL ,   k_ra8_mpu_rbar_sh_shift = 3UL ,   k_ra8_mpu_rbar_sh_mask = 0x00000018UL ,   k_ra8_mpu_rbar_base_mask = 0xFFFFFFE0UL }
enum	ra8_mpu_rlar_bits_t : uint32_t {   k_ra8_mpu_rlar_en_mask = 0x00000001UL ,   k_ra8_mpu_rlar_attridx_shift = 1UL ,   k_ra8_mpu_rlar_attridx_mask = 0x0000000EUL ,   k_ra8_mpu_rlar_limit_mask = 0xFFFFFFE0UL }

Functions
static volatile r_mpu_regs_t *	ra8_mpu_regs (void)
	Accessor for the architectural Cortex-M85 MPU register block.

Detailed Description

Memory Protection Unit register layout for the Renesas RA8D2.

Defines typed Cortex-M85 MPU and RA8 memory-protection register layouts plus their fixed MMIO addresses.

Copyright

Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Definition in file ra8_mpu_regs.h.

Enumeration Type Documentation

ra8_mpu_addr_t

enum ra8_mpu_addr_t : uintptr_t

Enumerator
k_ra8_mpu_core_base_addr	RA8 MPU core base address.
k_ra8_mpu_mmpu_base_addr	RA8 MPU mmpu base address.
k_ra8_mpu_spmon_base_addr	RA8 MPU spmon base address.

Definition at line 21 of file ra8_mpu_regs.h.

ra8_mpu_ctrl_bits_t

enum ra8_mpu_ctrl_bits_t : uint32_t

Enumerator
k_ra8_mpu_ctrl_enable	RA8 MPU control enable.
k_ra8_mpu_ctrl_hfnmiena	RA8 MPU control hfnmiena.
k_ra8_mpu_ctrl_privdefena	RA8 MPU control privdefena.

Definition at line 55 of file ra8_mpu_regs.h.

ra8_mpu_layout_t

enum ra8_mpu_layout_t : uint32_t

Enumerator
k_ra8_mpu_regs_block_size	RA8 MPU registers block size.

Definition at line 48 of file ra8_mpu_regs.h.

ra8_mpu_rbar_bits_t

enum ra8_mpu_rbar_bits_t : uint32_t

Enumerator
k_ra8_mpu_rbar_xn_mask	RA8 MPU rbar xn mask.
k_ra8_mpu_rbar_ap_shift	RA8 MPU rbar ap shift.
k_ra8_mpu_rbar_ap_mask	RA8 MPU rbar ap mask.
k_ra8_mpu_rbar_sh_shift	RA8 MPU rbar sh shift.
k_ra8_mpu_rbar_sh_mask	RA8 MPU rbar sh mask.
k_ra8_mpu_rbar_base_mask	RA8 MPU rbar base mask.

Definition at line 66 of file ra8_mpu_regs.h.

ra8_mpu_rlar_bits_t

enum ra8_mpu_rlar_bits_t : uint32_t

Enumerator
k_ra8_mpu_rlar_en_mask	RA8 MPU rlar en mask.
k_ra8_mpu_rlar_attridx_shift	RA8 MPU rlar attridx shift.
k_ra8_mpu_rlar_attridx_mask	RA8 MPU rlar attridx mask.
k_ra8_mpu_rlar_limit_mask	RA8 MPU rlar limit mask.

Definition at line 75 of file ra8_mpu_regs.h.

ra8_mpu_type_bits_t

enum ra8_mpu_type_bits_t : uint32_t

Enumerator
k_ra8_mpu_type_dregion_shift	RA8 MPU type dregion shift.
k_ra8_mpu_type_dregion_mask	RA8 MPU type dregion mask.

Definition at line 61 of file ra8_mpu_regs.h.

Function Documentation

ra8_mpu_regs()

volatile r_mpu_regs_t * ra8_mpu_regs ( void )

inlinestatic

Accessor for the architectural Cortex-M85 MPU register block.

Returns

Pointer to the live MPU registers.

Precondition

Called from privileged mode (or RA8_OFF_TARGET).

Postcondition

Returned pointer is non-null and word-aligned.

Note

Not thread-safe.

Since

0.1.0

Definition at line 90 of file ra8_mpu_regs.h.

References k_ra8_mpu_core_base_addr.

Referenced by internal_clear_region(), internal_dregion_count(), internal_program_region(), internal_write_ctrl(), internal_write_mair(), ra8_mpu_disable(), ra8_mpu_enable(), and ra8_mpu_is_enabled().