ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_port_utils.h
Go to the documentation of this file.
1
28
29#pragma once
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35#include <stdint.h>
36
37#include "ra8_err.h"
38#include "ra8_gpio_constants.h"
39#include "ra8_icu_regs.h"
40#include "ra8_isr.h"
41#include "ra8_pfs_regs.h"
42#include "ra8_port_constants.h"
43
75
101
118
127
136[[nodiscard]] ra8_err_t ra8_gpio_read(ra8_port_pin_t pin, ra8_level_t* out_level);
137
147
186[[nodiscard]] ra8_err_t
188
224
225/* =============================================================================
226 * External IRQ attachment
227 * =============================================================================
228 */
229
253
287 uint8_t irq_num,
288 const ra8_gpio_irq_cfg_t* cfg,
289 ra8_isr_handler_t handler,
290 void* ctx);
291
314[[nodiscard]] ra8_err_t ra8_gpio_detach_irq(ra8_port_pin_t pin, uint8_t irq_num);
315
316#ifdef __cplusplus
317}
318#endif
const char * owner
Owner.
ra8_board_eth_pin_t pin
Pin.
Error Code Definitions for ra8-firmware.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
PSEL codes for peripheral pin routing on the RA8D2.
ra8_psel_t
Peripheral-function select codes (written to PSEL[4:0]).
Interrupt Control Unit (ICU) register layout for the Renesas RA8D2.
ra8_icu_fclksel_t
IRQCRi.FCLKSEL[1:0] digital filter sampling clock (HUM 14.2.12 p 535).
ra8_icu_irqmd_t
IRQCRi.IRQMD[1:0] detection sense values (HUM 14.2.12 p 535).
NVIC + ICU IELSR allocator.
void(* ra8_isr_handler_t)(void *ctx)
Driver-supplied callback invoked on interrupt entry.
Definition ra8_isr.h:128
Pin Function Select (PFS) register layout for the Renesas RA8D2.
ra8_pfs_dscr_t
PmnPFS.DSCR[1:0] port drive-capability encodings.
Typed Port / Pin Constants for the RA8D2 IOPORT Module.
ra8_port_pin_t
Packed (port << 8) | pin pin identifier.
ra8_level_t
Digital output / input level.
ra8_pin_pull_t
Pull-up/pull-down selection (where supported).
ra8_err_t ra8_gpio_read(ra8_port_pin_t pin, ra8_level_t *out_level)
Read a previously-configured input.
Definition gpio.c:210
ra8_err_t ra8_gpio_input_init(ra8_port_pin_t pin, ra8_pin_pull_t pull)
Configure a pin as a digital input.
Definition gpio.c:121
ra8_err_t ra8_pfs_set_drive_strength(ra8_port_pin_t pin, ra8_pfs_dscr_t dscr)
Set the output drive strength (PmnPFS.DSCR) of an already-routed pin.
Definition gpio.c:287
ra8_err_t ra8_gpio_toggle(ra8_port_pin_t pin)
Toggle a previously-configured output.
Definition gpio.c:182
ra8_err_t ra8_gpio_output_init(ra8_port_pin_t pin, ra8_level_t init_level)
Configure a pin as a digital output and drive it to an initial level.
Definition gpio.c:88
ra8_err_t ra8_gpio_write(ra8_port_pin_t pin, ra8_level_t level)
Drive a previously-configured output to the given level.
Definition gpio.c:154
ra8_err_t ra8_gpio_detach_irq(ra8_port_pin_t pin, uint8_t irq_num)
Tear down a previously attached external IRQ.
Definition gpio.c:388
ra8_err_t ra8_gpio_release(ra8_port_pin_t pin)
Release a GPIO pin claim.
Definition gpio.c:233
ra8_err_t ra8_gpio_attach_irq(ra8_port_pin_t pin, uint8_t irq_num, const ra8_gpio_irq_cfg_t *cfg, ra8_isr_handler_t handler, void *ctx)
Wire a pin as an external IRQ input and install a handler.
Definition gpio.c:341
ra8_err_t ra8_pfs_route_peripheral(ra8_port_pin_t pin, ra8_psel_t psel, const char *owner)
Route a pin to a non-IRQ peripheral function via PFS.PSEL.
Definition gpio.c:238
Configuration descriptor for ra8_gpio_attach_irq.
ra8_icu_irqmd_t sense
Edge / level detection mode.
ra8_icu_fclksel_t filter_div
Digital filter clock divider.
uint8_t priority
NVIC priority 0..15.
ra8_pin_pull_t pull
Input pull setting.
bool filter_en
True -> enable digital filter.