ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_board_ek_ra8d2_connectors.h File Reference

Board-identity, LEDs, switches, display, audio, Arduino, Pmod, and MikroBUS portion of the EK-RA8D2 v1 board-support layer. More...

#include <stddef.h>
#include <stdint.h>
#include "ra8_err.h"
#include "ra8_port_constants.h"
Include dependency graph for ra8_board_ek_ra8d2_connectors.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  ra8_board_info_t
 Snapshot of board identity strings. More...
struct  ra8_board_glcdc_pin_t
 One row of the GLCDC pin table – (signal name, RA8D2 pin). More...

Typedefs

typedef void(* ra8_board_sw_irq_cb_t) (void *ctx)
 Switch IRQ callback signature.

Enumerations

enum  ra8_board_led_id_t : uint8_t {
  k_ra8_board_led1 = 0U ,
  k_ra8_board_led2 = 1U ,
  k_ra8_board_led3 = 2U ,
  k_ra8_board_led_blue = k_ra8_board_led1 ,
  k_ra8_board_led_green = k_ra8_board_led2 ,
  k_ra8_board_led_red = k_ra8_board_led3 ,
  k_ra8_board_led_count = 3U
}
 Identifiers for the three user LEDs on EK-RA8D2 v1. More...
enum  ra8_board_sw_id_t : uint8_t {
  k_ra8_board_sw1 = 0U ,
  k_ra8_board_sw2 = 1U ,
  k_ra8_board_sw_count = 2U
}
 Identifiers for the on-board user push-buttons. More...
enum  ra8_board_sw_irq_t : uint8_t {
  k_ra8_board_sw1_irq = 13U ,
  k_ra8_board_sw2_irq = 12U
}
 Per-switch IRQ channel numbers (UM Table 25 p 32). More...
enum  ra8_board_sw_state_t : uint8_t {
  k_ra8_board_sw_released = 0U ,
  k_ra8_board_sw_pressed = 1U
}
 Logical "pressed" / "released" state. More...
enum  ra8_board_glcdc_fmt_t : uint8_t {
  k_ra8_board_glcdc_fmt_rgb888 = 0U ,
  k_ra8_board_glcdc_fmt_rgb666 = 1U ,
  k_ra8_board_glcdc_fmt_rgb565 = 2U
}
 GLCDC parallel-RGB pixel formats supported by EK-RA8D2 J1. More...
enum  ra8_board_lcd_gpio_pin_t : uint16_t {
  k_ra8_board_lcd_reset_l = (uint16_t)k_ra8_pin_lcd_reset_l ,
  k_ra8_board_lcd_blen = (uint16_t)k_ra8_pin_lcd_blen
}
 Board-style aliases for the J1 LCD GPIO control pins. More...
enum  ra8_board_audio_pin_t : uint16_t {
  k_ra8_board_audio_pin_bclk ,
  k_ra8_board_audio_pin_wclk ,
  k_ra8_board_audio_pin_datin ,
  k_ra8_board_audio_pin_datout ,
  k_ra8_board_audio_pin_mclk ,
  k_ra8_board_audio_pin_i2c_sda ,
  k_ra8_board_audio_pin_i2c_scl
}
 Pin assignments for the on-board DA7212 audio CODEC. More...
enum  ra8_board_audio_ch_t : uint8_t { k_ra8_board_audio_ssie_channel = 0U }
 SSIE channel the CODEC is wired to. More...
enum  ra8_board_arduino_pin_t : uint16_t {
  k_ra8_board_arduino_d0 ,
  k_ra8_board_arduino_d1 ,
  k_ra8_board_arduino_d2 ,
  k_ra8_board_arduino_d3 ,
  k_ra8_board_arduino_d4 ,
  k_ra8_board_arduino_d5 ,
  k_ra8_board_arduino_d6 ,
  k_ra8_board_arduino_d7 ,
  k_ra8_board_arduino_d8 ,
  k_ra8_board_arduino_d9 ,
  k_ra8_board_arduino_d10 ,
  k_ra8_board_arduino_d11 ,
  k_ra8_board_arduino_d12 ,
  k_ra8_board_arduino_d13 ,
  k_ra8_board_arduino_d14 ,
  k_ra8_board_arduino_d15 ,
  k_ra8_board_arduino_a0 ,
  k_ra8_board_arduino_a1 ,
  k_ra8_board_arduino_a2 ,
  k_ra8_board_arduino_a3 ,
  k_ra8_board_arduino_a4 ,
  k_ra8_board_arduino_a5
}
 Logical Arduino-header pins mapped to RA8D2 port pins. More...
enum  ra8_board_arduino_mode_t : uint8_t {
  k_ra8_board_arduino_mode_input = 0U ,
  k_ra8_board_arduino_mode_input_pullup = 1U ,
  k_ra8_board_arduino_mode_output = 2U
}
 Direction mode for an Arduino-header GPIO pin. More...
enum  ra8_board_pmod_id_t : uint8_t {
  k_ra8_board_pmod1 = 0U ,
  k_ra8_board_pmod2 = 1U ,
  k_ra8_board_pmod_count = 2U
}
 Identifiers for the two Pmod sockets. More...
enum  ra8_board_pmod1_spi_pin_t : uint16_t {
  k_ra8_board_pmod1_spi_cs = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_8) << 8) | (uint16_t)(k_ra8_pin_4))) ,
  k_ra8_board_pmod1_spi_copi ,
  k_ra8_board_pmod1_spi_cipo ,
  k_ra8_board_pmod1_spi_sck
}
 Pin assignments for Pmod1 (J26) in SPI mode (UM Table 17 p 26). More...
enum  ra8_board_pmod1_uart_pin_t : uint16_t {
  k_ra8_board_pmod1_uart_txd ,
  k_ra8_board_pmod1_uart_rxd ,
  k_ra8_board_pmod1_uart_cts ,
  k_ra8_board_pmod1_uart_rts
}
 Pin assignments for Pmod1 (J26) in UART mode (UM Table 17 p 26). More...
enum  ra8_board_pmod1_i2c_pin_t : uint16_t {
  k_ra8_board_pmod1_i2c_sda ,
  k_ra8_board_pmod1_i2c_scl
}
 Pin assignments for Pmod1 (J26) in I2C mode (UM Table 17 p 26). More...
enum  ra8_board_pmod1_gpio_pin_t : uint16_t {
  k_ra8_board_pmod1_irq ,
  k_ra8_board_pmod1_reset ,
  k_ra8_board_pmod1_gpio_a ,
  k_ra8_board_pmod1_gpio_b
}
 Pin assignments for Pmod1 GPIO + IRQ side-band (UM Table 17 p 26). More...
enum  ra8_board_pmod_sci_channel_t : uint8_t {
  k_ra8_board_pmod1_sci_channel = 2U ,
  k_ra8_board_pmod2_sci_channel = 0U
}
 SCI channels that back the two Pmod sockets in Simple-SPI mode. More...
enum  ra8_board_pmod2_spi_pin_t : uint16_t {
  k_ra8_board_pmod2_spi_cs = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_6) << 8) | (uint16_t)(k_ra8_pin_4))) ,
  k_ra8_board_pmod2_spi_copi ,
  k_ra8_board_pmod2_spi_cipo ,
  k_ra8_board_pmod2_spi_sck
}
 Pin assignments for Pmod2 (J25) in SPI mode (UM Table 19 p 27). More...
enum  ra8_board_pmod2_uart_pin_t : uint16_t {
  k_ra8_board_pmod2_uart_txd ,
  k_ra8_board_pmod2_uart_rxd ,
  k_ra8_board_pmod2_uart_cts ,
  k_ra8_board_pmod2_uart_rts
}
 Pin assignments for Pmod2 (J25) in UART mode (UM Table 19 p 27). More...
enum  ra8_board_pmod2_gpio_pin_t : uint16_t {
  k_ra8_board_pmod2_irq ,
  k_ra8_board_pmod2_reset ,
  k_ra8_board_pmod2_gpio_a ,
  k_ra8_board_pmod2_gpio_b
}
 Pin assignments for Pmod2 GPIO + IRQ side-band (UM Table 19 p 27). More...
enum  ra8_board_mikrobus_pin_t : uint16_t {
  k_ra8_board_mikrobus_an = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_0) << 8) | (uint16_t)(k_ra8_pin_4))) ,
  k_ra8_board_mikrobus_rst = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_2) << 8) | (uint16_t)(k_ra8_pin_1))) ,
  k_ra8_board_mikrobus_cs = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_1) << 8) | (uint16_t)(k_ra8_pin_3))) ,
  k_ra8_board_mikrobus_sck = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_1) << 8) | (uint16_t)(k_ra8_pin_2))) ,
  k_ra8_board_mikrobus_cipo = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_1) << 8) | (uint16_t)(k_ra8_pin_0))) ,
  k_ra8_board_mikrobus_copi = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_1) << 8) | (uint16_t)(k_ra8_pin_1))) ,
  k_ra8_board_mikrobus_pwm = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_8) << 8) | (uint16_t)(k_ra8_pin_10))) ,
  k_ra8_board_mikrobus_int = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_13) << 8) | (uint16_t)(k_ra8_pin_1))) ,
  k_ra8_board_mikrobus_rx = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_8) << 8) | (uint16_t)(k_ra8_pin_8))) ,
  k_ra8_board_mikrobus_tx = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_8) << 8) | (uint16_t)(k_ra8_pin_9)))
}
 MikroBUS slot wiring on this board. More...
enum  ra8_board_mikrobus_i2c_pin_t : uint16_t {
  k_ra8_board_mikrobus_i2c_sda = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_5) << 8) | (uint16_t)(k_ra8_pin_11))) ,
  k_ra8_board_mikrobus_i2c_scl = (uint16_t) ((ra8_port_pin_t)(((uint16_t)(k_ra8_port_5) << 8) | (uint16_t)(k_ra8_pin_12)))
}
 MikroBUS J22.5 / J22.6 I2C lines. More...
enum  ra8_board_mikrobus_iic_channel_t : uint8_t { k_ra8_board_mikrobus_iic_b_channel = 0U }
 I2C peripheral channel that backs the MikroBUS SDA/SCL pins. More...
enum  ra8_board_mikrobus_uart_channel_t : uint8_t { k_ra8_board_mikrobus_uart_sci_channel = 7U }
 SCI channel that backs the MikroBUS J22.3/J22.4 UART pins. More...
enum  ra8_board_pi4ioe_project_t : uint8_t {
  k_ra8_board_pi4ioe_output_project_default = 0xF2U ,
  k_ra8_board_pi4ioe_output_octospi_active = 0xF8U ,
  k_ra8_board_pi4ioe_output_usbhs_host = 0x72U
}
 Required SW4 DIP-switch positions for this project's wiring. More...
enum  ra8_board_sdhi_pin_t : uint16_t {
  k_ra8_board_sdhi_cmd ,
  k_ra8_board_sdhi_clk ,
  k_ra8_board_sdhi_dat0 ,
  k_ra8_board_sdhi_dat1 ,
  k_ra8_board_sdhi_dat2 ,
  k_ra8_board_sdhi_dat3 ,
  k_ra8_board_sdhi_wp ,
  k_ra8_board_sdhi_cd
}
 Pin assignments for the native 4-bit SDHI0 micro-SD bus. More...
enum  ra8_board_sdhi_instance_t : uint8_t { k_ra8_board_sdhi_instance = 0U }
 SDHI instance that backs the ra8_board_sdhi_pin_t bus pins. More...

Functions

ra8_err_t ra8_board_get_info (ra8_board_info_t *out)
 Copy the three board-identity strings into out.
ra8_err_t ra8_board_led_init (ra8_board_led_id_t led)
 Configure led as a digital output, initial level low (off).
ra8_err_t ra8_board_led_on (ra8_board_led_id_t led)
 Drive led HIGH (light it).
ra8_err_t ra8_board_led_off (ra8_board_led_id_t led)
 Drive led LOW (extinguish it).
ra8_err_t ra8_board_led_toggle (ra8_board_led_id_t led)
 Toggle led's output state.
ra8_err_t ra8_board_led_pin (ra8_board_led_id_t led, ra8_port_pin_t *out_pin)
 Translate a board LED id into its underlying ra8_port_pin_t.
ra8_err_t ra8_board_sw_init (ra8_board_sw_id_t sw)
 Configure a switch pin as an input with internal pull-up.
ra8_err_t ra8_board_sw_read (ra8_board_sw_id_t sw, ra8_board_sw_state_t *out_pressed)
 Sample the current state of sw.
ra8_err_t ra8_board_sw_attach_irq (ra8_board_sw_id_t sw, ra8_board_sw_irq_cb_t cb, void *ctx)
 Wire sw to the ICU and register a falling-edge callback.
ra8_err_t ra8_board_sw_pin (ra8_board_sw_id_t sw, ra8_port_pin_t *out_pin)
 Translate a board switch id into its underlying ra8_port_pin_t.
ra8_err_t ra8_board_glcdc_init (ra8_board_glcdc_fmt_t fmt)
 Program every J1 pin for fmt to its GLCDC alternate function.
ra8_err_t ra8_board_lcd_panel_power_on (void)
 Pulse the J1 panel's RESET_L line and assert BLEN backlight.
ra8_err_t ra8_board_backlight_set (bool on)
 Turn the J1 panel backlight (BLEN, P514) on or off.
ra8_err_t ra8_board_audio_init (uint32_t sample_rate_hz, uint8_t bit_depth, uint8_t channels)
 Route the CODEC pins and bring up SSIE0 in I2S controller mode.
ra8_err_t ra8_board_audio_play_sample_block (const int16_t *buf, uint32_t len)
 Push one block of stereo PCM samples to the CODEC's DAC.
ra8_err_t ra8_board_arduino_pin_init (ra8_board_arduino_pin_t pin, ra8_board_arduino_mode_t mode)
 Configure an Arduino header pin in GPIO mode.
ra8_err_t ra8_board_arduino_gpio_write (ra8_board_arduino_pin_t pin, ra8_level_t level)
 Drive a previously-initialized Arduino GPIO pin.
ra8_err_t ra8_board_arduino_gpio_read (ra8_board_arduino_pin_t pin, ra8_level_t *out_level)
 Sample a previously-initialized Arduino GPIO pin.
ra8_err_t ra8_board_sdhi_pins_init (void)
 Route the eight SDHI0 bus pins to the SDHI peripheral function.

Variables

const char *const k_ra8_board_name
 Human-readable strings identifying this BSP target.
const char *const k_ra8_board_doc_rev
 "R20UT5523EG0101 Rev 1.01".
const char *const k_ra8_board_mcu
 "R7KA8D2KFLCAC".
const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb888_pins []
 Pin tables for J1 in each pixel format (UM Table 33 p 42).
const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb666_pins []
 RGB666-mode pin table for J1 (UM Table 33 p 42).
const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb565_pins []
 RGB565-mode pin table for J1 (UM Table 33 p 42).
const uint32_t g_ra8_board_glcdc_rgb888_pin_count
 Number of entries in each per-format pin table.
const uint32_t g_ra8_board_glcdc_rgb666_pin_count
const uint32_t g_ra8_board_glcdc_rgb565_pin_count

Detailed Description

Board-identity, LEDs, switches, display, audio, Arduino, Pmod, and MikroBUS portion of the EK-RA8D2 v1 board-support layer.

Tag
[Ring 5 / BSP] {World: S}

Sub-header of ra8_board_ek_ra8d2.h (the thin umbrella). Carries the board-identity strings + struct, the user LEDs (Section 1), user switches (Section 2), the parallel-RGB graphics expansion connector J1 (Section 3), the DA7212 audio CODEC (Section 4), the Arduino Uno header (Section 5), the Pmod1/Pmod2 sockets (Section 6), and the MikroBUS slot (Section 6b) together with the project SW4 DIP layout enum (Section 6c).

Every declaration here was moved VERBATIM out of ra8_board_ek_ra8d2.h; no contract, Doxygen block, or HUM/UM citation has changed. Consumers keep including ra8_board_ek_ra8d2.h; this file is pulled in by that umbrella and should not be included directly.

Authoritative source: docs/reference/ek-ra8d2-v1-users-manual.pdf (Rev 1.01, R20UT5523EG0101, October 2025).

Since
0.1.0

Definition in file ra8_board_ek_ra8d2_connectors.h.

Typedef Documentation

◆ ra8_board_sw_irq_cb_t

typedef void(* ra8_board_sw_irq_cb_t) (void *ctx)

Switch IRQ callback signature.

Definition at line 231 of file ra8_board_ek_ra8d2_connectors.h.

Enumeration Type Documentation

◆ ra8_board_arduino_mode_t

enum ra8_board_arduino_mode_t : uint8_t

Direction mode for an Arduino-header GPIO pin.

Enumerator
k_ra8_board_arduino_mode_input 

RA8 board arduino mode input.

k_ra8_board_arduino_mode_input_pullup 

RA8 board arduino mode input pullup.

k_ra8_board_arduino_mode_output 

RA8 board arduino mode output.

Definition at line 528 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_arduino_pin_t

enum ra8_board_arduino_pin_t : uint16_t

Logical Arduino-header pins mapped to RA8D2 port pins.

Per UM Table 20 ("Arduino Uno Port Assignments"). Several pins are gated by SW4-4 (Arduino vs Octo-SPI). PWM/GTIOC routings noted in UM Table 20 are reflected in the comments. SW4-4 must be ON to use the Arduino headers (default OFF prioritises Octo-SPI).

Enumerator
k_ra8_board_arduino_d0 

D0 RXD7/GTIOC13B, P808.

UM Table 20 p 28.

k_ra8_board_arduino_d1 

D1 TXD7, P809.

UM Table 20 p 28.

k_ra8_board_arduino_d2 

D2 INT0/IRQ16, P011.

UM Table 20 p 28.

k_ra8_board_arduino_d3 

D3 INT1/GTIOC10B, P811.

UM Table 20 p 28.

k_ra8_board_arduino_d4 

D4 GTIOC10A/IRQ21, P810.

UM Table 20 p 28.

k_ra8_board_arduino_d5 

D5 GTIOC1B/IRQ1, P104.

UM Table 20 p 28.

k_ra8_board_arduino_d6 

D6 GTIOC1A/IRQ0, P105.

UM Table 20 p 28.

k_ra8_board_arduino_d7 

D7 IRQ22-DS, P312.

UM Table 20 p 28.

k_ra8_board_arduino_d8 

D8 IRQ22, PD01.

UM Table 20 p 28.

k_ra8_board_arduino_d9 

D9 GTIOC9B/IRQ20, P110.

UM Table 20 p 28.

k_ra8_board_arduino_d10 

D10 SPI_SS / GTIOC2A, P103.

UM Table 20 p 28.

k_ra8_board_arduino_d11 

D11 SPI_MOSI / GTIOC8A,P101.

UM Table 20 p 28.

k_ra8_board_arduino_d12 

D12 SPI_MISO / GTIOC8B,P100.

UM Table 20 p 28.

k_ra8_board_arduino_d13 

D13 SPI_SCK / GTIOC2B, P102.

UM Table 20 p 28.

k_ra8_board_arduino_d14 

D14 SDA1 (or SDA0=P401 if SW4-5 ON), P511.

UM Table 20 p 28.

k_ra8_board_arduino_d15 

D15 SCL1 (or SCL0=P400 if SW4-5 ON), P512.

UM Table 20 p 28.

k_ra8_board_arduino_a0 

A0 AN001, P001.

UM Table 20 p 28.

k_ra8_board_arduino_a1 

A1 AN007, P007.

UM Table 20 p 28.

k_ra8_board_arduino_a2 

A2 AN003, P003.

UM Table 20 p 28.

k_ra8_board_arduino_a3 

A3 AN004, P004.

UM Table 20 p 28.

k_ra8_board_arduino_a4 

A4 AN014/DA0, P014.

UM Table 20 p 28.

k_ra8_board_arduino_a5 

A5 AN015/DA1, P015.

UM Table 20 p 28.

Definition at line 465 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_audio_ch_t

enum ra8_board_audio_ch_t : uint8_t

SSIE channel the CODEC is wired to.

P403..P406 carry SSIE0 signals on the RA8D2 (see chip HUM I/O Ports chapter for PSEL values). Channel selection itself is not in the EK-RA8D2 board manual, only the chip pins.

Enumerator
k_ra8_board_audio_ssie_channel 

RA8 board audio ssie channel.

Definition at line 418 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_audio_pin_t

enum ra8_board_audio_pin_t : uint16_t

Pin assignments for the on-board DA7212 audio CODEC.

Per UM Table 32 ("Audio CODEC Port Pin Assignments"). P405/P406 are shared with the parallel-camera connector via jumper J41; the camera and CODEC cannot be used simultaneously.

Enumerator
k_ra8_board_audio_pin_bclk 

P403, EK-RA8D2 UM Table 32 p 38.

k_ra8_board_audio_pin_wclk 

P404, EK-RA8D2 UM Table 32 p 38.

k_ra8_board_audio_pin_datin 

P405 (J41), EK-RA8D2 UM Table 32 p 38.

k_ra8_board_audio_pin_datout 

P406 (J41), EK-RA8D2 UM Table 32 p 38.

k_ra8_board_audio_pin_mclk 

PD06, EK-RA8D2 UM Table 32 p 38.

k_ra8_board_audio_pin_i2c_sda 

P511 (SDA1), EK-RA8D2 UM Table 32 p 38.

k_ra8_board_audio_pin_i2c_scl 

P512 (SCL1), EK-RA8D2 UM Table 32 p 38.

Definition at line 393 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_glcdc_fmt_t

enum ra8_board_glcdc_fmt_t : uint8_t

GLCDC parallel-RGB pixel formats supported by EK-RA8D2 J1.

Enumerator
k_ra8_board_glcdc_fmt_rgb888 

24-bit, 8 bits/colour.

k_ra8_board_glcdc_fmt_rgb666 

18-bit, 6 bits/colour.

k_ra8_board_glcdc_fmt_rgb565 

16-bit, 5/6/5 bits.

Definition at line 262 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_lcd_gpio_pin_t

enum ra8_board_lcd_gpio_pin_t : uint16_t

Board-style aliases for the J1 LCD GPIO control pins.

The underlying ra8_port_pin_t enum members live in libs/ra8_core/inc/ra8_port_constants.h (the same place LED1/2/3 are declared) so casting them to ra8_port_pin_t is type-safe for the analyzer. Source: EK-RA8D2 v1 UM Table 33 p 42.

Enumerator
k_ra8_board_lcd_reset_l 

J1-6 RST, P606 (active-low).

k_ra8_board_lcd_blen 

J1-1 BLEN, P514 (active-high).

Definition at line 319 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_led_id_t

enum ra8_board_led_id_t : uint8_t

Identifiers for the three user LEDs on EK-RA8D2 v1.

Pins per UM Table 24 ("EK-RA8D2 Board LED Functions"). Trace-cut jumpers E27/E26/E28 (closed by default) tie the LEDs to P600/P303/PA07 respectively. All three LEDs are active-high.

Enumerator
k_ra8_board_led1 

LED1, BLUE, P600 (jumper E27).

EK-RA8D2 UM Table 24 p 31.

k_ra8_board_led2 

LED2, GREEN, P303 (jumper E26).

EK-RA8D2 UM Table 24 p 31.

k_ra8_board_led3 

LED3, RED, PA07 (jumper E28).

EK-RA8D2 UM Table 24 p 31.

k_ra8_board_led_blue 

Convenience aliases by colour.

k_ra8_board_led_green 

RA8 board led green.

k_ra8_board_led_red 

RA8 board led red.

k_ra8_board_led_count 

RA8 board led count.

Definition at line 100 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_mikrobus_i2c_pin_t

MikroBUS J22.5 / J22.6 I2C lines.

Per UM Table 21 footnote *1, the I3C/I2C pads are switched by SW4-5: OFF = I2C -> P511 (SDA1) / P512 (SCL1); ON = I3C -> P401 (SDA0) / P400 (SCL0). This project always runs in I2C mode, so the symbols below resolve to SDA1/SCL1. Per UM Section 5.4.2 p 30, the on-board pull-ups are not enabled by default; firmware must either enable the internal pad pull-ups via PFS.PCR or rely on the pull-ups inside the IIC_B controller / Click board itself.

Enumerator
k_ra8_board_mikrobus_i2c_sda 

J22.6 SDA (SW4-5 OFF) -> P511 SDA1.

k_ra8_board_mikrobus_i2c_scl 

J22.5 SCL (SW4-5 OFF) -> P512 SCL1.

Definition at line 785 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_mikrobus_iic_channel_t

I2C peripheral channel that backs the MikroBUS SDA/SCL pins.

The RA8D2 group exposes a single IIC_B controller (channel 0). The P511/P512 pins are its SDA1/SCL1 alternate-function pad pair (the SDA0/SCL0 pads at P401/P400 are gated by SW4-5 and not used here). Firmware that talks to a MikroBUS Click over I2C should call ra8_i3c_i2c_init with this channel.

Enumerator
k_ra8_board_mikrobus_iic_b_channel 

RA8 board mikrobus iic b channel.

Definition at line 801 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_mikrobus_pin_t

enum ra8_board_mikrobus_pin_t : uint16_t

MikroBUS slot wiring on this board.

The EK-RA8D2 v1 carries a mikroBUS-compatible footprint at J21/J22 in the center of the System Control + Ecosystem Access area (UM Rev 1.01 Section 5.3.5 Figure 16 p 29). The socket is not populated by default; the user can either solder the standard mikroBUS headers onto J21/J22 to plug a MikroE Click in directly, or use a Click-Shield-style breakout over the Arduino UNO header (Table 20 p 28) – both routes terminate at the same RA8D2 pads.

For this project's physical bring-up:

  • Pmod1 (J26) is unused. Wi-Fi/BLE/OTA is handled by an ESP32 companion IC (forthcoming), not a Pmod daughter card.
  • Pmod2 (J25) is occupied by the Digilent PMOD MicroSD (uses RSPI-B).
  • The MikroBUS slot carries the MikroE LSM6DSO IMU 12 Click and is used in I2C mode only (SW4-4 ON to enable the MikroBUS pads, SW4-5 OFF to route the I2C/I3C pads to SDA1/SCL1).

Per UM Table 21 p 29, all twelve mikroBUS signals are mapped below. Software callers should only enable the subset they need (e.g. the IMU demo touches just I2C).

Reference:
EK-RA8D2 v1 UM Rev 1.01 Table 21 p 29 (mikroBUS Port Assignments).
Enumerator
k_ra8_board_mikrobus_an 

J21.1 AN – analog input.

k_ra8_board_mikrobus_rst 

J21.2 RST – reset out to the Click.

P201 also doubles as MD pin.

k_ra8_board_mikrobus_cs 

J21.3 CS – SPI chip-select (SSLB0, SW4-4 ON).

k_ra8_board_mikrobus_sck 

J21.4 SCK – SPI clock (RSPCKB, SW4-4 ON).

k_ra8_board_mikrobus_cipo 

J21.5 CIPO – Controller In, Peripheral Out (UM names this MISOB, SW4-4 ON).

k_ra8_board_mikrobus_copi 

J21.6 COPI – Controller Out, Peripheral In (UM names this MOSIB, SW4-4 ON).

k_ra8_board_mikrobus_pwm 

J22.1 PWM – GTIOC10A.

k_ra8_board_mikrobus_int 

J22.2 INT – hardware interrupt (IRQ-22).

k_ra8_board_mikrobus_rx 

J22.3 RX – UART RX (RXD7, SW4-4 ON).

k_ra8_board_mikrobus_tx 

J22.4 TX – UART TX (TXD7, SW4-4 ON).

Definition at line 751 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_mikrobus_uart_channel_t

SCI channel that backs the MikroBUS J22.3/J22.4 UART pins.

The MikroBUS RX/TX pads (k_ra8_board_mikrobus_rx = P808 / k_ra8_board_mikrobus_tx = P809, UM Table 21 p 29) are the RXD7 / TXD7 alternate-function pair, i.e. SCI channel 7, enabled by SW4-4 ON. A MikroE cellular Click (LTE IoT / 4G LTE / NB-IoT, all AT-command modems) presents its UART on exactly these MikroBUS pins, so firmware that drives an AT modem should call ra8_sci_init with this channel.

Exposed as an enum (not a magic 7) so applications reference the channel through the board layer rather than re-encoding the pin-mux mapping. Distinct from k_ra8_board_uart_console_sci_channel (SCI8, the J-Link OB VCOM debug console).

Enumerator
k_ra8_board_mikrobus_uart_sci_channel 

P808/P809 -> RXD7/TXD7 = SCI7 (SW4-4 ON).

Definition at line 821 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pi4ioe_project_t

Required SW4 DIP-switch positions for this project's wiring.

The on-board SW4 8-position DIP picks which of the chip's muxed peripherals the EK-RA8D2 routes to its connectors. Per UM Table 3 p 16, each bit governs a different routing decision, several of which conflict (SW4-3 vs SW4-4 vs the Pmod1 mode bits). The layout below is the one this project's wiring assumes:

SW4 Position Reason
1 ON Pmod1 Mode-Sel-1 (with SW4-2 OFF -> UART; Pmod1 free).
2 OFF Pmod1 Mode-Sel-2 (UART, see Table 18).
3 ON Octo-SPI Inactive – frees Pmod1/Arduino/mikroBUS.
4 ON Arduino + mikroBUS Connectors Active (IMU on mikroBUS).
5 OFF I2C Active on mikroBUS (P511/P512 SDA1/SCL1).
6 OFF Default – Parallel Display + MIPI Camera.
7 OFF Default – USBFS role toggle in mechanical OFF.
8 OFF Default – USBHS in Device mode.

ra8_board_io_expander_apply_project_sw4_defaults programs this pattern into the U15 PI4IOE5V6408 expander in push-pull output mode (iodir=0xFF, hiz=0x00, output=0xF2), which the EK-RA8D2 UM (Sec 4.3.4 p 15) says overrides the SW4 DIP switches in software. The earlier issue-#44 reading of u15: pins=0000 was a FALSE ALARM: a 2026-06-11 U15 drive test (out=FF->pins=0000 out=00->pins=0000) shows the PI4IOE5V6408 input-status register (0x0F) reads 0x00 for any pin held in output mode – it does not reflect output pins – so it never measured the mux. The override is valid; the DIP does NOT need to be touched for this layout.

Reference:
EK-RA8D2 v1 UM Rev 1.01 Table 3 p 16 (Switch Configuration Definitions) and Table 18 p 26 (Pmod 1 Switch Configuration).
Enumerator
k_ra8_board_pi4ioe_output_project_default 

U15 output byte that drives the SW4 layout above.

Bit n = 1 -> SW4-(n+1) reads OFF; bit n = 0 -> reads ON.

k_ra8_board_pi4ioe_output_octospi_active 

U15 output byte that ELECTRICALLY ENABLES the on-board Octo-SPI flash.

Written to PI4IOE5V6408 reg 0x05 (Output State). Meaning derived from the PI4IOE5V6408 datasheet register map + EK-RA8D2 v1 UM Sec 4.3.4 (U15 overrides SW4): all outputs HIGH except OPMOD1/0 mode-selects (bits 0,1) and OSPI_OE_L (bit 2), which are LOW. Bit 2 = OSPI_OE_L is active-low: driving it LOW connects the flash's OM_0 bus to the MCU. Our prior 0xFF held OSPI_OE_L HIGH and kept the flash off the bus – the root cause of issue #44. The exact U15-bit <-> SW4-channel mapping is NOT published in the UM (it lives in the EK-RA8D2 Design Package schematic); this byte is derived, and the on-hardware verification of the mapping on this EVM is tracked with the U15 bring-up work.

k_ra8_board_pi4ioe_output_usbhs_host 

Project layout with USBHS in HOST role: the project default (0xF2) with bit 7 (SW4-8, USBHS role) driven LOW = ON = Host, so the board supplies VBUS on the J7 jack instead of expecting it.

Definition at line 866 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod1_gpio_pin_t

enum ra8_board_pmod1_gpio_pin_t : uint16_t

Pin assignments for Pmod1 GPIO + IRQ side-band (UM Table 17 p 26).

Enumerator
k_ra8_board_pmod1_irq 

Pmod1.7 IRQ (IRQ11-DS), P006.

UM Table 17 p 26.

k_ra8_board_pmod1_reset 

Pmod1.8 RESET, P402.

UM Table 17 p 26.

k_ra8_board_pmod1_gpio_a 

Pmod1.9 GPIO, P412.

UM Table 17 p 26.

k_ra8_board_pmod1_gpio_b 

Pmod1.10 GPIO, P413.

UM Table 17 p 26.

Definition at line 620 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod1_i2c_pin_t

enum ra8_board_pmod1_i2c_pin_t : uint16_t

Pin assignments for Pmod1 (J26) in I2C mode (UM Table 17 p 26).

Enumerator
k_ra8_board_pmod1_i2c_sda 

Pmod1 I2C SDA (SDA1), P511.

UM Table 17 p 26.

k_ra8_board_pmod1_i2c_scl 

Pmod1 I2C SCL (SCL1), P512.

UM Table 17 p 26.

Definition at line 610 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod1_spi_pin_t

enum ra8_board_pmod1_spi_pin_t : uint16_t

Pin assignments for Pmod1 (J26) in SPI mode (UM Table 17 p 26).

Pmod1 uses SCI2 in "Simple SPI" mode and is selected by SW4-1=OFF

  • SW4-2=OFF (default). Pmod1 conflicts with Octo-SPI when SPI/UART is selected.
Enumerator
k_ra8_board_pmod1_spi_cs 

Pmod1.1 CS (SS2/IRQ14), P804.

UM Table 17 p 26.

k_ra8_board_pmod1_spi_copi 

Pmod1.2 COPI (MOSI2/TXD2 per UM),P801.

UM Table 17 p 26.

k_ra8_board_pmod1_spi_cipo 

Pmod1.3 CIPO (MISO2/RXD2 per UM),P802.

UM Table 17 p 26.

k_ra8_board_pmod1_spi_sck 

Pmod1.4 SCK (SCK2), P803.

UM Table 17 p 26.

Definition at line 579 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod1_uart_pin_t

enum ra8_board_pmod1_uart_pin_t : uint16_t

Pin assignments for Pmod1 (J26) in UART mode (UM Table 17 p 26).

Enumerator
k_ra8_board_pmod1_uart_txd 

Pmod1 UART TXD (TXD2), P801.

UM Table 17 p 26.

k_ra8_board_pmod1_uart_rxd 

Pmod1 UART RXD (RXD2), P802.

UM Table 17 p 26.

k_ra8_board_pmod1_uart_cts 

Pmod1 UART CTS (CTS2), P800.

UM Table 17 p 26.

k_ra8_board_pmod1_uart_rts 

Pmod1 UART RTS (RTS2), P804.

UM Table 17 p 26.

Definition at line 594 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod2_gpio_pin_t

enum ra8_board_pmod2_gpio_pin_t : uint16_t

Pin assignments for Pmod2 GPIO + IRQ side-band (UM Table 19 p 27).

Enumerator
k_ra8_board_pmod2_irq 

Pmod2.7 IRQ (IRQ15), P012.

UM Table 19 p 27.

k_ra8_board_pmod2_reset 

Pmod2.8 RESET, P410.

UM Table 19 p 27.

k_ra8_board_pmod2_gpio_a 

Pmod2.9 GPIO, P409.

UM Table 19 p 27.

k_ra8_board_pmod2_gpio_b 

Pmod2.10 GPIO, P704.

UM Table 19 p 27.

Definition at line 706 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod2_spi_pin_t

enum ra8_board_pmod2_spi_pin_t : uint16_t

Pin assignments for Pmod2 (J25) in SPI mode (UM Table 19 p 27).

Pmod2 SPI on P601..P604 is SCI0 in Simple-SPI mode, not the RSPI/SPI_B peripheral: HUM Table 20.13 (PORT6) routes these pins at PSEL = 00100b (k_ra8_psel_sci_async) to SCK0_B / CIPO0_B (MISO0_B) / COPI0_B (MOSI0_B) / SS0_B – the SPI (PSEL = 00110b) function has no mapping on P601..P604 (RSPCKB/MOSIB/MISOB live on P609..P611). The EK UM Table 19 labels them RSPCKB/MOSIB/MISOB after the bus role, but the silicon drives them from SCI0; use ::ra8_sci_spi (channel 0) as the controller. Both UART and Simple-SPI share the SCI function; jumpers E10/E14/E15/E16 select SPI vs UART signalling on pins 1/4.

Enumerator
k_ra8_board_pmod2_spi_cs 

Pmod2.1 CS (SS0_B), P604.

UM Table 19 p 27.

k_ra8_board_pmod2_spi_copi 

Pmod2.2 COPI (COPI0_B), P603.

UM Table 19 p 27.

k_ra8_board_pmod2_spi_cipo 

Pmod2.3 CIPO (CIPO0_B), P602.

UM Table 19 p 27.

k_ra8_board_pmod2_spi_sck 

Pmod2.4 SCK (SCK0_B), P601.

UM Table 19 p 27.

Definition at line 675 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod2_uart_pin_t

enum ra8_board_pmod2_uart_pin_t : uint16_t

Pin assignments for Pmod2 (J25) in UART mode (UM Table 19 p 27).

Enumerator
k_ra8_board_pmod2_uart_txd 

Pmod2 UART TXD (TXD0), P603.

UM Table 19 p 27.

k_ra8_board_pmod2_uart_rxd 

Pmod2 UART RXD (RXD0), P602.

UM Table 19 p 27.

k_ra8_board_pmod2_uart_cts 

Pmod2 UART CTS (CTS0), P605.

UM Table 19 p 27.

k_ra8_board_pmod2_uart_rts 

Pmod2 UART RTS (RTS0), P604.

UM Table 19 p 27.

Definition at line 690 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod_id_t

enum ra8_board_pmod_id_t : uint8_t

Identifiers for the two Pmod sockets.

Enumerator
k_ra8_board_pmod1 

Pmod1 – J26, SCI2 simple-SPI/UART/I2C.

UM Table 17 p 26.

k_ra8_board_pmod2 

Pmod2 – J25, SPI/UART (RSPI/SCI0).

UM Table 19 p 27.

k_ra8_board_pmod_count 

RA8 board pmod count.

Definition at line 565 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_pmod_sci_channel_t

SCI channels that back the two Pmod sockets in Simple-SPI mode.

Both Pmod sockets are driven by an SCI channel in Simple-SPI mode rather than by the RSPI/SPI_B peripheral, so firmware opens them with ra8_sci_spi_init on the channel named here. Pmod1 (J26) sits on SCI2 via P801..P804 (UM Table 17 p 26); Pmod2 (J25) sits on SCI0 via P601..P604 (UM Table 19 p 27). Both channel indices are a fixed board fact of the EK-RA8D2 routing, which is why they live here rather than in each application.

Invariant
Both values are valid ra8_sci_spi channel indices (0..9).
Example:
const ra8_sci_spi_cfg_t cfg = { .baud_hz = 1000000U, .pclk_hz = pclka_hz,
.mode = k_ra8_spi_mode_3, .lsb_first = false };
@ k_ra8_board_pmod1_sci_channel
Pmod1 (J26) Simple-SPI is SCI2.
ra8_err_t ra8_sci_spi_init(uint8_t channel, const ra8_sci_spi_cfg_t *cfg)
Bring an SCI channel up as a Simple-SPI controller.
@ k_ra8_spi_mode_3
CPOL=1, CPHA=1.
Definition ra8_spi.h:65
Configuration descriptor for ra8_sci_spi_init.
Definition ra8_sci_spi.h:49
See also
ra8_board_pmod1_spi_pin_t
ra8_board_pmod2_spi_pin_t
Enumerator
k_ra8_board_pmod1_sci_channel 

Pmod1 (J26) Simple-SPI is SCI2.

k_ra8_board_pmod2_sci_channel 

Pmod2 (J25) Simple-SPI is SCI0.

Definition at line 656 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_sdhi_instance_t

enum ra8_board_sdhi_instance_t : uint8_t

SDHI instance that backs the ra8_board_sdhi_pin_t bus pins.

Exposed as a typed enum (not a macro) so applications can pass the instance index to ra8_sdcard_init / ra8_sdhi_init without re-encoding the literal. The port-4 pin map above is the SDHI 0 function group in the chip HUM I/O Ports chapter.

Enumerator
k_ra8_board_sdhi_instance 

SDHI0 (chip HUM Ch 20.6 SDHI pin group).

Definition at line 948 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_sdhi_pin_t

enum ra8_board_sdhi_pin_t : uint16_t

Pin assignments for the native 4-bit SDHI0 micro-SD bus.

The RA8D2 routes the SDHI0 SD/MMC host-controller signals to port 4 pins 0..7 under PSEL = k_ra8_psel_sdhi (chip HUM Ch 20.6 "Multiplexed Pin Function Selector"). In bus order the eight pins are CMD / CLK / DAT0 / DAT1 / DAT2 / DAT3 / WP (write-protect) / CD (card-detect). The values are (port << 8) | pin encodings in the ra8_port_pin_t value space, matching every other board-pin enum in this header.

Warning
HARDWARE CAVEAT – the EK-RA8D2 v1 board does NOT carry an on-board micro-SD socket and the SDHI0 peripheral is not populated (board UM has no SD-card table; see docs/MEMORY_MAP.md and docs/HARDWARE_BRINGUP.md). On EK-RA8D2 v1 these port-4 pads serve CANFD / IIC functions, not SDHI. This enum and ra8_board_sdhi_pins_init capture the chip-side SDHI0 pin map shared by the SDHI / ra8_io demo apps; running them against real hardware requires an external SDHI break-out wired to port 4. The apps that use this map therefore live under hw_pending / _unsupported.
Invariant
All eight members carry port index 4 (high byte 0x04).
See also
ra8_board_sdhi_pins_init
Since
0.1.0
Enumerator
k_ra8_board_sdhi_cmd 

SDHI0 CMD, P400.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_clk 

SDHI0 CLK, P401.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_dat0 

SDHI0 DAT0, P402.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_dat1 

SDHI0 DAT1, P403.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_dat2 

SDHI0 DAT2, P404.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_dat3 

SDHI0 DAT3, P405.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_wp 

SDHI0 WP, P406.

Chip HUM Ch 20.6.

k_ra8_board_sdhi_cd 

SDHI0 CD, P407.

Chip HUM Ch 20.6.

Definition at line 920 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_sw_id_t

enum ra8_board_sw_id_t : uint8_t

Identifiers for the on-board user push-buttons.

Pins per UM Table 25 ("EK-RA8D2 Board Switches"). SW3 is tied to the chip RESET_L line and is therefore not exposed as a software-readable input here.

Enumerator
k_ra8_board_sw1 

SW1, P009, IRQ13-DS (jumper E31).

EK-RA8D2 UM Table 25 p 32.

k_ra8_board_sw2 

SW2, P008, IRQ12-DS (jumper E32).

EK-RA8D2 UM Table 25 p 32.

k_ra8_board_sw_count 

RA8 board sw count.

Definition at line 175 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_sw_irq_t

enum ra8_board_sw_irq_t : uint8_t

Per-switch IRQ channel numbers (UM Table 25 p 32).

SW1 -> IRQ13-DS, SW2 -> IRQ12-DS. The "-DS" suffix means deep-sleep wake capable. Values are bare IRQ channel numbers usable with ra8_icu_configure_irq_pin.

Enumerator
k_ra8_board_sw1_irq 

SW1 -> IRQ13-DS.

UM Table 25 p 32.

k_ra8_board_sw2_irq 

SW2 -> IRQ12-DS.

UM Table 25 p 32.

Definition at line 189 of file ra8_board_ek_ra8d2_connectors.h.

◆ ra8_board_sw_state_t

enum ra8_board_sw_state_t : uint8_t

Logical "pressed" / "released" state.

Enumerator
k_ra8_board_sw_released 

RA8 board sw released.

k_ra8_board_sw_pressed 

RA8 board sw pressed.

Definition at line 195 of file ra8_board_ek_ra8d2_connectors.h.

Function Documentation

◆ ra8_board_arduino_gpio_read()

ra8_err_t ra8_board_arduino_gpio_read ( ra8_board_arduino_pin_t pin,
ra8_level_t * out_level )
nodiscard

Sample a previously-initialized Arduino GPIO pin.

Since
0.1.0

Definition at line 803 of file ra8_board_ek_ra8d2.c.

References k_ra8_err_invalid_arg, pin, and ra8_gpio_read().

◆ ra8_board_arduino_gpio_write()

ra8_err_t ra8_board_arduino_gpio_write ( ra8_board_arduino_pin_t pin,
ra8_level_t level )
nodiscard

Drive a previously-initialized Arduino GPIO pin.

Since
0.1.0

Definition at line 798 of file ra8_board_ek_ra8d2.c.

References pin, and ra8_gpio_write().

◆ ra8_board_arduino_pin_init()

ra8_err_t ra8_board_arduino_pin_init ( ra8_board_arduino_pin_t pin,
ra8_board_arduino_mode_t mode )
nodiscard

Configure an Arduino header pin in GPIO mode.

Return values
k_ra8_ok/ k_ra8_err_invalid_arg / k_ra8_err_gpio_conflict
Precondition
HAL pin validator initialized.
SW4-4 ON (Arduino vs Octo-SPI selection).
Since
0.1.0

Definition at line 784 of file ra8_board_ek_ra8d2.c.

References k_ra8_board_arduino_mode_input, k_ra8_board_arduino_mode_input_pullup, k_ra8_board_arduino_mode_output, k_ra8_err_invalid_arg, k_ra8_level_low, k_ra8_pull_none, k_ra8_pull_up, pin, ra8_gpio_input_init(), and ra8_gpio_output_init().

◆ ra8_board_audio_init()

ra8_err_t ra8_board_audio_init ( uint32_t sample_rate_hz,
uint8_t bit_depth,
uint8_t channels )
nodiscard

Route the CODEC pins and bring up SSIE0 in I2S controller mode.

Return values
k_ra8_ok/ k_ra8_err_invalid_arg / k_ra8_err_gpio_conflict
Precondition
J41 jumpers populated (CODEC selected over camera).
Postcondition
All CODEC pins are routed; SSIE0 is enabled.
Since
0.1.0

Definition at line 203 of file ra8_board_ek_ra8d2_audio_usb.c.

References internal_audio_bits_to_word(), internal_audio_build_ssie_cfg(), internal_audio_route_pins(), k_ra8_audio_channels_mono, k_ra8_audio_channels_stereo, k_ra8_board_audio_ssie_channel, k_ra8_err_hw_init_failed, k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_ssie_dwl_16, k_ra8_ssie_swl_16, ra8_ssie_init(), and s_audio_initialized.

Referenced by internal_audio_loopback_init_codec().

◆ ra8_board_audio_play_sample_block()

ra8_err_t ra8_board_audio_play_sample_block ( const int16_t * buf,
uint32_t len )
nodiscard

Push one block of stereo PCM samples to the CODEC's DAC.

Parameters
[in]bufSample buffer (interleaved L/R, 16-bit).
[in]lenNumber of samples (must be even).
Return values
k_ra8_okBlock enqueued or transmitted.
k_ra8_err_invalid_argbuf NULL or len odd / zero.
k_ra8_err_not_initializedra8_board_audio_init not called.
Precondition
ra8_board_audio_init succeeded.
Postcondition
Sample block has been handed to SSIE0.
Since
0.1.0

Definition at line 237 of file ra8_board_ek_ra8d2_audio_usb.c.

References k_ra8_audio_samples_per_word, k_ra8_board_audio_ssie_channel, k_ra8_err_hw_timeout, k_ra8_err_invalid_arg, k_ra8_err_not_initialized, k_ra8_ok, ra8_ssie_write_buffer(), and s_audio_initialized.

Referenced by main().

◆ ra8_board_backlight_set()

ra8_err_t ra8_board_backlight_set ( bool on)
nodiscard

Turn the J1 panel backlight (BLEN, P514) on or off.

Drives the active-high k_ra8_board_lcd_blen output high (on == true) or low (on == false). BLEN is configured as a GPIO output by ra8_board_lcd_panel_power_on, so this is a level change only – no re-init. Intended for an application idle-dim / auto-off policy: the LED backlight is the single largest load on a battery-powered backlit TFT, so blanking it while the reader sits idle on a static page is the highest-value power saving available. Brightness (PWM) control is a separate capability (BLEN is not routed to a GPT output on this board); this is on/off only.

Parameters
[in]ontrue to light the backlight, false to blank it.
Returns
ra8_err_t Error code.
Return values
k_ra8_okBacklight level updated.
k_ra8_err_invalid_argBLEN pin invalid (should not occur).
k_ra8_err_gpio_*Underlying ra8_gpio_write propagated error.
Precondition
ra8_board_lcd_panel_power_on has run (BLEN is a GPIO output).
IOPORT module is powered (true at reset).
Postcondition
P514 (BLEN) is driven to the level selected by on.
No other pin or panel state is changed.
Note
Not thread-safe; call from the single input/render context.
See also
ra8_board_lcd_panel_power_on
Since
0.1.0

Definition at line 627 of file ra8_board_ek_ra8d2.c.

References k_ra8_level_high, k_ra8_level_low, k_ra8_pin_lcd_blen, and ra8_gpio_write().

Referenced by sh_run().

◆ ra8_board_get_info()

ra8_err_t ra8_board_get_info ( ra8_board_info_t * out)
nodiscard

Copy the three board-identity strings into out.

Parameters
[out]outDestination struct, must be non-NULL.
Return values
k_ra8_okFilled.
k_ra8_err_invalid_argout == NULL.
Precondition
out is writable.
Postcondition
On success out->name / doc_rev / mcu point at the global k_ra8_board_* strings.
Since
0.1.0

Definition at line 50 of file ra8_board_ek_ra8d2.c.

References ra8_board_info_t::doc_rev, k_ra8_board_doc_rev, k_ra8_board_mcu, k_ra8_board_name, k_ra8_err_invalid_arg, k_ra8_ok, ra8_board_info_t::mcu, and ra8_board_info_t::name.

◆ ra8_board_glcdc_init()

ra8_err_t ra8_board_glcdc_init ( ra8_board_glcdc_fmt_t fmt)
nodiscard

Program every J1 pin for fmt to its GLCDC alternate function.

Walks the right table above and calls ra8_pfs_route_peripheral for each entry. Does NOT bring the GLCDC peripheral itself up – call ra8_glcdc_init after this returns.

Return values
k_ra8_okAll pins routed.
k_ra8_err_invalid_argfmt out of range.
k_ra8_err_gpio_conflictAt least one pin already owned.
Precondition
IOPORT module powered (true at reset).
Postcondition
Every J1 pin for the chosen format is in GLCDC mode.
Since
0.1.0

Definition at line 550 of file ra8_board_ek_ra8d2.c.

References g_ra8_board_glcdc_rgb565_pin_count, g_ra8_board_glcdc_rgb565_pins, g_ra8_board_glcdc_rgb666_pin_count, g_ra8_board_glcdc_rgb666_pins, g_ra8_board_glcdc_rgb888_pin_count, g_ra8_board_glcdc_rgb888_pins, internal_glcdc_force_pin_output(), internal_glcdc_signal_is_output(), k_ra8_board_glcdc_fmt_rgb565, k_ra8_board_glcdc_fmt_rgb666, k_ra8_board_glcdc_fmt_rgb888, k_ra8_err_invalid_arg, k_ra8_ok, k_ra8_psel_glcdc, pin, and ra8_pfs_route_peripheral().

Referenced by internal_lcd_bringup_panel(), and internal_lcd_bringup_panel().

◆ ra8_board_lcd_panel_power_on()

ra8_err_t ra8_board_lcd_panel_power_on ( void )
nodiscard

Pulse the J1 panel's RESET_L line and assert BLEN backlight.

Drives k_ra8_board_lcd_reset_l low for 50 ms, releases it high, waits another 50 ms for the panel's internal controller to latch reset-release, then drives k_ra8_board_lcd_blen high to enable the backlight. Must be called BEFORE ra8_board_glcdc_init routes the data pins to PSEL=glcdc so the panel sees stable signals by the time GLCDC starts driving them.

Return values
k_ra8_okPanel reset released and backlight on.
k_ra8_err_invalid_argGPIO init for one of the pins failed.
k_ra8_err_gpio_*Underlying ra8_gpio_* propagated error.
Precondition
IOPORT module is powered (true at reset).
ra8_time_init has been called (function blocks on ra8_delay_ms).
Postcondition
P606 (RESET_L) is driven high; panel is out of reset.
P514 (BLEN) is driven high; backlight is on.
Note
Single-threaded init context; blocks for ~100 ms total.
Since
0.1.0

Pulse the J1 panel's RESET_L line and assert BLEN backlight.

See header for caller-facing contract. Body drives RESET_L low for 50 ms, releases it high for another 50 ms to let the panel's internal POR finish, then asserts BLEN.

Returns
Error code from the underlying GPIO operations.
Return values
k_ra8_okPanel out of reset, backlight on.
k_ra8_err_gpio_*Underlying GPIO call failed.
Precondition
IOPORT module powered (true at reset).
ra8_time_init has been called.
Postcondition
P606 RESET_L is high; P514 BLEN is high.
Returns within ~100 ms.
Note
Single-threaded init context; blocks on ra8_delay_ms.
Since
0.1.0

< Reset pulse ms.

Definition at line 608 of file ra8_board_ek_ra8d2.c.

References k_ra8_level_high, k_ra8_level_low, k_ra8_ok, k_ra8_pin_lcd_blen, k_ra8_pin_lcd_reset_l, ra8_delay_ms(), ra8_gpio_output_init(), and ra8_gpio_write().

Referenced by internal_lcd_bringup_panel(), and internal_lcd_bringup_panel().

◆ ra8_board_led_init()

ra8_err_t ra8_board_led_init ( ra8_board_led_id_t led)
nodiscard

Configure led as a digital output, initial level low (off).

Return values
k_ra8_okPin claimed and driven low.
k_ra8_err_invalid_argled >= k_ra8_board_led_count.
k_ra8_err_gpio_conflictPin already owned.
Precondition
HAL pin validator initialized (single-threaded boot context).
Postcondition
LED is off and pin is configured as a digital output.
Since
0.1.0

Definition at line 91 of file ra8_board_ek_ra8d2.c.

References k_ra8_level_low, k_ra8_ok, k_ra8_pin_none, pin, ra8_board_led_pin(), and ra8_gpio_output_init().

Referenced by adc_diag_setup_or_halt(), app_bringup_clocks(), blc_setup_or_halt(), c6_probe_setup_or_halt(), cdc_setup_or_halt(), cm_bringup_clocks(), combo_setup_or_halt(), crc_demo_setup_or_halt(), demo_setup_or_halt(), demo_setup_or_halt(), dfu_setup_or_halt(), drw_blend_setup_or_halt(), drw_demo_setup_or_halt(), dtc_arm_setup_or_halt(), dtc_coh_setup_or_halt(), dtc_demo_setup_or_halt(), ep_bringup_core(), ez_bringup_clocks(), fileops_setup_or_halt(), flash_journal_setup_or_halt(), gpt_ecc_clocks_or_halt(), gptp_setup_or_halt(), hid_setup_or_halt(), i3c_demo_setup_or_halt(), iic_setup_or_halt(), imu_demo_setup_or_halt(), internal_acmphs_demo_setup(), internal_agt_periodic_setup_or_halt(), internal_audio_loopback_init_clocks_and_led(), internal_bkup_demo_setup_or_halt(), internal_blink_pins_init(), internal_can_demo_setup_or_halt(), internal_canfd_demo_setup_or_halt(), internal_canfd_filter_setup_or_halt(), internal_clock_check_pins_init(), internal_dac_b_demo_setup_or_halt(), internal_demo_clocks_or_halt(), internal_dotf_demo_setup_or_halt(), internal_gpio_demo_setup_or_halt(), internal_gpt_3p_demo_setup_or_halt(), internal_gpt_irq_demo_setup_or_halt(), internal_gpt_pwm_demo_setup_or_halt(), internal_icu_extint_demo_setup_or_halt(), internal_iic_peripheral_setup_or_halt(), internal_kat_setup_or_halt(), internal_lcd_bringup_clocks(), internal_lpm_deep_setup_or_halt(), internal_lpm_demo_setup_or_halt(), internal_lpm_wake_setup_or_halt(), internal_lvd_demo_setup_or_halt(), internal_mecc_setup_or_halt(), internal_motor_3phase_init_clocks_and_led(), internal_mpu_simple_setup_or_halt(), internal_pdg_demo_setup_or_halt(), internal_poeg_demo_setup_or_halt(), internal_rng_demo_setup_or_halt(), internal_setup_or_halt(), internal_uart_hello_setup_or_halt(), internal_usb_audio_clocks_or_halt(), internal_wdt_demo_setup_or_halt(), kat_setup_or_halt(), l3_setup_or_halt(), lcd_bringup_clocks(), lin_hil_setup_or_halt(), lpi_setup_or_halt(), main(), mg_bringup_clocks(), microsd_setup_or_halt(), mlun_setup_or_halt(), modem_setup_or_halt(), ospirw_setup_or_halt(), pdm_demo_io_or_halt(), pp_demo_modules_or_halt(), riic_target_setup_or_halt(), rot_setup_or_halt(), sb_setup_or_halt(), scb_demo_setup_or_halt(), sdmsc_setup_or_halt(), sdram_demo_setup_or_halt(), selftest_setup_or_halt(), sfr_bringup_clocks(), timer_demo_setup_or_halt(), tsn_setup_or_halt(), uart_irq_setup_or_halt(), wdt_rr_setup_or_halt(), wdt_window_demo_setup_or_halt(), and wlun_setup_or_halt().

◆ ra8_board_led_off()

ra8_err_t ra8_board_led_off ( ra8_board_led_id_t led)
nodiscard

Drive led LOW (extinguish it).

Return values
k_ra8_ok/ k_ra8_err_invalid_arg
Precondition
ra8_board_led_init(led) succeeded.
Postcondition
LED pin output latch == 0.

Definition at line 111 of file ra8_board_ek_ra8d2.c.

References k_ra8_level_low, k_ra8_ok, k_ra8_pin_none, pin, ra8_board_led_pin(), and ra8_gpio_write().

Referenced by internal_gpio_demo_one_iter().

◆ ra8_board_led_on()

◆ ra8_board_led_pin()

ra8_err_t ra8_board_led_pin ( ra8_board_led_id_t led,
ra8_port_pin_t * out_pin )
nodiscard

Translate a board LED id into its underlying ra8_port_pin_t.

Parameters
[in]ledLED identifier.
[out]out_pinDestination pin id.
Return values
k_ra8_ok/ k_ra8_err_invalid_arg
Since
0.1.0

Definition at line 79 of file ra8_board_ek_ra8d2.c.

References k_ra8_board_led_count, k_ra8_err_invalid_arg, k_ra8_ok, and s_led_pins.

◆ ra8_board_led_toggle()

◆ ra8_board_sdhi_pins_init()

ra8_err_t ra8_board_sdhi_pins_init ( void )
nodiscard

Route the eight SDHI0 bus pins to the SDHI peripheral function.

Walks the ra8_board_sdhi_pin_t bus order (CMD / CLK / DAT0..3 / WP / CD on port 4 pins 0..7) and calls ra8_pfs_route_peripheral for each under PSEL = k_ra8_psel_sdhi (chip HUM Ch 20.6 "Multiplexed Pin Function Selector"). It does NOT bring the SDHI block or the card up – call ra8_sdcard_init / ra8_sdhi_init after this returns. Returns on the first failing pin so the caller can panic-halt before SD bring-up.

See the

Warning
on ra8_board_sdhi_pin_t: EK-RA8D2 v1 has no on-board micro-SD socket, so this routing is only meaningful with an external SDHI break-out wired to port 4.
Returns
ra8_err_t Error code.
Return values
k_ra8_okAll eight SDHI0 pins routed.
k_ra8_err_invalid_argPFS programming rejected an entry.
k_ra8_err_gpio_conflictAt least one pin already owned.
Precondition
IOPORT module powered (reset default).
Single-threaded init context (no other consumer owns port-4 pins).
Postcondition
On success port-4 pins 0..7 are in the SDHI alternate function.
On failure the affected pins are left in their prior state.
Note
Not thread-safe; call once during board bring-up before SDHI init.
Since
0.1.0

Definition at line 763 of file ra8_board_ek_ra8d2.c.

References k_ra8_ok, k_ra8_psel_sdhi, ra8_pfs_route_peripheral(), and s_sdhi_bus_pins.

Referenced by main(), sdhi_card_setup_or_halt(), and sdhi_demo_setup_or_halt().

◆ ra8_board_sw_attach_irq()

ra8_err_t ra8_board_sw_attach_irq ( ra8_board_sw_id_t sw,
ra8_board_sw_irq_cb_t cb,
void * ctx )
nodiscard

Wire sw to the ICU and register a falling-edge callback.

Buttons are active-low so a falling edge corresponds to a press. The HAL takes care of the PFS routing, IRQCR programming, and NVIC enable; this veneer just hides the specific channel number (UM Table 25) from the caller.

Return values
k_ra8_ok/ k_ra8_err_invalid_arg / k_ra8_err_gpio_conflict
Precondition
ra8_icu_init() has been called once during boot.
Postcondition
Pressing sw invokes cb(ctx) from the ICU ISR context.

Definition at line 196 of file ra8_board_ek_ra8d2.c.

References k_ra8_board_sw1, k_ra8_board_sw_count, k_ra8_elc_event_icu_irq12, k_ra8_elc_event_icu_irq13, k_ra8_err_invalid_arg, k_ra8_icu_fclksel_pclkb, k_ra8_icu_irqmd_falling, k_ra8_isr_prio_default, k_ra8_ok, ra8_icu_configure_irq_pin(), ra8_isr_register(), and s_sw_irq_nums.

◆ ra8_board_sw_init()

ra8_err_t ra8_board_sw_init ( ra8_board_sw_id_t sw)
nodiscard

Configure a switch pin as an input with internal pull-up.

Return values
k_ra8_ok/ k_ra8_err_invalid_arg / k_ra8_err_gpio_conflict
Precondition
HAL pin validator initialized.
Postcondition
Pin is digital input, pull-up enabled.
Since
0.1.0

Definition at line 165 of file ra8_board_ek_ra8d2.c.

References k_ra8_ok, k_ra8_pin_none, k_ra8_pull_up, pin, ra8_board_sw_pin(), and ra8_gpio_input_init().

Referenced by internal_gpio_demo_setup_or_halt(), internal_icu_extint_demo_setup_or_halt(), internal_kint_demo_arm(), internal_setup_or_halt(), main(), sh_input_init(), and wd_setup_or_halt().

◆ ra8_board_sw_pin()

ra8_err_t ra8_board_sw_pin ( ra8_board_sw_id_t sw,
ra8_port_pin_t * out_pin )
nodiscard

Translate a board switch id into its underlying ra8_port_pin_t.

Since
0.1.0

Definition at line 153 of file ra8_board_ek_ra8d2.c.

References k_ra8_board_sw_count, k_ra8_err_invalid_arg, k_ra8_ok, and s_sw_pins.

Referenced by er_poll_buttons(), and wd_setup_or_halt().

◆ ra8_board_sw_read()

ra8_err_t ra8_board_sw_read ( ra8_board_sw_id_t sw,
ra8_board_sw_state_t * out_pressed )
nodiscard

Sample the current state of sw.

The buttons are wired active-low (press shorts the pin to GND); this function inverts the level so callers receive a positive "pressed = true" semantic.

Parameters
[in]swSwitch id.
[out]out_pressedSet to k_ra8_board_sw_pressed if held.
Return values
k_ra8_okRead complete.
k_ra8_err_invalid_argsw out of range or out_pressed NULL.
Precondition
ra8_board_sw_init(sw) succeeded.
Postcondition
*out_pressed is one of {released, pressed}.
Since
0.1.0

Definition at line 175 of file ra8_board_ek_ra8d2.c.

References k_ra8_board_sw_pressed, k_ra8_board_sw_released, k_ra8_err_invalid_arg, k_ra8_level_high, k_ra8_level_low, k_ra8_ok, k_ra8_pin_none, pin, ra8_board_sw_pin(), and ra8_gpio_read().

Referenced by internal_edge(), internal_gpio_demo_one_iter(), ls_poll_buttons(), main(), sh_pump_input(), and sh_run().

Variable Documentation

◆ g_ra8_board_glcdc_rgb565_pin_count

const uint32_t g_ra8_board_glcdc_rgb565_pin_count
extern

Definition at line 396 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_glcdc_init().

◆ g_ra8_board_glcdc_rgb565_pins

const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb565_pins[]
extern

RGB565-mode pin table for J1 (UM Table 33 p 42).

RGB565 uses 5+6+5 = 16 active data lines. R6/R7 + G6/G7 are NC, and DATA31..DATA38 (R0..R7 lines) are NC. Same control pins as RGB888.

Definition at line 362 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_glcdc_init().

◆ g_ra8_board_glcdc_rgb666_pin_count

const uint32_t g_ra8_board_glcdc_rgb666_pin_count
extern

Definition at line 394 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_glcdc_init().

◆ g_ra8_board_glcdc_rgb666_pins

const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb666_pins[]
extern

RGB666-mode pin table for J1 (UM Table 33 p 42).

In RGB666 the lowest two bits of each colour channel (R0, R1, G0, G1, B0, B1) are not driven (board ties them off internally), so the table omits the DATA0..DATA3 + DATA8..DATA9 + DATA16..DATA17 lines and drops DATA22..DATA23 (R6/R7) which are NC in RGB666.

Definition at line 321 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_glcdc_init().

◆ g_ra8_board_glcdc_rgb888_pin_count

const uint32_t g_ra8_board_glcdc_rgb888_pin_count
extern

Number of entries in each per-format pin table.

Definition at line 392 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_glcdc_init().

◆ g_ra8_board_glcdc_rgb888_pins

const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb888_pins[]
extern

Pin tables for J1 in each pixel format (UM Table 33 p 42).

Source-of-truth arrays the BSP iterates when programming J1. The tables are exposed publicly so applications can also inspect them for documentation / debug purposes. Only the data lines actually routed in the chosen format appear in the per-format table; common control + side-band signals (BLEN, RST, INT, I2C, CLK, sync, EXTCLK, TCON3) appear in every table.

Pin tables for J1 in each pixel format (UM Table 33 p 42).

Common control + data lines routed when J1 is driven in 24-bit RGB888 mode. Order matches the UM table (J1-1..J1-38).

Definition at line 239 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_glcdc_init().

◆ k_ra8_board_doc_rev

const char* const k_ra8_board_doc_rev
extern

"R20UT5523EG0101 Rev 1.01".

Definition at line 47 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_get_info().

◆ k_ra8_board_mcu

const char* const k_ra8_board_mcu
extern

"R7KA8D2KFLCAC".

Definition at line 48 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_get_info().

◆ k_ra8_board_name

const char* const k_ra8_board_name
extern

Human-readable strings identifying this BSP target.

Returned by ra8_board_get_info() so applications can log / verify the board they were built for. All three are ASCII string literals with permanent storage duration. "EK-RA8D2 v1".

Definition at line 46 of file ra8_board_ek_ra8d2.c.

Referenced by ra8_board_get_info().