55static const char*
s_tag =
"pdg_demo";
58typedef enum : uint32_t {
64typedef enum : uint8_t {
122 __asm__
volatile(
"wfi");
141 uint32_t cpuclk0_hz = 0U;
258 *out_ok = (st.
dll_enabled != 0U && powered != 0U && bypass_n != 0U) ? 1U : 0U;
277 const uint8_t good = (err ==
k_ra8_ok && ok != 0U) ? 1U : 0U;
void main(void)
Secure fallback main entry point.
static const uint8_t s_pdg_demo_ok_msg[]
Output line tags.
volatile uint32_t g_pdg_heartbeat
Bumps once per main-loop pass – liveness for headless probes.
volatile uint32_t g_pdg_delay_readback
Last delay code read back from the PDG temporary register.
volatile uint32_t g_pdg_dll
1 when GTDLYCR.DLLEN reads back enabled.
static ra8_err_t internal_pdg_demo_sample(uint8_t *out_ok)
Read the PDG status and fold the bring-up into the verdict.
static void internal_pdg_demo_panic_halt(void)
Park the processor after a fatal initialization failure.
static ra8_err_t internal_pdg_demo_configure(void)
Bring up the PDG DLL on channel 0 and programme a delay code.
static void internal_pdg_demo_setup_or_halt(void)
Bring CGC, SysTick, SCI8, LEDs, and MSTP support up.
pdg_demo_chan_t
PDG channel + delay programmed by this demo.
@ k_pdg_demo_chan_mask
channel_mask bit 0.
@ k_pdg_demo_delay_code
Mid-range DLY[6:0] code (0..7F).
@ k_pdg_demo_channel
PDG / GPT32 channel 0.
pdg_demo_config_t
Compile-time settings.
@ k_pdg_demo_baud
SCI8 baud rate.
@ k_pdg_demo_period_ms
Delay between reports.
volatile uint32_t g_pdg_cfg_ok
1 when the DLL + channel + delay read back as configured.
static const uint8_t s_pdg_demo_bad_msg[]
static const char * s_tag
Logging / check tag.
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
@ k_ra8_board_led2
LED2, GREEN, P303 (jumper E26).
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Validation and Error-Checking Macros for ra8-firmware.
#define RA8_CHECK_NULL_PTR(ptr, tag, message)
Reject nullptr pointer, returning k_ra8_err_null_ptr.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
NVIC + ICU IELSR allocator.
void ra8_isr_globals_enable(void)
Globally enable maskable interrupts (PRIMASK = 0).
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
PWM Delay Generation Circuit (PDG) driver public API.
ra8_err_t ra8_pdg_set_delay(uint8_t channel, ra8_pdg_pin_t pin, ra8_pdg_edge_t edge, uint8_t code)
Set the per-edge fine delay for one PDG channel/pin/edge.
ra8_err_t ra8_pdg_get_delay(uint8_t channel, ra8_pdg_pin_t pin, ra8_pdg_edge_t edge, uint8_t *out_code)
Read back the last-programmed delay code.
@ k_ra8_pdg_edge_rising
GTDLYRnA / GTDLYRnB.
ra8_err_t ra8_pdg_get_status_full(ra8_pdg_status_full_t *out)
Read a fully-decoded snapshot of GTDLYCR + GTDLYCR2.
@ k_ra8_pdg_pin_a
GTIOCnA – "A" output of GPT32n.
ra8_err_t ra8_pdg_init(const ra8_pdg_config_t *cfg)
Initialise the PDG block per HUM Figure 23.2 (p 1160).
@ k_ra8_pdg_frange_80_160_mhz
80..160 MHz, 1/128 step.
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Driver configuration descriptor for ra8_pdg_init.
Decoded snapshot of GTDLYCR / GTDLYCR2 returned by ra8_pdg_get_status_full.
uint8_t per_channel_powered[k_ra8_pdg_channel_count]
!DLYENn.
uint8_t per_channel_bypass_off[k_ra8_pdg_channel_count]
DLYBSn.
uint8_t dll_enabled
GTDLYCR.DLLEN.