ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_board_ek_ra8d2.c
Go to the documentation of this file.
1
23
24#include "ra8_board_ek_ra8d2.h"
25
26#include <stddef.h>
27#include <stdint.h>
28
29#include "ra8_attributes.h"
30#include "ra8_elc_regs.h"
31#include "ra8_err.h"
32#include "ra8_gpio_constants.h"
33#include "ra8_icu.h"
34#include "ra8_icu_regs.h"
35#include "ra8_isr.h"
36#include "ra8_pfs_regs.h"
37#include "ra8_port_constants.h"
38#include "ra8_port_utils.h"
39#include "ra8_time.h"
40
41/* =============================================================================
42 * Board identity strings (UM cover page, R20UT5523EG0101 Rev 1.01)
43 * =============================================================================
44 */
45
46const char* const k_ra8_board_name = "EK-RA8D2 v1";
47const char* const k_ra8_board_doc_rev = "R20UT5523EG0101 Rev 1.01";
48const char* const k_ra8_board_mcu = "R7KA8D2KFLCAC";
49
51{
52 if (out == nullptr) {
54 }
57 out->mcu = k_ra8_board_mcu;
58 return k_ra8_ok;
59}
60
61/* =============================================================================
62 * 1. User LEDs (UM Table 24, page 31)
63 * =============================================================================
64 */
65
78
80{
81 if (out_pin == nullptr) {
83 }
84 if ((uint8_t)led >= (uint8_t)k_ra8_board_led_count) {
86 }
87 *out_pin = s_led_pins[led];
88 return k_ra8_ok;
89}
90
100
102{
104 ra8_err_t err = ra8_board_led_pin(led, &pin);
105 if (err != k_ra8_ok) {
106 return err;
107 }
109}
110
112{
114 ra8_err_t err = ra8_board_led_pin(led, &pin);
115 if (err != k_ra8_ok) {
116 return err;
117 }
119}
120
122{
124 ra8_err_t err = ra8_board_led_pin(led, &pin);
125 if (err != k_ra8_ok) {
126 return err;
127 }
128 return ra8_gpio_toggle(pin);
129}
130
131/* =============================================================================
132 * 2. User switches (UM Table 25, page 32)
133 * =============================================================================
134 */
135
146
148static const uint8_t s_sw_irq_nums[k_ra8_board_sw_count] = {
151};
152
154{
155 if (out_pin == nullptr) {
157 }
158 if ((uint8_t)sw >= (uint8_t)k_ra8_board_sw_count) {
160 }
161 *out_pin = s_sw_pins[sw];
162 return k_ra8_ok;
163}
164
166{
168 ra8_err_t err = ra8_board_sw_pin(sw, &pin);
169 if (err != k_ra8_ok) {
170 return err;
171 }
173}
174
176{
177 if (out_pressed == nullptr) {
179 }
181 ra8_err_t err = ra8_board_sw_pin(sw, &pin);
182 if (err != k_ra8_ok) {
183 return err;
184 }
186 err = ra8_gpio_read(pin, &lvl);
187 if (err != k_ra8_ok) {
188 /* ra8_gpio_read returns k_ra8_ok for valid port-0 SW pins off-target. */
189 return err; /* GCOVR_EXCL_LINE -- static board pin table cannot fail validation */
190 }
191 /* Buttons are active-low: low level == pressed. */
193 return k_ra8_ok;
194}
195
197{
198 if (cb == nullptr) {
200 }
201 if ((uint8_t)sw >= (uint8_t)k_ra8_board_sw_count) {
203 }
204 /* Step 1: configure the ICU IRQ pin for falling-edge detection so a
205 * button press (active-low; UM Table 25 p 32) latches IRQCR[12] /
206 * IRQCR[13]. The digital filter samples at PCLKB to debounce
207 * contact bounce; HUM Ch 14.2.12 (p 535) describes IRQCRi fields. */
208 const ra8_icu_irq_cfg_t cfg = {
210 .filter_div = k_ra8_icu_fclksel_pclkb,
211 .filter_en = true,
212 };
214 if (err != k_ra8_ok) {
215 /* ra8_icu_configure_irq_pin succeeds for IRQ12/13 (well within 32-channel limit). */
216 return err; /* GCOVR_EXCL_LINE -- static board pin table cannot fail validation */
217 }
218
219 /* Step 2: route the ELC event for IRQ12-DS / IRQ13-DS through an
220 * IELSR slot and enable the matching NVIC line. SW1 -> IRQ13-DS
221 * (event 0x00E), SW2 -> IRQ12-DS (event 0x00D). */
222 const ra8_elc_event_t evt =
224 return ra8_isr_register(evt, (ra8_isr_handler_t)cb, ctx, k_ra8_isr_prio_default, nullptr);
225}
226
227/* =============================================================================
228 * 3. Parallel-RGB GLCDC pin tables (UM Table 33 p 42)
229 * =============================================================================
230 */
231
240 {.signal = "BLEN",
242 {.signal = "SDA1",
244 {.signal = "INT",
246 {.signal = "SCL1",
248 {.signal = "RST",
250 {.signal = "TCON0",
252 {.signal = "CLK",
254 {.signal = "TCON2",
256 {.signal = "TCON1",
258 {.signal = "EXTCLK",
260 {.signal = "TCON3",
262 {.signal = "B1",
264 {.signal = "B0",
266 {.signal = "B3",
268 {.signal = "B2",
270 {.signal = "B5",
272 {.signal = "B4",
274 {.signal = "B7",
276 {.signal = "B6",
278 {.signal = "G1",
280 {.signal = "G0",
282 {.signal = "G3",
284 {.signal = "G2",
286 {.signal = "G5",
288 {.signal = "G4",
290 {.signal = "G7",
292 {.signal = "G6",
294 {.signal = "R1",
296 {.signal = "R0",
298 {.signal = "R3",
300 {.signal = "R2",
302 {.signal = "R5",
304 {.signal = "R4",
306 {.signal = "R7",
308 {.signal = "R6",
310};
311
322 {.signal = "BLEN", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_14)},
323 {.signal = "SDA1", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_11)},
324 {.signal = "INT", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_1, k_ra8_pin_11)},
325 {.signal = "SCL1", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_12)},
326 {.signal = "RST", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_6, k_ra8_pin_6)},
327 {.signal = "TCON0", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_8, k_ra8_pin_6)},
328 {.signal = "CLK", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_15)},
329 {.signal = "TCON2", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_8, k_ra8_pin_7)},
330 {.signal = "TCON1", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_8, k_ra8_pin_5)},
331 {.signal = "EXTCLK", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_7, k_ra8_pin_10)},
332 {.signal = "TCON3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_13)},
333 {.signal = "B3",
335 {.signal = "B2", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_14)},
336 {.signal = "B5", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_2)},
337 {.signal = "B4", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_3)},
338 {.signal = "B7", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_11)},
339 {.signal = "B6", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_10)},
340 {.signal = "G3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_13)},
341 {.signal = "G2", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_12)},
342 {.signal = "G5", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_2, k_ra8_pin_7)},
343 {.signal = "G4", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_4)},
344 {.signal = "G7", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_6)},
345 {.signal = "G6", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_7)},
346 {.signal = "R3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_1)},
347 {.signal = "R2", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_5)},
348 {.signal = "R5", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_3)},
349 {.signal = "R4", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_4)},
350 {.signal = "R7", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_0)},
351 {.signal = "R6", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_2)},
352};
353
363 {.signal = "BLEN", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_14)},
364 {.signal = "SDA1", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_11)},
365 {.signal = "INT", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_1, k_ra8_pin_11)},
366 {.signal = "SCL1", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_12)},
367 {.signal = "RST", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_6, k_ra8_pin_6)},
368 {.signal = "TCON0", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_8, k_ra8_pin_6)},
369 {.signal = "CLK", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_15)},
370 {.signal = "TCON2", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_8, k_ra8_pin_7)},
371 {.signal = "TCON1", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_8, k_ra8_pin_5)},
372 {.signal = "EXTCLK", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_7, k_ra8_pin_10)},
373 {.signal = "TCON3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_5, k_ra8_pin_13)},
374 {.signal = "B4", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_15)},
375 {.signal = "B3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_14)},
376 {.signal = "B6", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_2)},
377 {.signal = "B5", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_3)},
378 {.signal = "G2", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_11)},
379 {.signal = "B7", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_10)},
380 {.signal = "G4", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_13)},
381 {.signal = "G3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_12)},
382 {.signal = "G6", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_2, k_ra8_pin_7)},
383 {.signal = "G5", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_9, k_ra8_pin_4)},
384 {.signal = "R3", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_6)},
385 {.signal = "G7", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_7)},
386 {.signal = "R5", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_1)},
387 {.signal = "R4", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_5)},
388 {.signal = "R7", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_3)},
389 {.signal = "R6", .pin = (ra8_port_pin_t)RA8_PIN(k_ra8_port_11, k_ra8_pin_4)},
390};
391
398
423RA8_INTERNAL static bool internal_glcdc_signal_starts_with(const char* s, const char* prefix)
424{
425 for (uint32_t i = 0U; i < 4U; i++) { /* longest prefix here is "TCON" = 4. */
426 if (prefix[i] == '\0') {
427 return true;
428 }
429 if (s[i] != prefix[i]) {
430 return false;
431 }
432 }
433 return true;
434}
435
458{
459 /* Match R0..R9 / G0..G9 / B0..B9; digit in [1] excludes BLEN. */
460 const char c0 = signal[0];
461 if (c0 != 'R') {
462 if (c0 != 'G') {
463 if (c0 != 'B') {
464 return false;
465 }
466 }
467 }
468 const char c1 = signal[1];
469 if (c1 < '0') {
470 /* No EK-RA8D2 GLCDC pin table entry starts with R/G/B followed by ASCII < '0'. */
471 return false; /* GCOVR_EXCL_LINE -- static board pin table cannot fail validation */
472 }
473 if (c1 > '9') {
474 return false;
475 }
476 return true;
477}
478
501RA8_INTERNAL static bool internal_glcdc_signal_is_output(const char* signal)
502{
503 if (internal_glcdc_signal_starts_with(signal, "TCON")) {
504 return true;
505 }
506 if (internal_glcdc_signal_starts_with(signal, "CLK")) {
507 return true;
508 }
510}
511
532{
533 enum : uint32_t {
534 k_pfs_psel_shift = 24U,
535 k_pfs_pmr_bit = 1U << 16,
536 k_pfs_pdr_bit = 1U << 2,
537 };
538 const ra8_port_t port = RA8_PIN_PORT(pin);
539 const ra8_pin_t bit = RA8_PIN_PIN(pin);
540 volatile uint32_t* const pfs = ra8_pfs_pmn(port, bit);
541 if (pfs == nullptr) {
542 /* ra8_pfs_pmn is non-null for every hardcoded board pin in the GLCDC table. */
543 return; /* GCOVR_EXCL_LINE -- static board pin table cannot fail validation */
544 }
546 *pfs = ((uint32_t)k_ra8_psel_glcdc << k_pfs_psel_shift) | k_pfs_pmr_bit | k_pfs_pdr_bit;
548}
549
551{
552 const ra8_board_glcdc_pin_t* table = nullptr;
553 uint32_t count = 0U;
554
555 switch (fmt) {
559 break;
563 break;
567 break;
568 default:
570 }
571
572 for (uint32_t i = 0U; i < count; ++i) {
573 if (!internal_glcdc_signal_is_output(table[i].signal)) {
574 continue; /* GPIO/I2C/clock-input -- not a GLCDC peripheral pin. */
575 }
576 const ra8_err_t err =
577 ra8_pfs_route_peripheral(table[i].pin, k_ra8_psel_glcdc, "ra8_board.glcdc");
578 if (err != k_ra8_ok) {
579 return err;
580 }
581 /* Override PFS with PSEL + PMR + PDR=1 so the chip drives the
582 * pin as an output instead of leaving it as an input under
583 * peripheral control. */
585 }
586 return k_ra8_ok;
587}
588
609{
610 enum : uint32_t {
611 k_reset_pulse_ms = 50U,
612 };
614 if (err != k_ra8_ok) {
615 return err;
616 }
617 ra8_delay_ms(k_reset_pulse_ms);
619 if (err != k_ra8_ok) {
620 /* ra8_gpio_write returns k_ra8_ok for valid port/pin pairs off-target. */
621 return err; /* GCOVR_EXCL_LINE -- static board pin table cannot fail validation */
622 }
623 ra8_delay_ms(k_reset_pulse_ms);
625}
626
628{
629 /* BLEN (P514) is already a GPIO output after ra8_board_lcd_panel_power_on;
630 * drive it high to light the panel backlight, low to blank it. Active-high,
631 * so `on` maps directly to the output level. */
633}
634
635/* =============================================================================
636 * 3b. Octo-SPI flash pin routing (UM Table 29 p 35, IS25LX512M-JHLE)
637 * =============================================================================
638 */
639
670
695
697{
698 /* Step 1: drive RESET_L low while the pin is still GPIO. PSEL=0x00
699 * + PDR=output is the IS25LX512M strap that holds the chip in
700 * reset (datasheet Ch 9.2). EK-RA8D2 UM Table 29 maps RESET_L to
701 * P106. */
704 if (err != k_ra8_ok) {
705 return err;
706 }
708
709 /* Step 2: drive RESET_L high to release the chip. */
710 err = ra8_gpio_write(reset_pin, k_ra8_level_high);
711 if (err != k_ra8_ok) {
712 /* ra8_gpio_write returns k_ra8_ok for valid port/pin pairs off-target. */
713 return err; /* GCOVR_EXCL_LINE -- static board pin table cannot fail validation */
714 }
716
717 /* Step 3: route the 12 OCTA bus pins to PSEL=0x1C. PSEL 0x1C is
718 * shared between the QSPI and Octo-SPI controllers per HUM Ch 20.6
719 * "Multiplexed Pin Function Selector" p 871; the named constant
720 * is ``k_ra8_psel_qspi`` for legacy reasons. */
721 const uint32_t count = (uint32_t)(sizeof(s_xspi_octa_pins) / sizeof(s_xspi_octa_pins[0]));
722 for (uint32_t i = 0U; i < count; ++i) {
723 err = ra8_pfs_route_peripheral(s_xspi_octa_pins[i], k_ra8_psel_qspi, "ra8_board.xspi");
724 if (err != k_ra8_ok) {
725 return err;
726 }
727 }
728 return k_ra8_ok;
729}
730
731/* =============================================================================
732 * 6d. Native SDHI bus pin routing (SDHI0, port 4 pins 0..7)
733 * =============================================================================
734 */
735
762
764{
765 /* Route the eight SDHI0 bus pins to PSEL=0x15. PSEL 0x15 is the SDHI
766 * SD / MMC function per chip HUM Ch 20.6 "Multiplexed Pin Function
767 * Selector"; the named constant is ``k_ra8_psel_sdhi``. */
768 const uint32_t count = (uint32_t)(sizeof(s_sdhi_bus_pins) / sizeof(s_sdhi_bus_pins[0]));
769 for (uint32_t i = 0U; i < count; ++i) {
770 const ra8_err_t err =
772 if (err != k_ra8_ok) {
773 return err;
774 }
775 }
776 return k_ra8_ok;
777}
778
779/* =============================================================================
780 * 5. Arduino header (UM Table 20, page 28)
781 * =============================================================================
782 */
783
797
802
804{
805 if (out_level == nullptr) {
807 }
808 return ra8_gpio_read((ra8_port_pin_t)pin, out_level);
809}
Annotation-attribute framework macros for ra8-firmware.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
ra8_err_t ra8_board_sw_pin(ra8_board_sw_id_t sw, ra8_port_pin_t *out_pin)
Translate a board switch id into its underlying ra8_port_pin_t.
ra8_err_t ra8_board_led_toggle(ra8_board_led_id_t led)
Toggle led's output state.
static const uint8_t s_sw_irq_nums[k_ra8_board_sw_count]
Lookup table from ra8_board_sw_id_t to ICU IRQ channel.
ra8_err_t ra8_board_arduino_gpio_read(ra8_board_arduino_pin_t pin, ra8_level_t *out_level)
Sample a previously-initialized Arduino GPIO pin.
ra8_err_t ra8_board_sw_attach_irq(ra8_board_sw_id_t sw, ra8_board_sw_irq_cb_t cb, void *ctx)
Wire sw to the ICU and register a falling-edge callback.
ra8_err_t ra8_board_arduino_gpio_write(ra8_board_arduino_pin_t pin, ra8_level_t level)
Drive a previously-initialized Arduino GPIO pin.
ra8_board_xspi_reset_timing_t
Hardware reset pulse + post-reset settle times for IS25LX512M-JHLE.
@ k_ra8_board_xspi_reset_low_ms
Hold RESET_L low for >= tRLRH.
@ k_ra8_board_xspi_reset_high_ms
Wait >= tPUW before first CS.
ra8_err_t ra8_board_lcd_panel_power_on(void)
Implementation of ra8_board_lcd_panel_power_on.
ra8_err_t ra8_board_backlight_set(bool on)
Turn the J1 panel backlight (BLEN, P514) on or off.
static const ra8_port_pin_t s_led_pins[k_ra8_board_led_count]
Lookup table from ra8_board_led_id_t to ra8_port_pin_t.
ra8_err_t ra8_board_sw_read(ra8_board_sw_id_t sw, ra8_board_sw_state_t *out_pressed)
Sample the current state of sw.
ra8_err_t ra8_board_sw_init(ra8_board_sw_id_t sw)
Configure a switch pin as an input with internal pull-up.
ra8_err_t ra8_board_sdhi_pins_init(void)
Route the eight SDHI0 bus pins to the SDHI peripheral function.
ra8_err_t ra8_board_led_pin(ra8_board_led_id_t led, ra8_port_pin_t *out_pin)
Translate a board LED id into its underlying ra8_port_pin_t.
ra8_err_t ra8_board_led_init(ra8_board_led_id_t led)
Configure led as a digital output, initial level low (off).
static bool internal_glcdc_signal_is_output(const char *signal)
Test whether a J1 signal name corresponds to a GLCDC output.
static bool internal_glcdc_signal_starts_with(const char *s, const char *prefix)
Check whether a NUL-terminated string starts with prefix.
static const ra8_port_pin_t s_sw_pins[k_ra8_board_sw_count]
Lookup table from ra8_board_sw_id_t to ra8_port_pin_t.
ra8_err_t ra8_board_led_on(ra8_board_led_id_t led)
Drive led HIGH (light it).
ra8_err_t ra8_board_glcdc_init(ra8_board_glcdc_fmt_t fmt)
Program every J1 pin for fmt to its GLCDC alternate function.
ra8_err_t ra8_board_get_info(ra8_board_info_t *out)
Copy the three board-identity strings into out.
static const ra8_port_pin_t s_xspi_octa_pins[]
Lookup table for the 12 OCTA bus pins routed to PSEL=0x1C.
static void internal_glcdc_force_pin_output(ra8_port_pin_t pin)
Force a PFS register to PSEL=glcdc, PMR=1, PDR=1 in one write.
static bool internal_glcdc_signal_is_color_data(const char *signal)
Check whether a signal name is a GLCDC R/G/B data line.
ra8_err_t ra8_board_led_off(ra8_board_led_id_t led)
Drive led LOW (extinguish it).
static const ra8_port_pin_t s_sdhi_bus_pins[]
Lookup table for the eight SDHI0 bus pins routed to PSEL=0x15.
ra8_err_t ra8_board_xspi_pins_init(void)
Route the 12 OCTA bus pins to the xSPI peripheral and pulse RESET_L.
ra8_err_t ra8_board_arduino_pin_init(ra8_board_arduino_pin_t pin, ra8_board_arduino_mode_t mode)
Configure an Arduino header pin in GPIO mode.
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
const char *const k_ra8_board_doc_rev
"R20UT5523EG0101 Rev 1.01".
@ k_ra8_board_sdhi_cd
SDHI0 CD, P407.
@ k_ra8_board_sdhi_dat3
SDHI0 DAT3, P405.
@ k_ra8_board_sdhi_clk
SDHI0 CLK, P401.
@ k_ra8_board_sdhi_dat2
SDHI0 DAT2, P404.
@ k_ra8_board_sdhi_dat0
SDHI0 DAT0, P402.
@ k_ra8_board_sdhi_cmd
SDHI0 CMD, P400.
@ k_ra8_board_sdhi_dat1
SDHI0 DAT1, P403.
@ k_ra8_board_sdhi_wp
SDHI0 WP, P406.
ra8_board_arduino_mode_t
Direction mode for an Arduino-header GPIO pin.
@ k_ra8_board_arduino_mode_input_pullup
RA8 board arduino mode input pullup.
@ k_ra8_board_arduino_mode_input
RA8 board arduino mode input.
@ k_ra8_board_arduino_mode_output
RA8 board arduino mode output.
const uint32_t g_ra8_board_glcdc_rgb888_pin_count
Number of entries in each per-format pin table.
const char *const k_ra8_board_name
Human-readable strings identifying this BSP target.
const uint32_t g_ra8_board_glcdc_rgb565_pin_count
const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb666_pins[]
RGB666-mode pin table for J1 (UM Table 33 p 42).
ra8_board_sw_id_t
Identifiers for the on-board user push-buttons.
@ k_ra8_board_sw_count
RA8 board sw count.
@ k_ra8_board_sw1
SW1, P009, IRQ13-DS (jumper E31).
@ k_ra8_board_sw2
SW2, P008, IRQ12-DS (jumper E32).
const char *const k_ra8_board_mcu
"R7KA8D2KFLCAC".
@ k_ra8_board_sw2_irq
SW2 -> IRQ12-DS.
@ k_ra8_board_sw1_irq
SW1 -> IRQ13-DS.
ra8_board_arduino_pin_t
Logical Arduino-header pins mapped to RA8D2 port pins.
const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb888_pins[]
Pin tables for J1 in each pixel format (UM Table 33 p 42).
ra8_board_glcdc_fmt_t
GLCDC parallel-RGB pixel formats supported by EK-RA8D2 J1.
@ k_ra8_board_glcdc_fmt_rgb888
24-bit, 8 bits/colour.
@ k_ra8_board_glcdc_fmt_rgb565
16-bit, 5/6/5 bits.
@ k_ra8_board_glcdc_fmt_rgb666
18-bit, 6 bits/colour.
const uint32_t g_ra8_board_glcdc_rgb666_pin_count
void(* ra8_board_sw_irq_cb_t)(void *ctx)
Switch IRQ callback signature.
const ra8_board_glcdc_pin_t g_ra8_board_glcdc_rgb565_pins[]
RGB565-mode pin table for J1 (UM Table 33 p 42).
ra8_board_sw_state_t
Logical "pressed" / "released" state.
@ k_ra8_board_sw_released
RA8 board sw released.
@ k_ra8_board_sw_pressed
RA8 board sw pressed.
ra8_board_led_id_t
Identifiers for the three user LEDs on EK-RA8D2 v1.
@ k_ra8_board_led2
LED2, GREEN, P303 (jumper E26).
@ k_ra8_board_led_count
RA8 board led count.
@ k_ra8_board_led1
LED1, BLUE, P600 (jumper E27).
@ k_ra8_board_led3
LED3, RED, PA07 (jumper E28).
ra8_board_eth_pin_t pin
Pin.
@ k_ra8_board_xspi_dq2
OSPI_FLASH_DQ2, P103.
@ k_ra8_board_xspi_dq7
OSPI_FLASH_DQ7, P804.
@ k_ra8_board_xspi_dq6
OSPI_FLASH_DQ6, P802.
@ k_ra8_board_xspi_dq1
OSPI_FLASH_DQ1, P803.
@ k_ra8_board_xspi_dq5
OSPI_FLASH_DQ5, P800.
@ k_ra8_board_xspi_dq3
OSPI_FLASH_DQ3, P101.
@ k_ra8_board_xspi_dq0
OSPI_FLASH_DQ0, P100.
@ k_ra8_board_xspi_clk
OSPI_FLASH_C, P808.
@ k_ra8_board_xspi_reset
OSPI_FLASH_RESET_L, P106.
@ k_ra8_board_xspi_dqs
OSPI_FLASH_DQS, P801.
@ k_ra8_board_xspi_dq4
OSPI_FLASH_DQ4, P102.
@ k_ra8_board_xspi_cs
OSPI_FLASH_S_L, P104.
Event Link Controller (ELC) register layout for the Renesas RA8D2.
ra8_elc_event_t
Partial list of ELC events (populate as drivers need them).
@ k_ra8_elc_event_icu_irq12
External pin interrupt 12 (HUM Ch 14 ELC event 0x00D).
@ k_ra8_elc_event_icu_irq13
External pin interrupt 13 (HUM Ch 14 ELC event 0x00E).
Error Code Definitions for ra8-firmware.
@ k_ra8_err_invalid_arg
Invalid function argument.
Definition ra8_err.h:152
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
Definition ra8_err.h:119
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
PSEL codes for peripheral pin routing on the RA8D2.
@ k_ra8_psel_qspi
11100b: OSPI / Octo-SPI / xSPI.
@ k_ra8_psel_glcdc
11001b: Graphics LCD Controller outputs.
@ k_ra8_psel_sdhi
10101b: SDHI SD / MMC.
Interrupt Control Unit driver (IRQ pins, NMI).
ra8_err_t ra8_icu_configure_irq_pin(uint8_t irq_num, const ra8_icu_irq_cfg_t *cfg)
Programme one IRQCRi register.
Definition ra8_icu.c:76
Interrupt Control Unit (ICU) register layout for the Renesas RA8D2.
@ k_ra8_icu_fclksel_pclkb
00: sample every PCLKB cycle.
@ k_ra8_icu_irqmd_falling
00: falling edge.
NVIC + ICU IELSR allocator.
void(* ra8_isr_handler_t)(void *ctx)
Driver-supplied callback invoked on interrupt entry.
Definition ra8_isr.h:128
@ k_ra8_isr_prio_default
Middle priority.
Definition ra8_isr.h:107
ra8_err_t ra8_isr_register(ra8_elc_event_t event, ra8_isr_handler_t handler, void *ctx, uint8_t priority, uint16_t *out_slot)
Allocate an IELSR slot for an ELC event + handler.
Definition ra8_isr.c:296
Pin Function Select (PFS) register layout for the Renesas RA8D2.
static void ra8_pfs_pwpr_lock(void)
Re-lock PFS writes.
static void ra8_pfs_pwpr_unlock(void)
Unlock PFS writes.
static volatile uint32_t * ra8_pfs_pmn(ra8_port_t port, ra8_pin_t pin)
Get pointer to the PmnPFS register for a single pin.
Typed Port / Pin Constants for the RA8D2 IOPORT Module.
ra8_port_pin_t
Packed (port << 8) | pin pin identifier.
@ k_ra8_pin_lcd_reset_l
J1-6 RST, P606 (active-low).
@ k_ra8_pin_none
Sentinel: no pin selected.
@ k_ra8_pin_lcd_blen
J1-1 BLEN, P514 (active-high).
ra8_port_t
Port indices for the RA8D2 IOPORT module.
@ k_ra8_port_9
RA8 port 9.
@ k_ra8_port_7
RA8 port 7.
@ k_ra8_port_3
RA8 port 3.
@ k_ra8_port_11
RA8 port 11.
@ k_ra8_port_2
RA8 port 2.
@ k_ra8_port_6
RA8 port 6.
@ k_ra8_port_5
RA8 port 5.
@ k_ra8_port_0
RA8 port 0.
@ k_ra8_port_8
RA8 port 8.
@ k_ra8_port_1
RA8 port 1.
@ k_ra8_port_10
RA8 port 10.
#define RA8_PIN(port, pin)
Build a ra8_port_pin_t from explicit port / pin indices.
ra8_level_t
Digital output / input level.
@ k_ra8_level_high
Drive or read 1.
@ k_ra8_level_low
Drive or read 0.
ra8_pin_t
Pin indices within an IOPORT port (0..15).
@ k_ra8_pin_4
RA8 pin 4.
@ k_ra8_pin_6
RA8 pin 6.
@ k_ra8_pin_11
RA8 pin 11.
@ k_ra8_pin_7
RA8 pin 7.
@ k_ra8_pin_10
RA8 pin 10.
@ k_ra8_pin_1
RA8 pin 1.
@ k_ra8_pin_2
RA8 pin 2.
@ k_ra8_pin_13
RA8 pin 13.
@ k_ra8_pin_12
RA8 pin 12.
@ k_ra8_pin_5
RA8 pin 5.
@ k_ra8_pin_14
RA8 pin 14.
@ k_ra8_pin_9
RA8 pin 9.
@ k_ra8_pin_8
RA8 pin 8.
@ k_ra8_pin_0
RA8 pin 0.
@ k_ra8_pin_3
RA8 pin 3.
@ k_ra8_pin_15
RA8 pin 15.
#define RA8_PIN_PORT(p)
Extract the port index from a packed ra8_port_pin_t.
@ k_ra8_pull_none
No internal pull.
@ k_ra8_pull_up
Internal pull-up.
#define RA8_PIN_PIN(p)
Extract the pin index from a packed ra8_port_pin_t.
High-level GPIO helpers on top of the PORT + PFS register layer.
ra8_err_t ra8_gpio_read(ra8_port_pin_t pin, ra8_level_t *out_level)
Read a previously-configured input.
Definition gpio.c:210
ra8_err_t ra8_gpio_input_init(ra8_port_pin_t pin, ra8_pin_pull_t pull)
Configure a pin as a digital input.
Definition gpio.c:121
ra8_err_t ra8_gpio_toggle(ra8_port_pin_t pin)
Toggle a previously-configured output.
Definition gpio.c:182
ra8_err_t ra8_gpio_output_init(ra8_port_pin_t pin, ra8_level_t init_level)
Configure a pin as a digital output and drive it to an initial level.
Definition gpio.c:88
ra8_err_t ra8_gpio_write(ra8_port_pin_t pin, ra8_level_t level)
Drive a previously-configured output to the given level.
Definition gpio.c:154
ra8_err_t ra8_pfs_route_peripheral(ra8_port_pin_t pin, ra8_psel_t psel, const char *owner)
Route a pin to a non-IRQ peripheral function via PFS.PSEL.
Definition gpio.c:238
SysTick-based tick counter, delay and timestamp helpers.
void ra8_delay_ms(uint32_t ms)
Busy-wait for at least ms milliseconds.
Definition ra8_time.c:129
One row of the GLCDC pin table – (signal name, RA8D2 pin).
Snapshot of board identity strings.
const char * doc_rev
Same value as k_ra8_board_doc_rev.
const char * mcu
Same value as k_ra8_board_mcu.
const char * name
Same value as k_ra8_board_name.
One external-IRQ-pin configuration descriptor.
Definition ra8_icu.h:65