main.c

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#include <stddef.h>
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_gpt.h"
#include "ra8_isr.h"
#include "ra8_mstp.h"
#include "ra8_poeg.h"
#include "ra8_time.h"

static const char* s_tag = "poeg_demo";

typedef enum : uint32_t {
  k_poeg_demo_baud      = 115200U,     
  k_poeg_demo_period_ms = 1000U,       
  k_poeg_demo_settle_ms = 2U,          
  k_poeg_demo_gpt_prd   = 0x0000FFFFU, 
  k_poeg_demo_gpt_duty  = 0x00008000U, 
} poeg_demo_config_t;

typedef enum : uint8_t {
  k_poeg_demo_gpt_channel = 0U, 
  k_poeg_demo_group       = 0U, 
} poeg_demo_unit_t;

static const uint8_t s_poeg_demo_ok_msg[] = "poeg: pwm=run shutoff=highZ reenable=on ok=Y\r\n";
static const uint8_t s_poeg_demo_bad_msg[] = "poeg: pwm=? shutoff=? reenable=? ok=N\r\n";

volatile uint32_t g_poeg_shutoffs = 0U;

volatile uint32_t g_poeg_last_status = 0U;

volatile uint32_t g_poeg_heartbeat = 0U;

volatile uint32_t g_poeg_mismatch = 0U;

RA8_INTERNAL static void internal_poeg_demo_panic_halt(void)
{
  while (1) {
    __asm__ volatile("wfi");
  }
}

RA8_INTERNAL static void internal_poeg_demo_setup_or_halt(void)
{
  uint32_t cpuclk0_hz = 0U;
 
  if (ra8_cgc_init() != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (ra8_cgc_get_clock_hz(k_ra8_clock_id_cpuclk0, &cpuclk0_hz) != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (ra8_mstp_init() != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (ra8_time_init(cpuclk0_hz) != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (ra8_board_uart_console_init((uint32_t)k_poeg_demo_baud) != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (ra8_board_led_init(k_ra8_board_led1) != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (ra8_board_led_init(k_ra8_board_led2) != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
}

[[nodiscard]] RA8_INTERNAL static ra8_err_t internal_poeg_demo_arm_gpt(void)
{
  const ra8_gpt_cfg_t cfg = {
    .mode       = k_ra8_gpt_mode_saw_pwm,
    .prescaler  = k_ra8_gpt_ps_div_4,
    .period     = (uint32_t)k_poeg_demo_gpt_prd,
    .duty_a     = (uint32_t)k_poeg_demo_gpt_duty,
    .duty_b     = (uint32_t)k_poeg_demo_gpt_duty,
    .auto_start = true,
  };
  return ra8_gpt_init((uint8_t)k_poeg_demo_gpt_channel, &cfg);
}

[[nodiscard]] RA8_INTERNAL static ra8_err_t internal_poeg_demo_arm_poeg(void)
{
  const ra8_poeg_cfg_t cfg = {
    .enable_pin      = true,
    .enable_ioc      = false,
    .enable_osc_stop = false,
    .invert_input    = false,
  };
  return ra8_poeg_init((uint8_t)k_poeg_demo_group, &cfg);
}

[[nodiscard]] RA8_INTERNAL static ra8_err_t internal_poeg_demo_cycle(uint8_t* out_ok)
{
  RA8_CHECK_NULL_PTR(out_ok, s_tag, "out_ok must not be nullptr");
  *out_ok = 0U;
 
  /* RUN: sample the free-running PWM counter. */
  uint32_t        before = 0U;
  const ra8_err_t rd0    = ra8_gpt_read((uint8_t)k_poeg_demo_gpt_channel, &before);
  if (rd0 != k_ra8_ok) {
    return rd0;
  }
 
  /* SHUTOFF: assert the software output-disable request and read ST back. */
  const ra8_err_t terr = ra8_poeg_trigger_stop((uint8_t)k_poeg_demo_group);
  if (terr != k_ra8_ok) {
    return terr;
  }
  uint32_t        asserted = 0U;
  const ra8_err_t serr     = ra8_poeg_get_status((uint8_t)k_poeg_demo_group, &asserted);
  if (serr != k_ra8_ok) {
    return serr;
  }
  g_poeg_last_status    = asserted;
  const uint8_t shutoff = ((asserted & (uint32_t)k_ra8_poeg_status_st) != 0U) ? 1U : 0U;
 
  /* Hold the shutoff briefly; the GPT counter keeps advancing meanwhile. */
  ra8_delay_ms((uint32_t)k_poeg_demo_settle_ms);
 
  /* RE-ENABLE: clear the request and confirm ST fell back to 0. */
  const ra8_err_t cerr =
    ra8_poeg_clear_status((uint8_t)k_poeg_demo_group, (uint32_t)k_ra8_poeg_status_ssf);
  if (cerr != k_ra8_ok) {
    return cerr;
  }
  uint32_t        cleared = 0U;
  const ra8_err_t cs      = ra8_poeg_get_status((uint8_t)k_poeg_demo_group, &cleared);
  if (cs != k_ra8_ok) {
    return cs;
  }
  const uint8_t reenabled = ((cleared & (uint32_t)k_ra8_poeg_status_st) == 0U) ? 1U : 0U;
 
  /* RUN confirm: the PWM counter must have advanced across the hold. */
  uint32_t        after = 0U;
  const ra8_err_t rd1   = ra8_gpt_read((uint8_t)k_poeg_demo_gpt_channel, &after);
  if (rd1 != k_ra8_ok) {
    return rd1;
  }
  const uint8_t running = (after != before) ? 1U : 0U;
 
  *out_ok = (shutoff != 0U && reenabled != 0U && running != 0U) ? 1U : 0U;
  return k_ra8_ok;
}
 
void main(void)
{
  internal_poeg_demo_setup_or_halt();
  /* Clear PRIMASK so SysTick can dispatch and ra8_delay_ms() uses the SysTick
   * path (ra8_emulator does not advance DWT_CYCCNT). No NVIC sources are armed. */
  ra8_isr_globals_enable();
 
  if (internal_poeg_demo_arm_gpt() != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
  if (internal_poeg_demo_arm_poeg() != k_ra8_ok) {
    internal_poeg_demo_panic_halt();
  }
 
  while (1) {
    uint8_t         ok   = 0U;
    const ra8_err_t err  = internal_poeg_demo_cycle(&ok);
    const uint8_t   good = (err == k_ra8_ok && ok != 0U) ? 1U : 0U;
    if (good != 0U) {
      (void)ra8_board_uart_console_write(s_poeg_demo_ok_msg,
                                         (size_t)(sizeof(s_poeg_demo_ok_msg) - 1U));
      (void)ra8_board_led_toggle(k_ra8_board_led1);
      ++g_poeg_shutoffs;
    } else {
      (void)ra8_board_uart_console_write(s_poeg_demo_bad_msg,
                                         (size_t)(sizeof(s_poeg_demo_bad_msg) - 1U));
      (void)ra8_board_led_toggle(k_ra8_board_led2);
      ++g_poeg_mismatch;
    }
    ++g_poeg_heartbeat;
    ra8_delay_ms((uint32_t)k_poeg_demo_period_ms);
  }
  internal_poeg_demo_panic_halt();
}