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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Configuration descriptor for ra8_sci_spi_init. More...
#include <ra8_sci_spi.h>
Data Fields | |
| uint32_t | baud_hz |
| Desired SCK bit-rate (Hz). | |
| uint32_t | pclk_hz |
| SCI baud-clock source (PCLKA, Hz). | |
| ra8_spi_mode_t | mode |
| Clock polarity/phase (mode 0..3). | |
| bool | lsb_first |
| true shifts LSB first. | |
Configuration descriptor for ra8_sci_spi_init.
pclk_hz is the SCI baud-clock source (PCLKA on the RA8D2). mode reuses the public ra8_spi_mode_t encoding.
Definition at line 49 of file ra8_sci_spi.h.
| uint32_t ra8_sci_spi_cfg_t::baud_hz |
Desired SCK bit-rate (Hz).
Definition at line 50 of file ra8_sci_spi.h.
Referenced by ra8_sci_spi_init().
| bool ra8_sci_spi_cfg_t::lsb_first |
| ra8_spi_mode_t ra8_sci_spi_cfg_t::mode |
Clock polarity/phase (mode 0..3).
Definition at line 52 of file ra8_sci_spi.h.
Referenced by internal_ccr3().
| uint32_t ra8_sci_spi_cfg_t::pclk_hz |
SCI baud-clock source (PCLKA, Hz).
Definition at line 51 of file ra8_sci_spi.h.
Referenced by ra8_sci_spi_init().