main.c

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#include <stddef.h>
#include <stdint.h>
 
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cache.h"
#include "ra8_cgc.h"
#include "ra8_check.h"
#include "ra8_dtc.h"
#include "ra8_dtc_regs.h"
#include "ra8_elc.h"
#include "ra8_err.h"
#include "ra8_icu_regs.h"
#include "ra8_isr.h"
#include "ra8_log.h"
#include "ra8_mstp.h"

static const char* s_tag = "dtc_coherency_hil";

typedef enum : uint32_t {
  k_dtc_coh_baud       = 115200U,     
  k_dtc_coh_buf_words  = 256U,        
  k_dtc_coh_buf_bytes  = 1024U,       
  k_dtc_coh_poll_limit = 100000U,     
  k_dtc_coh_sentinel   = 0xA5A5A5A5U, 
} dtc_coh_config_t;

typedef enum : uint8_t {
  k_dtc_coh_byte_sh  = 8U,  
  k_dtc_coh_align    = 32U, 
  k_dtc_coh_isr_prio = 12U, 
} dtc_coh_byte_t;

typedef enum : uint16_t {
  k_dtc_coh_event_swevt0 = 0x0CCU, 
} dtc_coh_event_t;

typedef enum : uint8_t {
  k_dtc_coh_swevt_index = 0U, 
} dtc_coh_swevt_t;

typedef enum : uint8_t {
  k_dtc_coh_md_block = 0x2U, 
  k_dtc_coh_sz_word  = 0x2U, 
  k_dtc_coh_sm_inc   = 0x2U, 
  k_dtc_coh_dm_inc   = 0x2U, 
} dtc_coh_mr_field_t;

typedef enum : uint8_t {
  k_dtc_coh_mra_md_pos   = 6U,  
  k_dtc_coh_mra_sz_pos   = 4U,  
  k_dtc_coh_mra_sm_pos   = 2U,  
  k_dtc_coh_mrb_dm_pos   = 2U,  
  k_dtc_coh_mra_byte_pos = 24U, 
  k_dtc_coh_mrb_byte_pos = 16U, 
} dtc_coh_mr_pos_t;

typedef enum : uint16_t {
  k_dtc_coh_cra_block_256 = 0x0000U, 
  k_dtc_coh_crb_one_block = 0x0001U, 
} dtc_coh_count_t;

typedef enum : uint32_t {
  k_dtc_coh_vt_entries = 96U,   
  k_dtc_coh_vt_align   = 1024U, 
  k_dtc_coh_cra_units  = 256U,  
} dtc_coh_vt_geom_t;
 
static_assert((uint32_t)k_dtc_coh_buf_words == (uint32_t)k_dtc_coh_cra_units,
              "CRA=0x0000 encodes a 256-unit block; buffer must be 256 words");
static_assert((uint32_t)k_dtc_coh_buf_words * sizeof(uint32_t) == (uint32_t)k_dtc_coh_buf_bytes,
              "buffer byte count must equal words * 4");
static_assert((uint32_t)k_dtc_coh_buf_bytes >= (uint32_t)k_dtc_coh_align,
              "buffer must span at least one D-cache line");

static const uint8_t k_dtc_coh_pass_banner[] = "dtc_coherency_hil: dtc coherent PASS\r\n";

static const uint8_t k_dtc_coh_fail_banner[] = "dtc_coherency_hil: dtc coherent FAIL\r\n";

alignas(k_dtc_coh_align) static uint32_t s_src[k_dtc_coh_buf_words];

alignas(k_dtc_coh_align) static uint32_t s_dst[k_dtc_coh_buf_words];

alignas(k_dtc_coh_vt_align) static uint32_t s_dtc_vt[k_dtc_coh_vt_entries];

alignas(k_dtc_coh_align) static r_dtc_xfer_info_t s_dtc_ti;

static uint16_t s_dtc_slot;

[[noreturn]] static void dtc_coh_park(void)
{
  while (1) {
    __asm__ volatile("wfi");
  }
}

static void dtc_coh_complete_cb(void* ctx, uint16_t status)
{
  (void)ctx;
  (void)status;
}

static void dtc_coh_swevt_isr(void* ctx)
{
  (void)ctx;
  ra8_dtc_dispatch();
}

static void dtc_coh_setup_or_halt(void)
{
  if (ra8_cgc_init() != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_mstp_init() != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_isr_init() != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_elc_init() != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_board_uart_console_init((uint32_t)k_dtc_coh_baud) != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_board_led_init(k_ra8_board_led1) != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_board_led_init(k_ra8_board_led2) != k_ra8_ok) {
    dtc_coh_park();
  }
}

static void dtc_coh_bringup_or_halt(void)
{
  if (ra8_dtc_init(s_dtc_vt) != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_dtc_attach_handler(dtc_coh_complete_cb, nullptr) != k_ra8_ok) {
    dtc_coh_park();
  }
  if (ra8_isr_register((ra8_elc_event_t)k_dtc_coh_event_swevt0,
                       dtc_coh_swevt_isr,
                       nullptr,
                       (uint8_t)k_dtc_coh_isr_prio,
                       &s_dtc_slot) != k_ra8_ok) {
    dtc_coh_park();
  }
  if (s_dtc_slot >= (uint16_t)k_dtc_coh_vt_entries) {
    dtc_coh_park();
  }
}

static void dtc_coh_fill_buffers(void)
{
  for (uint32_t i = 0U; i < (uint32_t)k_dtc_coh_buf_words; ++i) {
    s_src[i] = i ^ (i >> (uint32_t)k_dtc_coh_byte_sh);
    s_dst[i] = (uint32_t)k_dtc_coh_sentinel;
  }
}

static void dtc_coh_program_ti(void)
{
  const uint8_t mra = (uint8_t)(((uint8_t)k_dtc_coh_md_block << k_dtc_coh_mra_md_pos) |
                                ((uint8_t)k_dtc_coh_sz_word << k_dtc_coh_mra_sz_pos) |
                                ((uint8_t)k_dtc_coh_sm_inc << k_dtc_coh_mra_sm_pos));
  const uint8_t mrb = (uint8_t)((uint8_t)k_dtc_coh_dm_inc << k_dtc_coh_mrb_dm_pos);
  /* MR[31:24]=MRA, MR[23:16]=MRB, MR[15:8]=MRC(0); HUM Ch 18.2.2 p 786 /
   * 18.2.3 p 787 / 18.2.4 p 789, Figure 18.4 p 799. SRAM (not MMIO). */
  s_dtc_ti.MR =
    ((uint32_t)mra << k_dtc_coh_mra_byte_pos) | ((uint32_t)mrb << k_dtc_coh_mrb_byte_pos);
  s_dtc_ti.SAR         = (uint32_t)(uintptr_t)s_src;
  s_dtc_ti.DAR         = (uint32_t)(uintptr_t)s_dst;
  s_dtc_ti.CRB         = (uint16_t)k_dtc_coh_crb_one_block;
  s_dtc_ti.CRA         = (uint16_t)k_dtc_coh_cra_block_256;
  s_dtc_vt[s_dtc_slot] = (uint32_t)(uintptr_t)&s_dtc_ti;
}

[[nodiscard]] static ra8_err_t dtc_coh_arm_slot(void)
{
  volatile uint32_t* slot_reg = ra8_icu_ielsr(s_dtc_slot);
  if (slot_reg == nullptr) {
    return k_ra8_err_hw_error;
  }
  /* HUM Ch 14.2.17 "IELSRn : ICU Event Link Setting Register n" p 547:
   * DTCE[24] enables DTC activation; the IELS event field is preserved. */
  *slot_reg = *slot_reg | (uint32_t)k_ra8_ielsr_dtce_mask;
  return k_ra8_ok;
}

[[nodiscard]] static uint8_t dtc_coh_verify(void)
{
  for (uint32_t i = 0U; i < (uint32_t)k_dtc_coh_buf_words; ++i) {
    if (s_dst[i] != s_src[i]) {
      return 0U;
    }
  }
  return 1U;
}

[[nodiscard]] static ra8_err_t dtc_coh_run_once(uint8_t* out_ok)
{
  RA8_CHECK_NULL_PTR(out_ok, s_tag, "out_ok must not be nullptr");
  *out_ok = 0U;
 
  /* clean-before (app owns the TI + source): dirty lines -> SRAM so the DTC
   * reads the real descriptor and the real pattern from memory. */
  if (ra8_cache_dcache_clean_by_addr(s_src, (uint32_t)sizeof(s_src)) != k_ra8_ok) {
    return k_ra8_err_hw_error;
  }
  if (ra8_cache_dcache_clean_by_addr(&s_dtc_ti, (uint32_t)sizeof(s_dtc_ti)) != k_ra8_ok) {
    return k_ra8_err_hw_error;
  }
 
  /* The HAL cleans the caller-populated vector table here, then DTCST = 1. */
  const ra8_err_t en = ra8_dtc_enable();
  if (en != k_ra8_ok) {
    return en;
  }
  const ra8_err_t arm = dtc_coh_arm_slot();
  if (arm != k_ra8_ok) {
    return arm;
  }
  const ra8_err_t trig = ra8_elc_software_trigger((uint8_t)k_dtc_coh_swevt_index);
  if (trig != k_ra8_ok) {
    return trig;
  }
 
  /* Completion + coherency gate: invalidate-after each poll so the verify reads
   * what the DTC wrote to SRAM (not the dirty sentinel still in cache), and stop
   * as soon as the full block has landed. Bounded so a stale-descriptor copy
   * (the regression this app guards against) times out instead of hanging. */
  bool done = false;
  for (uint32_t i = 0U; i < (uint32_t)k_dtc_coh_poll_limit; ++i) {
    if (ra8_cache_dcache_invalidate_by_addr(s_dst, (uint32_t)sizeof(s_dst)) != k_ra8_ok) {
      return k_ra8_err_hw_error;
    }
    if (dtc_coh_verify() != 0U) {
      done = true;
      break;
    }
  }
  if (!done) {
    return k_ra8_err_hw_timeout;
  }
  *out_ok = 1U;
  return k_ra8_ok;
}

static void dtc_coh_report(uint8_t ok)
{
  if (ok != 0U) {
    (void)ra8_board_uart_console_write(k_dtc_coh_pass_banner,
                                       (size_t)(sizeof(k_dtc_coh_pass_banner) - 1U));
    (void)ra8_board_uart_console_flush();
    ra8_log_info(s_tag, "dtc coherent PASS");
    (void)ra8_board_led_toggle(k_ra8_board_led1);
  } else {
    (void)ra8_board_uart_console_write(k_dtc_coh_fail_banner,
                                       (size_t)(sizeof(k_dtc_coh_fail_banner) - 1U));
    (void)ra8_board_uart_console_flush();
    ra8_log_info(s_tag, "dtc coherent FAIL");
    (void)ra8_board_led_toggle(k_ra8_board_led2);
  }
}

void main(void)
{
  ra8_log_init();
  ra8_log_info(s_tag, "==== dtc_coherency_hil: M85 D-cache DTC descriptor coherency ====");
 
  dtc_coh_setup_or_halt();
  dtc_coh_bringup_or_halt();
 
  dtc_coh_fill_buffers();
  dtc_coh_program_ti();
 
  uint8_t         ok   = 0U;
  const ra8_err_t err  = dtc_coh_run_once(&ok);
  const uint8_t   good = (err == k_ra8_ok && ok != 0U) ? 1U : 0U;
  dtc_coh_report(good);
 
  dtc_coh_park();
}